1 /*- 2 * Copyright 2003 Eric Anholt. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 19 * AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 21 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 22 * 23 * $FreeBSD: src/sys/dev/drm2/drm_pci.c,v 1.1 2012/05/22 11:07:44 kib Exp $ 24 */ 25 26 /** 27 * \file drm_pci.h 28 * \brief PCI consistent, DMA-accessible memory allocation. 29 * 30 * \author Eric Anholt <anholt@FreeBSD.org> 31 */ 32 33 #include <drm/drmP.h> 34 35 /**********************************************************************/ 36 /** \name PCI memory */ 37 /*@{*/ 38 39 static void 40 drm_pci_busdma_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 41 { 42 drm_dma_handle_t *dmah = arg; 43 44 if (error != 0) 45 return; 46 47 KASSERT(nsegs == 1, ("drm_pci_busdma_callback: bad dma segment count")); 48 dmah->busaddr = segs[0].ds_addr; 49 } 50 51 /** 52 * \brief Allocate a physically contiguous DMA-accessible consistent 53 * memory block. 54 */ 55 drm_dma_handle_t * 56 drm_pci_alloc(struct drm_device *dev, size_t size, 57 size_t align, dma_addr_t maxaddr) 58 { 59 drm_dma_handle_t *dmah; 60 int ret; 61 62 /* Need power-of-two alignment, so fail the allocation if it isn't. */ 63 if ((align & (align - 1)) != 0) { 64 DRM_ERROR("drm_pci_alloc with non-power-of-two alignment %d\n", 65 (int)align); 66 return NULL; 67 } 68 69 dmah = kmalloc(sizeof(drm_dma_handle_t), DRM_MEM_DMA, M_ZERO | M_NOWAIT); 70 if (dmah == NULL) 71 return NULL; 72 73 #if 0 /* HT XXX XXX XXX */ 74 /* Make sure we aren't holding locks here */ 75 mtx_assert(&dev->dev_lock, MA_NOTOWNED); 76 if (mtx_owned(&dev->dev_lock)) 77 DRM_ERROR("called while holding dev_lock\n"); 78 mtx_assert(&dev->dma_lock, MA_NOTOWNED); 79 if (mtx_owned(&dev->dma_lock)) 80 DRM_ERROR("called while holding dma_lock\n"); 81 #endif 82 83 ret = bus_dma_tag_create(NULL, align, 0, /* tag, align, boundary */ 84 maxaddr, BUS_SPACE_MAXADDR, /* lowaddr, highaddr */ 85 NULL, NULL, /* filtfunc, filtfuncargs */ 86 size, 1, size, /* maxsize, nsegs, maxsegsize */ 87 0, /* flags */ 88 &dmah->tag); 89 if (ret != 0) { 90 drm_free(dmah, DRM_MEM_DMA); 91 return NULL; 92 } 93 94 ret = bus_dmamem_alloc(dmah->tag, &dmah->vaddr, 95 BUS_DMA_WAITOK | BUS_DMA_ZERO | BUS_DMA_NOCACHE, &dmah->map); 96 if (ret != 0) { 97 bus_dma_tag_destroy(dmah->tag); 98 drm_free(dmah, DRM_MEM_DMA); 99 return NULL; 100 } 101 102 ret = bus_dmamap_load(dmah->tag, dmah->map, dmah->vaddr, size, 103 drm_pci_busdma_callback, dmah, BUS_DMA_NOWAIT); 104 if (ret != 0) { 105 bus_dmamem_free(dmah->tag, dmah->vaddr, dmah->map); 106 bus_dma_tag_destroy(dmah->tag); 107 drm_free(dmah, DRM_MEM_DMA); 108 return NULL; 109 } 110 111 return dmah; 112 } 113 114 /** 115 * \brief Free a DMA-accessible consistent memory block. 116 */ 117 void 118 drm_pci_free(struct drm_device *dev, drm_dma_handle_t *dmah) 119 { 120 if (dmah == NULL) 121 return; 122 123 bus_dmamem_free(dmah->tag, dmah->vaddr, dmah->map); 124 bus_dma_tag_destroy(dmah->tag); 125 126 drm_free(dmah, DRM_MEM_DMA); 127 } 128 129 /*@}*/ 130 131 int drm_pcie_get_speed_cap_mask(struct drm_device *dev, u32 *mask) 132 { 133 device_t root; 134 int pos; 135 u32 lnkcap = 0, lnkcap2 = 0; 136 137 *mask = 0; 138 if (!drm_device_is_pcie(dev)) 139 return -EINVAL; 140 141 root = device_get_parent(dev->dev); 142 143 pos = 0; 144 pci_find_extcap(root, PCIY_EXPRESS, &pos); 145 if (!pos) 146 return -EINVAL; 147 148 /* we've been informed via and serverworks don't make the cut */ 149 if (pci_get_vendor(root) == PCI_VENDOR_ID_VIA || 150 pci_get_vendor(root) == PCI_VENDOR_ID_SERVERWORKS) 151 return -EINVAL; 152 153 lnkcap = pci_read_config(root, pos + PCIER_LINKCAP, 4); 154 lnkcap2 = pci_read_config(root, pos + PCIER_LINK_CAP2, 4); 155 156 lnkcap &= PCIEM_LNKCAP_SPEED_MASK; 157 lnkcap2 &= 0xfe; 158 159 #define PCI_EXP_LNKCAP2_SLS_2_5GB 0x02 /* Supported Link Speed 2.5GT/s */ 160 #define PCI_EXP_LNKCAP2_SLS_5_0GB 0x04 /* Supported Link Speed 5.0GT/s */ 161 #define PCI_EXP_LNKCAP2_SLS_8_0GB 0x08 /* Supported Link Speed 8.0GT/s */ 162 163 if (lnkcap2) { /* PCIE GEN 3.0 */ 164 if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_2_5GB) 165 *mask |= DRM_PCIE_SPEED_25; 166 if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_5_0GB) 167 *mask |= DRM_PCIE_SPEED_50; 168 if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_8_0GB) 169 *mask |= DRM_PCIE_SPEED_80; 170 } else { 171 if (lnkcap & 1) 172 *mask |= DRM_PCIE_SPEED_25; 173 if (lnkcap & 2) 174 *mask |= DRM_PCIE_SPEED_50; 175 } 176 177 DRM_INFO("probing gen 2 caps for device %x:%x = %x/%x\n", pci_get_vendor(root), pci_get_device(root), lnkcap, lnkcap2); 178 return 0; 179 } 180