1 /* 2 * Copyright © 2007 Dave Mueller 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 * 23 * Authors: 24 * Dave Mueller <dave.mueller@gmx.ch> 25 * 26 */ 27 28 #include "dvo.h" 29 30 /* register definitions according to the TFP410 data sheet */ 31 #define TFP410_VID 0x014C 32 #define TFP410_DID 0x0410 33 34 #define TFP410_VID_LO 0x00 35 #define TFP410_VID_HI 0x01 36 #define TFP410_DID_LO 0x02 37 #define TFP410_DID_HI 0x03 38 #define TFP410_REV 0x04 39 40 #define TFP410_CTL_1 0x08 41 #define TFP410_CTL_1_TDIS (1<<6) 42 #define TFP410_CTL_1_VEN (1<<5) 43 #define TFP410_CTL_1_HEN (1<<4) 44 #define TFP410_CTL_1_DSEL (1<<3) 45 #define TFP410_CTL_1_BSEL (1<<2) 46 #define TFP410_CTL_1_EDGE (1<<1) 47 #define TFP410_CTL_1_PD (1<<0) 48 49 #define TFP410_CTL_2 0x09 50 #define TFP410_CTL_2_VLOW (1<<7) 51 #define TFP410_CTL_2_MSEL_MASK (0x7<<4) 52 #define TFP410_CTL_2_MSEL (1<<4) 53 #define TFP410_CTL_2_TSEL (1<<3) 54 #define TFP410_CTL_2_RSEN (1<<2) 55 #define TFP410_CTL_2_HTPLG (1<<1) 56 #define TFP410_CTL_2_MDI (1<<0) 57 58 #define TFP410_CTL_3 0x0A 59 #define TFP410_CTL_3_DK_MASK (0x7<<5) 60 #define TFP410_CTL_3_DK (1<<5) 61 #define TFP410_CTL_3_DKEN (1<<4) 62 #define TFP410_CTL_3_CTL_MASK (0x7<<1) 63 #define TFP410_CTL_3_CTL (1<<1) 64 65 #define TFP410_USERCFG 0x0B 66 67 #define TFP410_DE_DLY 0x32 68 69 #define TFP410_DE_CTL 0x33 70 #define TFP410_DE_CTL_DEGEN (1<<6) 71 #define TFP410_DE_CTL_VSPOL (1<<5) 72 #define TFP410_DE_CTL_HSPOL (1<<4) 73 #define TFP410_DE_CTL_DEDLY8 (1<<0) 74 75 #define TFP410_DE_TOP 0x34 76 77 #define TFP410_DE_CNT_LO 0x36 78 #define TFP410_DE_CNT_HI 0x37 79 80 #define TFP410_DE_LIN_LO 0x38 81 #define TFP410_DE_LIN_HI 0x39 82 83 #define TFP410_H_RES_LO 0x3A 84 #define TFP410_H_RES_HI 0x3B 85 86 #define TFP410_V_RES_LO 0x3C 87 #define TFP410_V_RES_HI 0x3D 88 89 struct tfp410_priv { 90 bool quiet; 91 }; 92 93 static bool tfp410_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch) 94 { 95 struct intel_iic_softc *sc; 96 struct tfp410_priv *tfp = dvo->dev_priv; 97 struct i2c_adapter *adapter = dvo->i2c_bus; 98 u8 out_buf[2]; 99 u8 in_buf[2]; 100 101 struct i2c_msg msgs[] = { 102 { 103 .slave = dvo->slave_addr << 1, 104 .flags = 0, 105 .len = 1, 106 .buf = out_buf, 107 }, 108 { 109 .slave = dvo->slave_addr << 1, 110 .flags = I2C_M_RD, 111 .len = 1, 112 .buf = in_buf, 113 } 114 }; 115 116 out_buf[0] = addr; 117 out_buf[1] = 0; 118 119 sc = device_get_softc(adapter); 120 121 if (iicbus_transfer(adapter, msgs, 2) == 0) { 122 *ch = in_buf[0]; 123 return true; 124 } 125 126 if (!tfp->quiet) { 127 DRM_DEBUG_KMS("Unable to read register 0x%02x from %s:%02x.\n", 128 addr, sc->name, dvo->slave_addr); 129 } 130 return false; 131 } 132 133 static bool tfp410_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch) 134 { 135 struct intel_iic_softc *sc; 136 struct tfp410_priv *tfp = dvo->dev_priv; 137 struct i2c_adapter *adapter = dvo->i2c_bus; 138 uint8_t out_buf[2]; 139 struct i2c_msg msg = { 140 .slave = dvo->slave_addr << 1, 141 .flags = 0, 142 .len = 2, 143 .buf = out_buf, 144 }; 145 146 out_buf[0] = addr; 147 out_buf[1] = ch; 148 149 sc = device_get_softc(adapter); 150 151 if (iicbus_transfer(adapter, &msg, 1) == 0) 152 return true; 153 154 if (!tfp->quiet) { 155 DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n", 156 addr, sc->name, dvo->slave_addr); 157 } 158 159 return false; 160 } 161 162 static int tfp410_getid(struct intel_dvo_device *dvo, int addr) 163 { 164 uint8_t ch1, ch2; 165 166 if (tfp410_readb(dvo, addr+0, &ch1) && 167 tfp410_readb(dvo, addr+1, &ch2)) 168 return ((ch2 << 8) & 0xFF00) | (ch1 & 0x00FF); 169 170 return -1; 171 } 172 173 /* Ti TFP410 driver for chip on i2c bus */ 174 static bool tfp410_init(struct intel_dvo_device *dvo, 175 struct i2c_adapter *adapter) 176 { 177 struct intel_iic_softc *sc; 178 /* this will detect the tfp410 chip on the specified i2c bus */ 179 struct tfp410_priv *tfp; 180 int id; 181 182 sc = device_get_softc(adapter); 183 184 tfp = kzalloc(sizeof(struct tfp410_priv), GFP_KERNEL); 185 if (tfp == NULL) 186 return false; 187 188 dvo->i2c_bus = adapter; 189 dvo->dev_priv = tfp; 190 tfp->quiet = true; 191 192 if ((id = tfp410_getid(dvo, TFP410_VID_LO)) != TFP410_VID) { 193 DRM_DEBUG_KMS("tfp410 not detected got VID %X: from %s " 194 "Slave %d.\n", 195 id, sc->name, dvo->slave_addr); 196 goto out; 197 } 198 199 if ((id = tfp410_getid(dvo, TFP410_DID_LO)) != TFP410_DID) { 200 DRM_DEBUG_KMS("tfp410 not detected got DID %X: from %s " 201 "Slave %d.\n", 202 id, sc->name, dvo->slave_addr); 203 goto out; 204 } 205 tfp->quiet = false; 206 return true; 207 out: 208 kfree(tfp); 209 return false; 210 } 211 212 static enum drm_connector_status tfp410_detect(struct intel_dvo_device *dvo) 213 { 214 enum drm_connector_status ret = connector_status_disconnected; 215 uint8_t ctl2; 216 217 if (tfp410_readb(dvo, TFP410_CTL_2, &ctl2)) { 218 if (ctl2 & TFP410_CTL_2_RSEN) 219 ret = connector_status_connected; 220 else 221 ret = connector_status_disconnected; 222 } 223 224 return ret; 225 } 226 227 static enum drm_mode_status tfp410_mode_valid(struct intel_dvo_device *dvo, 228 struct drm_display_mode *mode) 229 { 230 return MODE_OK; 231 } 232 233 static void tfp410_mode_set(struct intel_dvo_device *dvo, 234 struct drm_display_mode *mode, 235 struct drm_display_mode *adjusted_mode) 236 { 237 /* As long as the basics are set up, since we don't have clock dependencies 238 * in the mode setup, we can just leave the registers alone and everything 239 * will work fine. 240 */ 241 /* don't do much */ 242 return; 243 } 244 245 /* set the tfp410 power state */ 246 static void tfp410_dpms(struct intel_dvo_device *dvo, bool enable) 247 { 248 uint8_t ctl1; 249 250 if (!tfp410_readb(dvo, TFP410_CTL_1, &ctl1)) 251 return; 252 253 if (enable) 254 ctl1 |= TFP410_CTL_1_PD; 255 else 256 ctl1 &= ~TFP410_CTL_1_PD; 257 258 tfp410_writeb(dvo, TFP410_CTL_1, ctl1); 259 } 260 261 static bool tfp410_get_hw_state(struct intel_dvo_device *dvo) 262 { 263 uint8_t ctl1; 264 265 if (!tfp410_readb(dvo, TFP410_CTL_1, &ctl1)) 266 return false; 267 268 if (ctl1 & TFP410_CTL_1_PD) 269 return true; 270 else 271 return false; 272 } 273 274 static void tfp410_dump_regs(struct intel_dvo_device *dvo) 275 { 276 uint8_t val, val2; 277 278 tfp410_readb(dvo, TFP410_REV, &val); 279 DRM_DEBUG_KMS("TFP410_REV: 0x%02X\n", val); 280 tfp410_readb(dvo, TFP410_CTL_1, &val); 281 DRM_DEBUG_KMS("TFP410_CTL1: 0x%02X\n", val); 282 tfp410_readb(dvo, TFP410_CTL_2, &val); 283 DRM_DEBUG_KMS("TFP410_CTL2: 0x%02X\n", val); 284 tfp410_readb(dvo, TFP410_CTL_3, &val); 285 DRM_DEBUG_KMS("TFP410_CTL3: 0x%02X\n", val); 286 tfp410_readb(dvo, TFP410_USERCFG, &val); 287 DRM_DEBUG_KMS("TFP410_USERCFG: 0x%02X\n", val); 288 tfp410_readb(dvo, TFP410_DE_DLY, &val); 289 DRM_DEBUG_KMS("TFP410_DE_DLY: 0x%02X\n", val); 290 tfp410_readb(dvo, TFP410_DE_CTL, &val); 291 DRM_DEBUG_KMS("TFP410_DE_CTL: 0x%02X\n", val); 292 tfp410_readb(dvo, TFP410_DE_TOP, &val); 293 DRM_DEBUG_KMS("TFP410_DE_TOP: 0x%02X\n", val); 294 tfp410_readb(dvo, TFP410_DE_CNT_LO, &val); 295 tfp410_readb(dvo, TFP410_DE_CNT_HI, &val2); 296 DRM_DEBUG_KMS("TFP410_DE_CNT: 0x%02X%02X\n", val2, val); 297 tfp410_readb(dvo, TFP410_DE_LIN_LO, &val); 298 tfp410_readb(dvo, TFP410_DE_LIN_HI, &val2); 299 DRM_DEBUG_KMS("TFP410_DE_LIN: 0x%02X%02X\n", val2, val); 300 tfp410_readb(dvo, TFP410_H_RES_LO, &val); 301 tfp410_readb(dvo, TFP410_H_RES_HI, &val2); 302 DRM_DEBUG_KMS("TFP410_H_RES: 0x%02X%02X\n", val2, val); 303 tfp410_readb(dvo, TFP410_V_RES_LO, &val); 304 tfp410_readb(dvo, TFP410_V_RES_HI, &val2); 305 DRM_DEBUG_KMS("TFP410_V_RES: 0x%02X%02X\n", val2, val); 306 } 307 308 static void tfp410_destroy(struct intel_dvo_device *dvo) 309 { 310 struct tfp410_priv *tfp = dvo->dev_priv; 311 312 if (tfp) { 313 kfree(tfp); 314 dvo->dev_priv = NULL; 315 } 316 } 317 318 struct intel_dvo_dev_ops tfp410_ops = { 319 .init = tfp410_init, 320 .detect = tfp410_detect, 321 .mode_valid = tfp410_mode_valid, 322 .mode_set = tfp410_mode_set, 323 .dpms = tfp410_dpms, 324 .get_hw_state = tfp410_get_hw_state, 325 .dump_regs = tfp410_dump_regs, 326 .destroy = tfp410_destroy, 327 }; 328