1 /* 2 * Copyright © 2008,2010 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 * 23 * Authors: 24 * Eric Anholt <eric@anholt.net> 25 * Chris Wilson <chris@chris-wilson.co.uk> 26 * 27 */ 28 29 #include <linux/dma_remapping.h> 30 #include <linux/reservation.h> 31 #include <linux/sync_file.h> 32 #include <linux/uaccess.h> 33 34 #include <drm/drmP.h> 35 #include <drm/drm_syncobj.h> 36 #include <drm/i915_drm.h> 37 38 #include "i915_drv.h" 39 #include "i915_gem_clflush.h" 40 #include "i915_trace.h" 41 #include "intel_drv.h" 42 #include "intel_frontbuffer.h" 43 44 enum { 45 FORCE_CPU_RELOC = 1, 46 FORCE_GTT_RELOC, 47 FORCE_GPU_RELOC, 48 #define DBG_FORCE_RELOC 0 /* choose one of the above! */ 49 }; 50 51 #define __EXEC_OBJECT_HAS_REF BIT(31) 52 #define __EXEC_OBJECT_HAS_PIN BIT(30) 53 #define __EXEC_OBJECT_HAS_FENCE BIT(29) 54 #define __EXEC_OBJECT_NEEDS_MAP BIT(28) 55 #define __EXEC_OBJECT_NEEDS_BIAS BIT(27) 56 #define __EXEC_OBJECT_INTERNAL_FLAGS (~0u << 27) /* all of the above */ 57 #define __EXEC_OBJECT_RESERVED (__EXEC_OBJECT_HAS_PIN | __EXEC_OBJECT_HAS_FENCE) 58 59 #define __EXEC_HAS_RELOC BIT(31) 60 #define __EXEC_VALIDATED BIT(30) 61 #define __EXEC_INTERNAL_FLAGS (~0u << 30) 62 #define UPDATE PIN_OFFSET_FIXED 63 64 #define BATCH_OFFSET_BIAS (256*1024) 65 66 #define __I915_EXEC_ILLEGAL_FLAGS \ 67 (__I915_EXEC_UNKNOWN_FLAGS | I915_EXEC_CONSTANTS_MASK) 68 69 /** 70 * DOC: User command execution 71 * 72 * Userspace submits commands to be executed on the GPU as an instruction 73 * stream within a GEM object we call a batchbuffer. This instructions may 74 * refer to other GEM objects containing auxiliary state such as kernels, 75 * samplers, render targets and even secondary batchbuffers. Userspace does 76 * not know where in the GPU memory these objects reside and so before the 77 * batchbuffer is passed to the GPU for execution, those addresses in the 78 * batchbuffer and auxiliary objects are updated. This is known as relocation, 79 * or patching. To try and avoid having to relocate each object on the next 80 * execution, userspace is told the location of those objects in this pass, 81 * but this remains just a hint as the kernel may choose a new location for 82 * any object in the future. 83 * 84 * Processing an execbuf ioctl is conceptually split up into a few phases. 85 * 86 * 1. Validation - Ensure all the pointers, handles and flags are valid. 87 * 2. Reservation - Assign GPU address space for every object 88 * 3. Relocation - Update any addresses to point to the final locations 89 * 4. Serialisation - Order the request with respect to its dependencies 90 * 5. Construction - Construct a request to execute the batchbuffer 91 * 6. Submission (at some point in the future execution) 92 * 93 * Reserving resources for the execbuf is the most complicated phase. We 94 * neither want to have to migrate the object in the address space, nor do 95 * we want to have to update any relocations pointing to this object. Ideally, 96 * we want to leave the object where it is and for all the existing relocations 97 * to match. If the object is given a new address, or if userspace thinks the 98 * object is elsewhere, we have to parse all the relocation entries and update 99 * the addresses. Userspace can set the I915_EXEC_NORELOC flag to hint that 100 * all the target addresses in all of its objects match the value in the 101 * relocation entries and that they all match the presumed offsets given by the 102 * list of execbuffer objects. Using this knowledge, we know that if we haven't 103 * moved any buffers, all the relocation entries are valid and we can skip 104 * the update. (If userspace is wrong, the likely outcome is an impromptu GPU 105 * hang.) The requirement for using I915_EXEC_NO_RELOC are: 106 * 107 * The addresses written in the objects must match the corresponding 108 * reloc.presumed_offset which in turn must match the corresponding 109 * execobject.offset. 110 * 111 * Any render targets written to in the batch must be flagged with 112 * EXEC_OBJECT_WRITE. 113 * 114 * To avoid stalling, execobject.offset should match the current 115 * address of that object within the active context. 116 * 117 * The reservation is done is multiple phases. First we try and keep any 118 * object already bound in its current location - so as long as meets the 119 * constraints imposed by the new execbuffer. Any object left unbound after the 120 * first pass is then fitted into any available idle space. If an object does 121 * not fit, all objects are removed from the reservation and the process rerun 122 * after sorting the objects into a priority order (more difficult to fit 123 * objects are tried first). Failing that, the entire VM is cleared and we try 124 * to fit the execbuf once last time before concluding that it simply will not 125 * fit. 126 * 127 * A small complication to all of this is that we allow userspace not only to 128 * specify an alignment and a size for the object in the address space, but 129 * we also allow userspace to specify the exact offset. This objects are 130 * simpler to place (the location is known a priori) all we have to do is make 131 * sure the space is available. 132 * 133 * Once all the objects are in place, patching up the buried pointers to point 134 * to the final locations is a fairly simple job of walking over the relocation 135 * entry arrays, looking up the right address and rewriting the value into 136 * the object. Simple! ... The relocation entries are stored in user memory 137 * and so to access them we have to copy them into a local buffer. That copy 138 * has to avoid taking any pagefaults as they may lead back to a GEM object 139 * requiring the struct_mutex (i.e. recursive deadlock). So once again we split 140 * the relocation into multiple passes. First we try to do everything within an 141 * atomic context (avoid the pagefaults) which requires that we never wait. If 142 * we detect that we may wait, or if we need to fault, then we have to fallback 143 * to a slower path. The slowpath has to drop the mutex. (Can you hear alarm 144 * bells yet?) Dropping the mutex means that we lose all the state we have 145 * built up so far for the execbuf and we must reset any global data. However, 146 * we do leave the objects pinned in their final locations - which is a 147 * potential issue for concurrent execbufs. Once we have left the mutex, we can 148 * allocate and copy all the relocation entries into a large array at our 149 * leisure, reacquire the mutex, reclaim all the objects and other state and 150 * then proceed to update any incorrect addresses with the objects. 151 * 152 * As we process the relocation entries, we maintain a record of whether the 153 * object is being written to. Using NORELOC, we expect userspace to provide 154 * this information instead. We also check whether we can skip the relocation 155 * by comparing the expected value inside the relocation entry with the target's 156 * final address. If they differ, we have to map the current object and rewrite 157 * the 4 or 8 byte pointer within. 158 * 159 * Serialising an execbuf is quite simple according to the rules of the GEM 160 * ABI. Execution within each context is ordered by the order of submission. 161 * Writes to any GEM object are in order of submission and are exclusive. Reads 162 * from a GEM object are unordered with respect to other reads, but ordered by 163 * writes. A write submitted after a read cannot occur before the read, and 164 * similarly any read submitted after a write cannot occur before the write. 165 * Writes are ordered between engines such that only one write occurs at any 166 * time (completing any reads beforehand) - using semaphores where available 167 * and CPU serialisation otherwise. Other GEM access obey the same rules, any 168 * write (either via mmaps using set-domain, or via pwrite) must flush all GPU 169 * reads before starting, and any read (either using set-domain or pread) must 170 * flush all GPU writes before starting. (Note we only employ a barrier before, 171 * we currently rely on userspace not concurrently starting a new execution 172 * whilst reading or writing to an object. This may be an advantage or not 173 * depending on how much you trust userspace not to shoot themselves in the 174 * foot.) Serialisation may just result in the request being inserted into 175 * a DAG awaiting its turn, but most simple is to wait on the CPU until 176 * all dependencies are resolved. 177 * 178 * After all of that, is just a matter of closing the request and handing it to 179 * the hardware (well, leaving it in a queue to be executed). However, we also 180 * offer the ability for batchbuffers to be run with elevated privileges so 181 * that they access otherwise hidden registers. (Used to adjust L3 cache etc.) 182 * Before any batch is given extra privileges we first must check that it 183 * contains no nefarious instructions, we check that each instruction is from 184 * our whitelist and all registers are also from an allowed list. We first 185 * copy the user's batchbuffer to a shadow (so that the user doesn't have 186 * access to it, either by the CPU or GPU as we scan it) and then parse each 187 * instruction. If everything is ok, we set a flag telling the hardware to run 188 * the batchbuffer in trusted mode, otherwise the ioctl is rejected. 189 */ 190 191 struct i915_execbuffer { 192 struct drm_i915_private *i915; /** i915 backpointer */ 193 struct drm_file *file; /** per-file lookup tables and limits */ 194 struct drm_i915_gem_execbuffer2 *args; /** ioctl parameters */ 195 struct drm_i915_gem_exec_object2 *exec; /** ioctl execobj[] */ 196 struct i915_vma **vma; 197 unsigned int *flags; 198 199 struct intel_engine_cs *engine; /** engine to queue the request to */ 200 struct i915_gem_context *ctx; /** context for building the request */ 201 struct i915_address_space *vm; /** GTT and vma for the request */ 202 203 struct drm_i915_gem_request *request; /** our request to build */ 204 struct i915_vma *batch; /** identity of the batch obj/vma */ 205 206 /** actual size of execobj[] as we may extend it for the cmdparser */ 207 unsigned int buffer_count; 208 209 /** list of vma not yet bound during reservation phase */ 210 struct list_head unbound; 211 212 /** list of vma that have execobj.relocation_count */ 213 struct list_head relocs; 214 215 /** 216 * Track the most recently used object for relocations, as we 217 * frequently have to perform multiple relocations within the same 218 * obj/page 219 */ 220 struct reloc_cache { 221 struct drm_mm_node node; /** temporary GTT binding */ 222 unsigned long vaddr; /** Current kmap address */ 223 unsigned long page; /** Currently mapped page index */ 224 unsigned int gen; /** Cached value of INTEL_GEN */ 225 bool use_64bit_reloc : 1; 226 bool has_llc : 1; 227 bool has_fence : 1; 228 bool needs_unfenced : 1; 229 230 struct drm_i915_gem_request *rq; 231 u32 *rq_cmd; 232 unsigned int rq_size; 233 } reloc_cache; 234 235 u64 invalid_flags; /** Set of execobj.flags that are invalid */ 236 u32 context_flags; /** Set of execobj.flags to insert from the ctx */ 237 238 u32 batch_start_offset; /** Location within object of batch */ 239 u32 batch_len; /** Length of batch within object */ 240 u32 batch_flags; /** Flags composed for emit_bb_start() */ 241 242 /** 243 * Indicate either the size of the hastable used to resolve 244 * relocation handles, or if negative that we are using a direct 245 * index into the execobj[]. 246 */ 247 int lut_size; 248 struct hlist_head *buckets; /** ht for relocation handles */ 249 }; 250 251 #define exec_entry(EB, VMA) (&(EB)->exec[(VMA)->exec_flags - (EB)->flags]) 252 253 /* 254 * Used to convert any address to canonical form. 255 * Starting from gen8, some commands (e.g. STATE_BASE_ADDRESS, 256 * MI_LOAD_REGISTER_MEM and others, see Broadwell PRM Vol2a) require the 257 * addresses to be in a canonical form: 258 * "GraphicsAddress[63:48] are ignored by the HW and assumed to be in correct 259 * canonical form [63:48] == [47]." 260 */ 261 #define GEN8_HIGH_ADDRESS_BIT 47 262 static inline u64 gen8_canonical_addr(u64 address) 263 { 264 return sign_extend64(address, GEN8_HIGH_ADDRESS_BIT); 265 } 266 267 static inline u64 gen8_noncanonical_addr(u64 address) 268 { 269 return address & GENMASK_ULL(GEN8_HIGH_ADDRESS_BIT, 0); 270 } 271 272 static inline bool eb_use_cmdparser(const struct i915_execbuffer *eb) 273 { 274 return eb->engine->needs_cmd_parser && eb->batch_len; 275 } 276 277 static int eb_create(struct i915_execbuffer *eb) 278 { 279 if (!(eb->args->flags & I915_EXEC_HANDLE_LUT)) { 280 unsigned int size = 1 + ilog2(eb->buffer_count); 281 282 /* 283 * Without a 1:1 association between relocation handles and 284 * the execobject[] index, we instead create a hashtable. 285 * We size it dynamically based on available memory, starting 286 * first with 1:1 assocative hash and scaling back until 287 * the allocation succeeds. 288 * 289 * Later on we use a positive lut_size to indicate we are 290 * using this hashtable, and a negative value to indicate a 291 * direct lookup. 292 */ 293 do { 294 gfp_t flags; 295 296 /* While we can still reduce the allocation size, don't 297 * raise a warning and allow the allocation to fail. 298 * On the last pass though, we want to try as hard 299 * as possible to perform the allocation and warn 300 * if it fails. 301 */ 302 flags = GFP_KERNEL; 303 if (size > 1) 304 flags |= __GFP_NORETRY | __GFP_NOWARN; 305 306 eb->buckets = kzalloc(sizeof(struct hlist_head) << size, 307 flags); 308 if (eb->buckets) 309 break; 310 } while (--size); 311 312 if (unlikely(!size)) 313 return -ENOMEM; 314 315 eb->lut_size = size; 316 } else { 317 eb->lut_size = -eb->buffer_count; 318 } 319 320 return 0; 321 } 322 323 static bool 324 eb_vma_misplaced(const struct drm_i915_gem_exec_object2 *entry, 325 const struct i915_vma *vma, 326 unsigned int flags) 327 { 328 if (vma->node.size < entry->pad_to_size) 329 return true; 330 331 if (entry->alignment && !IS_ALIGNED(vma->node.start, entry->alignment)) 332 return true; 333 334 if (flags & EXEC_OBJECT_PINNED && 335 vma->node.start != entry->offset) 336 return true; 337 338 if (flags & __EXEC_OBJECT_NEEDS_BIAS && 339 vma->node.start < BATCH_OFFSET_BIAS) 340 return true; 341 342 if (!(flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS) && 343 (vma->node.start + vma->node.size - 1) >> 32) 344 return true; 345 346 return false; 347 } 348 349 static inline bool 350 eb_pin_vma(struct i915_execbuffer *eb, 351 const struct drm_i915_gem_exec_object2 *entry, 352 struct i915_vma *vma) 353 { 354 unsigned int exec_flags = *vma->exec_flags; 355 u64 pin_flags; 356 357 if (vma->node.size) 358 pin_flags = vma->node.start; 359 else 360 pin_flags = entry->offset & PIN_OFFSET_MASK; 361 362 pin_flags |= PIN_USER | PIN_NOEVICT | PIN_OFFSET_FIXED; 363 if (unlikely(exec_flags & EXEC_OBJECT_NEEDS_GTT)) 364 pin_flags |= PIN_GLOBAL; 365 366 if (unlikely(i915_vma_pin(vma, 0, 0, pin_flags))) 367 return false; 368 369 if (unlikely(exec_flags & EXEC_OBJECT_NEEDS_FENCE)) { 370 if (unlikely(i915_vma_pin_fence(vma))) { 371 i915_vma_unpin(vma); 372 return false; 373 } 374 375 if (vma->fence) 376 exec_flags |= __EXEC_OBJECT_HAS_FENCE; 377 } 378 379 *vma->exec_flags = exec_flags | __EXEC_OBJECT_HAS_PIN; 380 return !eb_vma_misplaced(entry, vma, exec_flags); 381 } 382 383 static inline void __eb_unreserve_vma(struct i915_vma *vma, unsigned int flags) 384 { 385 GEM_BUG_ON(!(flags & __EXEC_OBJECT_HAS_PIN)); 386 387 if (unlikely(flags & __EXEC_OBJECT_HAS_FENCE)) 388 __i915_vma_unpin_fence(vma); 389 390 __i915_vma_unpin(vma); 391 } 392 393 static inline void 394 eb_unreserve_vma(struct i915_vma *vma, unsigned int *flags) 395 { 396 if (!(*flags & __EXEC_OBJECT_HAS_PIN)) 397 return; 398 399 __eb_unreserve_vma(vma, *flags); 400 *flags &= ~__EXEC_OBJECT_RESERVED; 401 } 402 403 static int 404 eb_validate_vma(struct i915_execbuffer *eb, 405 struct drm_i915_gem_exec_object2 *entry, 406 struct i915_vma *vma) 407 { 408 if (unlikely(entry->flags & eb->invalid_flags)) 409 return -EINVAL; 410 411 if (unlikely(entry->alignment && !is_power_of_2(entry->alignment))) 412 return -EINVAL; 413 414 /* 415 * Offset can be used as input (EXEC_OBJECT_PINNED), reject 416 * any non-page-aligned or non-canonical addresses. 417 */ 418 if (unlikely(entry->flags & EXEC_OBJECT_PINNED && 419 entry->offset != gen8_canonical_addr(entry->offset & LINUX_PAGE_MASK))) 420 return -EINVAL; 421 422 /* pad_to_size was once a reserved field, so sanitize it */ 423 if (entry->flags & EXEC_OBJECT_PAD_TO_SIZE) { 424 if (unlikely(offset_in_page(entry->pad_to_size))) 425 return -EINVAL; 426 } else { 427 entry->pad_to_size = 0; 428 } 429 430 if (unlikely(vma->exec_flags)) { 431 DRM_DEBUG("Object [handle %d, index %d] appears more than once in object list\n", 432 entry->handle, (int)(entry - eb->exec)); 433 return -EINVAL; 434 } 435 436 /* 437 * From drm_mm perspective address space is continuous, 438 * so from this point we're always using non-canonical 439 * form internally. 440 */ 441 entry->offset = gen8_noncanonical_addr(entry->offset); 442 443 if (!eb->reloc_cache.has_fence) { 444 entry->flags &= ~EXEC_OBJECT_NEEDS_FENCE; 445 } else { 446 if ((entry->flags & EXEC_OBJECT_NEEDS_FENCE || 447 eb->reloc_cache.needs_unfenced) && 448 i915_gem_object_is_tiled(vma->obj)) 449 entry->flags |= EXEC_OBJECT_NEEDS_GTT | __EXEC_OBJECT_NEEDS_MAP; 450 } 451 452 if (!(entry->flags & EXEC_OBJECT_PINNED)) 453 entry->flags |= eb->context_flags; 454 455 return 0; 456 } 457 458 static int 459 eb_add_vma(struct i915_execbuffer *eb, unsigned int i, struct i915_vma *vma) 460 { 461 struct drm_i915_gem_exec_object2 *entry = &eb->exec[i]; 462 int err; 463 464 GEM_BUG_ON(i915_vma_is_closed(vma)); 465 466 if (!(eb->args->flags & __EXEC_VALIDATED)) { 467 err = eb_validate_vma(eb, entry, vma); 468 if (unlikely(err)) 469 return err; 470 } 471 472 if (eb->lut_size > 0) { 473 vma->exec_handle = entry->handle; 474 hlist_add_head(&vma->exec_node, 475 &eb->buckets[hash_32(entry->handle, 476 eb->lut_size)]); 477 } 478 479 if (entry->relocation_count) 480 list_add_tail(&vma->reloc_link, &eb->relocs); 481 482 /* 483 * Stash a pointer from the vma to execobj, so we can query its flags, 484 * size, alignment etc as provided by the user. Also we stash a pointer 485 * to the vma inside the execobj so that we can use a direct lookup 486 * to find the right target VMA when doing relocations. 487 */ 488 eb->vma[i] = vma; 489 eb->flags[i] = entry->flags; 490 vma->exec_flags = &eb->flags[i]; 491 492 err = 0; 493 if (eb_pin_vma(eb, entry, vma)) { 494 if (entry->offset != vma->node.start) { 495 entry->offset = vma->node.start | UPDATE; 496 eb->args->flags |= __EXEC_HAS_RELOC; 497 } 498 } else { 499 eb_unreserve_vma(vma, vma->exec_flags); 500 501 list_add_tail(&vma->exec_link, &eb->unbound); 502 if (drm_mm_node_allocated(&vma->node)) 503 err = i915_vma_unbind(vma); 504 if (unlikely(err)) 505 vma->exec_flags = NULL; 506 } 507 return err; 508 } 509 510 static inline int use_cpu_reloc(const struct reloc_cache *cache, 511 const struct drm_i915_gem_object *obj) 512 { 513 if (!i915_gem_object_has_struct_page(obj)) 514 return false; 515 516 if (DBG_FORCE_RELOC == FORCE_CPU_RELOC) 517 return true; 518 519 if (DBG_FORCE_RELOC == FORCE_GTT_RELOC) 520 return false; 521 522 return (cache->has_llc || 523 obj->cache_dirty || 524 obj->cache_level != I915_CACHE_NONE); 525 } 526 527 static int eb_reserve_vma(const struct i915_execbuffer *eb, 528 struct i915_vma *vma) 529 { 530 struct drm_i915_gem_exec_object2 *entry = exec_entry(eb, vma); 531 unsigned int exec_flags = *vma->exec_flags; 532 u64 pin_flags; 533 int err; 534 535 pin_flags = PIN_USER | PIN_NONBLOCK; 536 if (exec_flags & EXEC_OBJECT_NEEDS_GTT) 537 pin_flags |= PIN_GLOBAL; 538 539 /* 540 * Wa32bitGeneralStateOffset & Wa32bitInstructionBaseOffset, 541 * limit address to the first 4GBs for unflagged objects. 542 */ 543 if (!(exec_flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS)) 544 pin_flags |= PIN_ZONE_4G; 545 546 if (exec_flags & __EXEC_OBJECT_NEEDS_MAP) 547 pin_flags |= PIN_MAPPABLE; 548 549 if (exec_flags & EXEC_OBJECT_PINNED) { 550 pin_flags |= entry->offset | PIN_OFFSET_FIXED; 551 pin_flags &= ~PIN_NONBLOCK; /* force overlapping checks */ 552 } else if (exec_flags & __EXEC_OBJECT_NEEDS_BIAS) { 553 pin_flags |= BATCH_OFFSET_BIAS | PIN_OFFSET_BIAS; 554 } 555 556 err = i915_vma_pin(vma, 557 entry->pad_to_size, entry->alignment, 558 pin_flags); 559 if (err) 560 return err; 561 562 if (entry->offset != vma->node.start) { 563 entry->offset = vma->node.start | UPDATE; 564 eb->args->flags |= __EXEC_HAS_RELOC; 565 } 566 567 if (unlikely(exec_flags & EXEC_OBJECT_NEEDS_FENCE)) { 568 err = i915_vma_pin_fence(vma); 569 if (unlikely(err)) { 570 i915_vma_unpin(vma); 571 return err; 572 } 573 574 if (vma->fence) 575 exec_flags |= __EXEC_OBJECT_HAS_FENCE; 576 } 577 578 *vma->exec_flags = exec_flags | __EXEC_OBJECT_HAS_PIN; 579 GEM_BUG_ON(eb_vma_misplaced(entry, vma, exec_flags)); 580 581 return 0; 582 } 583 584 static int eb_reserve(struct i915_execbuffer *eb) 585 { 586 const unsigned int count = eb->buffer_count; 587 struct list_head last; 588 struct i915_vma *vma; 589 unsigned int i, pass; 590 int err; 591 592 /* 593 * Attempt to pin all of the buffers into the GTT. 594 * This is done in 3 phases: 595 * 596 * 1a. Unbind all objects that do not match the GTT constraints for 597 * the execbuffer (fenceable, mappable, alignment etc). 598 * 1b. Increment pin count for already bound objects. 599 * 2. Bind new objects. 600 * 3. Decrement pin count. 601 * 602 * This avoid unnecessary unbinding of later objects in order to make 603 * room for the earlier objects *unless* we need to defragment. 604 */ 605 606 pass = 0; 607 err = 0; 608 do { 609 list_for_each_entry(vma, &eb->unbound, exec_link) { 610 err = eb_reserve_vma(eb, vma); 611 if (err) 612 break; 613 } 614 if (err != -ENOSPC) 615 return err; 616 617 /* Resort *all* the objects into priority order */ 618 INIT_LIST_HEAD(&eb->unbound); 619 INIT_LIST_HEAD(&last); 620 for (i = 0; i < count; i++) { 621 unsigned int flags = eb->flags[i]; 622 struct i915_vma *vma = eb->vma[i]; 623 624 if (flags & EXEC_OBJECT_PINNED && 625 flags & __EXEC_OBJECT_HAS_PIN) 626 continue; 627 628 eb_unreserve_vma(vma, &eb->flags[i]); 629 630 if (flags & EXEC_OBJECT_PINNED) 631 list_add(&vma->exec_link, &eb->unbound); 632 else if (flags & __EXEC_OBJECT_NEEDS_MAP) 633 list_add_tail(&vma->exec_link, &eb->unbound); 634 else 635 list_add_tail(&vma->exec_link, &last); 636 } 637 list_splice_tail(&last, &eb->unbound); 638 639 switch (pass++) { 640 case 0: 641 break; 642 643 case 1: 644 /* Too fragmented, unbind everything and retry */ 645 err = i915_gem_evict_vm(eb->vm); 646 if (err) 647 return err; 648 break; 649 650 default: 651 return -ENOSPC; 652 } 653 } while (1); 654 } 655 656 static unsigned int eb_batch_index(const struct i915_execbuffer *eb) 657 { 658 if (eb->args->flags & I915_EXEC_BATCH_FIRST) 659 return 0; 660 else 661 return eb->buffer_count - 1; 662 } 663 664 static int eb_select_context(struct i915_execbuffer *eb) 665 { 666 struct i915_gem_context *ctx; 667 668 ctx = i915_gem_context_lookup(eb->file->driver_priv, eb->args->rsvd1); 669 if (unlikely(!ctx)) 670 return -ENOENT; 671 672 eb->ctx = ctx; 673 eb->vm = ctx->ppgtt ? &ctx->ppgtt->base : &eb->i915->ggtt.base; 674 675 eb->context_flags = 0; 676 if (ctx->flags & CONTEXT_NO_ZEROMAP) 677 eb->context_flags |= __EXEC_OBJECT_NEEDS_BIAS; 678 679 return 0; 680 } 681 682 static int eb_lookup_vmas(struct i915_execbuffer *eb) 683 { 684 struct radix_tree_root *handles_vma = &eb->ctx->handles_vma; 685 struct drm_i915_gem_object *obj; 686 unsigned int i; 687 int err; 688 689 if (unlikely(i915_gem_context_is_closed(eb->ctx))) 690 return -ENOENT; 691 692 if (unlikely(i915_gem_context_is_banned(eb->ctx))) 693 return -EIO; 694 695 INIT_LIST_HEAD(&eb->relocs); 696 INIT_LIST_HEAD(&eb->unbound); 697 698 for (i = 0; i < eb->buffer_count; i++) { 699 u32 handle = eb->exec[i].handle; 700 struct i915_lut_handle *lut; 701 struct i915_vma *vma; 702 703 vma = radix_tree_lookup(handles_vma, handle); 704 if (likely(vma)) 705 goto add_vma; 706 707 obj = i915_gem_object_lookup(eb->file, handle); 708 if (unlikely(!obj)) { 709 err = -ENOENT; 710 goto err_vma; 711 } 712 713 vma = i915_vma_instance(obj, eb->vm, NULL); 714 if (unlikely(IS_ERR(vma))) { 715 err = PTR_ERR(vma); 716 goto err_obj; 717 } 718 719 lut = kmem_cache_alloc(eb->i915->luts, GFP_KERNEL); 720 if (unlikely(!lut)) { 721 err = -ENOMEM; 722 goto err_obj; 723 } 724 725 err = radix_tree_insert(handles_vma, handle, vma); 726 if (unlikely(err)) { 727 kfree(lut); 728 goto err_obj; 729 } 730 731 /* transfer ref to ctx */ 732 vma->open_count++; 733 list_add(&lut->obj_link, &obj->lut_list); 734 list_add(&lut->ctx_link, &eb->ctx->handles_list); 735 lut->ctx = eb->ctx; 736 lut->handle = handle; 737 738 add_vma: 739 err = eb_add_vma(eb, i, vma); 740 if (unlikely(err)) 741 goto err_vma; 742 743 GEM_BUG_ON(vma != eb->vma[i]); 744 GEM_BUG_ON(vma->exec_flags != &eb->flags[i]); 745 } 746 747 /* take note of the batch buffer before we might reorder the lists */ 748 i = eb_batch_index(eb); 749 eb->batch = eb->vma[i]; 750 GEM_BUG_ON(eb->batch->exec_flags != &eb->flags[i]); 751 752 /* 753 * SNA is doing fancy tricks with compressing batch buffers, which leads 754 * to negative relocation deltas. Usually that works out ok since the 755 * relocate address is still positive, except when the batch is placed 756 * very low in the GTT. Ensure this doesn't happen. 757 * 758 * Note that actual hangs have only been observed on gen7, but for 759 * paranoia do it everywhere. 760 */ 761 if (!(eb->flags[i] & EXEC_OBJECT_PINNED)) 762 eb->flags[i] |= __EXEC_OBJECT_NEEDS_BIAS; 763 if (eb->reloc_cache.has_fence) 764 eb->flags[i] |= EXEC_OBJECT_NEEDS_FENCE; 765 766 eb->args->flags |= __EXEC_VALIDATED; 767 return eb_reserve(eb); 768 769 err_obj: 770 i915_gem_object_put(obj); 771 err_vma: 772 eb->vma[i] = NULL; 773 return err; 774 } 775 776 static struct i915_vma * 777 eb_get_vma(const struct i915_execbuffer *eb, unsigned long handle) 778 { 779 if (eb->lut_size < 0) { 780 if (handle >= -eb->lut_size) 781 return NULL; 782 return eb->vma[handle]; 783 } else { 784 struct hlist_head *head; 785 struct i915_vma *vma; 786 787 head = &eb->buckets[hash_32(handle, eb->lut_size)]; 788 hlist_for_each_entry(vma, head, exec_node) { 789 if (vma->exec_handle == handle) 790 return vma; 791 } 792 return NULL; 793 } 794 } 795 796 static void eb_release_vmas(const struct i915_execbuffer *eb) 797 { 798 const unsigned int count = eb->buffer_count; 799 unsigned int i; 800 801 for (i = 0; i < count; i++) { 802 struct i915_vma *vma = eb->vma[i]; 803 unsigned int flags = eb->flags[i]; 804 805 if (!vma) 806 break; 807 808 GEM_BUG_ON(vma->exec_flags != &eb->flags[i]); 809 vma->exec_flags = NULL; 810 eb->vma[i] = NULL; 811 812 if (flags & __EXEC_OBJECT_HAS_PIN) 813 __eb_unreserve_vma(vma, flags); 814 815 if (flags & __EXEC_OBJECT_HAS_REF) 816 i915_vma_put(vma); 817 } 818 } 819 820 static void eb_reset_vmas(const struct i915_execbuffer *eb) 821 { 822 eb_release_vmas(eb); 823 if (eb->lut_size > 0) 824 memset(eb->buckets, 0, 825 sizeof(struct hlist_head) << eb->lut_size); 826 } 827 828 static void eb_destroy(const struct i915_execbuffer *eb) 829 { 830 GEM_BUG_ON(eb->reloc_cache.rq); 831 832 if (eb->lut_size > 0) 833 kfree(eb->buckets); 834 } 835 836 static inline u64 837 relocation_target(const struct drm_i915_gem_relocation_entry *reloc, 838 const struct i915_vma *target) 839 { 840 return gen8_canonical_addr((int)reloc->delta + target->node.start); 841 } 842 843 static void reloc_cache_init(struct reloc_cache *cache, 844 struct drm_i915_private *i915) 845 { 846 cache->page = -1; 847 cache->vaddr = 0; 848 /* Must be a variable in the struct to allow GCC to unroll. */ 849 cache->gen = INTEL_GEN(i915); 850 cache->has_llc = HAS_LLC(i915); 851 cache->use_64bit_reloc = HAS_64BIT_RELOC(i915); 852 cache->has_fence = cache->gen < 4; 853 cache->needs_unfenced = INTEL_INFO(i915)->unfenced_needs_alignment; 854 cache->node.allocated = false; 855 cache->rq = NULL; 856 cache->rq_size = 0; 857 } 858 859 static inline void *unmask_page(unsigned long p) 860 { 861 return (void *)(uintptr_t)(p & LINUX_PAGE_MASK); 862 } 863 864 static inline unsigned int unmask_flags(unsigned long p) 865 { 866 return p & ~LINUX_PAGE_MASK; 867 } 868 869 #define KMAP 0x4 /* after CLFLUSH_FLAGS */ 870 871 static inline struct i915_ggtt *cache_to_ggtt(struct reloc_cache *cache) 872 { 873 struct drm_i915_private *i915 = 874 container_of(cache, struct i915_execbuffer, reloc_cache)->i915; 875 return &i915->ggtt; 876 } 877 878 static void reloc_gpu_flush(struct reloc_cache *cache) 879 { 880 GEM_BUG_ON(cache->rq_size >= cache->rq->batch->obj->base.size / sizeof(u32)); 881 cache->rq_cmd[cache->rq_size] = MI_BATCH_BUFFER_END; 882 i915_gem_object_unpin_map(cache->rq->batch->obj); 883 i915_gem_chipset_flush(cache->rq->i915); 884 885 __i915_add_request(cache->rq, true); 886 cache->rq = NULL; 887 } 888 889 static void reloc_cache_reset(struct reloc_cache *cache) 890 { 891 void *vaddr; 892 893 if (cache->rq) 894 reloc_gpu_flush(cache); 895 896 if (!cache->vaddr) 897 return; 898 899 vaddr = unmask_page(cache->vaddr); 900 if (cache->vaddr & KMAP) { 901 if (cache->vaddr & CLFLUSH_AFTER) 902 mb(); 903 904 kunmap_atomic(vaddr); 905 i915_gem_obj_finish_shmem_access((struct drm_i915_gem_object *)cache->node.mm); 906 } else { 907 wmb(); 908 io_mapping_unmap_atomic((void __iomem *)vaddr); 909 if (cache->node.allocated) { 910 struct i915_ggtt *ggtt = cache_to_ggtt(cache); 911 912 ggtt->base.clear_range(&ggtt->base, 913 cache->node.start, 914 cache->node.size); 915 drm_mm_remove_node(&cache->node); 916 } else { 917 i915_vma_unpin((struct i915_vma *)cache->node.mm); 918 } 919 } 920 921 cache->vaddr = 0; 922 cache->page = -1; 923 } 924 925 static void *reloc_kmap(struct drm_i915_gem_object *obj, 926 struct reloc_cache *cache, 927 unsigned long page) 928 { 929 void *vaddr; 930 931 if (cache->vaddr) { 932 kunmap_atomic(unmask_page(cache->vaddr)); 933 } else { 934 unsigned int flushes; 935 int err; 936 937 err = i915_gem_obj_prepare_shmem_write(obj, &flushes); 938 if (err) 939 return ERR_PTR(err); 940 941 BUILD_BUG_ON(KMAP & CLFLUSH_FLAGS); 942 BUILD_BUG_ON((KMAP | CLFLUSH_FLAGS) & LINUX_PAGE_MASK); 943 944 cache->vaddr = flushes | KMAP; 945 cache->node.mm = (void *)obj; 946 if (flushes) 947 mb(); 948 } 949 950 vaddr = kmap_atomic(i915_gem_object_get_dirty_page(obj, page)); 951 cache->vaddr = unmask_flags(cache->vaddr) | (unsigned long)vaddr; 952 cache->page = page; 953 954 return vaddr; 955 } 956 957 static void *reloc_iomap(struct drm_i915_gem_object *obj, 958 struct reloc_cache *cache, 959 unsigned long page) 960 { 961 struct i915_ggtt *ggtt = cache_to_ggtt(cache); 962 unsigned long offset; 963 void *vaddr; 964 965 if (cache->vaddr) { 966 io_mapping_unmap_atomic((void __force __iomem *) unmask_page(cache->vaddr)); 967 } else { 968 struct i915_vma *vma; 969 int err; 970 971 if (use_cpu_reloc(cache, obj)) 972 return NULL; 973 974 err = i915_gem_object_set_to_gtt_domain(obj, true); 975 if (err) 976 return ERR_PTR(err); 977 978 vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, 979 PIN_MAPPABLE | 980 PIN_NONBLOCK | 981 PIN_NONFAULT); 982 if (IS_ERR(vma)) { 983 memset(&cache->node, 0, sizeof(cache->node)); 984 err = drm_mm_insert_node_in_range 985 (&ggtt->base.mm, &cache->node, 986 PAGE_SIZE, 0, I915_COLOR_UNEVICTABLE, 987 0, ggtt->mappable_end, 988 DRM_MM_INSERT_LOW); 989 if (err) /* no inactive aperture space, use cpu reloc */ 990 return NULL; 991 } else { 992 err = i915_vma_put_fence(vma); 993 if (err) { 994 i915_vma_unpin(vma); 995 return ERR_PTR(err); 996 } 997 998 cache->node.start = vma->node.start; 999 cache->node.mm = (void *)vma; 1000 } 1001 } 1002 1003 offset = cache->node.start; 1004 if (cache->node.allocated) { 1005 wmb(); 1006 ggtt->base.insert_page(&ggtt->base, 1007 i915_gem_object_get_dma_address(obj, page), 1008 offset, I915_CACHE_NONE, 0); 1009 } else { 1010 offset += page << PAGE_SHIFT; 1011 } 1012 1013 vaddr = (void __force *)io_mapping_map_atomic_wc(&ggtt->mappable, 1014 offset); 1015 cache->page = page; 1016 cache->vaddr = (unsigned long)vaddr; 1017 1018 return vaddr; 1019 } 1020 1021 static void *reloc_vaddr(struct drm_i915_gem_object *obj, 1022 struct reloc_cache *cache, 1023 unsigned long page) 1024 { 1025 void *vaddr; 1026 1027 if (cache->page == page) { 1028 vaddr = unmask_page(cache->vaddr); 1029 } else { 1030 vaddr = NULL; 1031 if ((cache->vaddr & KMAP) == 0) 1032 vaddr = reloc_iomap(obj, cache, page); 1033 if (!vaddr) 1034 vaddr = reloc_kmap(obj, cache, page); 1035 } 1036 1037 return vaddr; 1038 } 1039 1040 static void clflush_write32(u32 *addr, u32 value, unsigned int flushes) 1041 { 1042 if (unlikely(flushes & (CLFLUSH_BEFORE | CLFLUSH_AFTER))) { 1043 if (flushes & CLFLUSH_BEFORE) { 1044 clflushopt(addr); 1045 mb(); 1046 } 1047 1048 *addr = value; 1049 1050 /* 1051 * Writes to the same cacheline are serialised by the CPU 1052 * (including clflush). On the write path, we only require 1053 * that it hits memory in an orderly fashion and place 1054 * mb barriers at the start and end of the relocation phase 1055 * to ensure ordering of clflush wrt to the system. 1056 */ 1057 if (flushes & CLFLUSH_AFTER) 1058 clflushopt(addr); 1059 } else 1060 *addr = value; 1061 } 1062 1063 static int __reloc_gpu_alloc(struct i915_execbuffer *eb, 1064 struct i915_vma *vma, 1065 unsigned int len) 1066 { 1067 struct reloc_cache *cache = &eb->reloc_cache; 1068 struct drm_i915_gem_object *obj; 1069 struct drm_i915_gem_request *rq; 1070 struct i915_vma *batch; 1071 u32 *cmd; 1072 int err; 1073 1074 GEM_BUG_ON(vma->obj->base.write_domain & I915_GEM_DOMAIN_CPU); 1075 1076 obj = i915_gem_batch_pool_get(&eb->engine->batch_pool, PAGE_SIZE); 1077 if (IS_ERR(obj)) 1078 return PTR_ERR(obj); 1079 1080 cmd = i915_gem_object_pin_map(obj, 1081 cache->has_llc ? 1082 I915_MAP_FORCE_WB : 1083 I915_MAP_FORCE_WC); 1084 i915_gem_object_unpin_pages(obj); 1085 if (IS_ERR(cmd)) 1086 return PTR_ERR(cmd); 1087 1088 err = i915_gem_object_set_to_wc_domain(obj, false); 1089 if (err) 1090 goto err_unmap; 1091 1092 batch = i915_vma_instance(obj, vma->vm, NULL); 1093 if (IS_ERR(batch)) { 1094 err = PTR_ERR(batch); 1095 goto err_unmap; 1096 } 1097 1098 err = i915_vma_pin(batch, 0, 0, PIN_USER | PIN_NONBLOCK); 1099 if (err) 1100 goto err_unmap; 1101 1102 rq = i915_gem_request_alloc(eb->engine, eb->ctx); 1103 if (IS_ERR(rq)) { 1104 err = PTR_ERR(rq); 1105 goto err_unpin; 1106 } 1107 1108 err = i915_gem_request_await_object(rq, vma->obj, true); 1109 if (err) 1110 goto err_request; 1111 1112 err = eb->engine->emit_flush(rq, EMIT_INVALIDATE); 1113 if (err) 1114 goto err_request; 1115 1116 err = i915_switch_context(rq); 1117 if (err) 1118 goto err_request; 1119 1120 err = eb->engine->emit_bb_start(rq, 1121 batch->node.start, PAGE_SIZE, 1122 cache->gen > 5 ? 0 : I915_DISPATCH_SECURE); 1123 if (err) 1124 goto err_request; 1125 1126 GEM_BUG_ON(!reservation_object_test_signaled_rcu(batch->resv, true)); 1127 i915_vma_move_to_active(batch, rq, 0); 1128 reservation_object_lock(batch->resv, NULL); 1129 reservation_object_add_excl_fence(batch->resv, &rq->fence); 1130 reservation_object_unlock(batch->resv); 1131 i915_vma_unpin(batch); 1132 1133 i915_vma_move_to_active(vma, rq, EXEC_OBJECT_WRITE); 1134 reservation_object_lock(vma->resv, NULL); 1135 reservation_object_add_excl_fence(vma->resv, &rq->fence); 1136 reservation_object_unlock(vma->resv); 1137 1138 rq->batch = batch; 1139 1140 cache->rq = rq; 1141 cache->rq_cmd = cmd; 1142 cache->rq_size = 0; 1143 1144 /* Return with batch mapping (cmd) still pinned */ 1145 return 0; 1146 1147 err_request: 1148 i915_add_request(rq); 1149 err_unpin: 1150 i915_vma_unpin(batch); 1151 err_unmap: 1152 i915_gem_object_unpin_map(obj); 1153 return err; 1154 } 1155 1156 static u32 *reloc_gpu(struct i915_execbuffer *eb, 1157 struct i915_vma *vma, 1158 unsigned int len) 1159 { 1160 struct reloc_cache *cache = &eb->reloc_cache; 1161 u32 *cmd; 1162 1163 if (cache->rq_size > PAGE_SIZE/sizeof(u32) - (len + 1)) 1164 reloc_gpu_flush(cache); 1165 1166 if (unlikely(!cache->rq)) { 1167 int err; 1168 1169 /* If we need to copy for the cmdparser, we will stall anyway */ 1170 if (eb_use_cmdparser(eb)) 1171 return ERR_PTR(-EWOULDBLOCK); 1172 1173 if (!intel_engine_can_store_dword(eb->engine)) 1174 return ERR_PTR(-ENODEV); 1175 1176 err = __reloc_gpu_alloc(eb, vma, len); 1177 if (unlikely(err)) 1178 return ERR_PTR(err); 1179 } 1180 1181 cmd = cache->rq_cmd + cache->rq_size; 1182 cache->rq_size += len; 1183 1184 return cmd; 1185 } 1186 1187 static u64 1188 relocate_entry(struct i915_vma *vma, 1189 const struct drm_i915_gem_relocation_entry *reloc, 1190 struct i915_execbuffer *eb, 1191 const struct i915_vma *target) 1192 { 1193 u64 offset = reloc->offset; 1194 u64 target_offset = relocation_target(reloc, target); 1195 bool wide = eb->reloc_cache.use_64bit_reloc; 1196 void *vaddr; 1197 1198 if (!eb->reloc_cache.vaddr && 1199 (DBG_FORCE_RELOC == FORCE_GPU_RELOC || 1200 !reservation_object_test_signaled_rcu(vma->resv, true))) { 1201 const unsigned int gen = eb->reloc_cache.gen; 1202 unsigned int len; 1203 u32 *batch; 1204 u64 addr; 1205 1206 if (wide) 1207 len = offset & 7 ? 8 : 5; 1208 else if (gen >= 4) 1209 len = 4; 1210 else 1211 len = 3; 1212 1213 batch = reloc_gpu(eb, vma, len); 1214 if (IS_ERR(batch)) 1215 goto repeat; 1216 1217 addr = gen8_canonical_addr(vma->node.start + offset); 1218 if (wide) { 1219 if (offset & 7) { 1220 *batch++ = MI_STORE_DWORD_IMM_GEN4; 1221 *batch++ = lower_32_bits(addr); 1222 *batch++ = upper_32_bits(addr); 1223 *batch++ = lower_32_bits(target_offset); 1224 1225 addr = gen8_canonical_addr(addr + 4); 1226 1227 *batch++ = MI_STORE_DWORD_IMM_GEN4; 1228 *batch++ = lower_32_bits(addr); 1229 *batch++ = upper_32_bits(addr); 1230 *batch++ = upper_32_bits(target_offset); 1231 } else { 1232 *batch++ = (MI_STORE_DWORD_IMM_GEN4 | (1 << 21)) + 1; 1233 *batch++ = lower_32_bits(addr); 1234 *batch++ = upper_32_bits(addr); 1235 *batch++ = lower_32_bits(target_offset); 1236 *batch++ = upper_32_bits(target_offset); 1237 } 1238 } else if (gen >= 6) { 1239 *batch++ = MI_STORE_DWORD_IMM_GEN4; 1240 *batch++ = 0; 1241 *batch++ = addr; 1242 *batch++ = target_offset; 1243 } else if (gen >= 4) { 1244 *batch++ = MI_STORE_DWORD_IMM_GEN4 | MI_USE_GGTT; 1245 *batch++ = 0; 1246 *batch++ = addr; 1247 *batch++ = target_offset; 1248 } else { 1249 *batch++ = MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL; 1250 *batch++ = addr; 1251 *batch++ = target_offset; 1252 } 1253 1254 goto out; 1255 } 1256 1257 repeat: 1258 vaddr = reloc_vaddr(vma->obj, &eb->reloc_cache, offset >> PAGE_SHIFT); 1259 if (IS_ERR(vaddr)) 1260 return PTR_ERR(vaddr); 1261 1262 clflush_write32(vaddr + offset_in_page(offset), 1263 lower_32_bits(target_offset), 1264 eb->reloc_cache.vaddr); 1265 1266 if (wide) { 1267 offset += sizeof(u32); 1268 target_offset >>= 32; 1269 wide = false; 1270 goto repeat; 1271 } 1272 1273 out: 1274 return target->node.start | UPDATE; 1275 } 1276 1277 static u64 1278 eb_relocate_entry(struct i915_execbuffer *eb, 1279 struct i915_vma *vma, 1280 const struct drm_i915_gem_relocation_entry *reloc) 1281 { 1282 struct i915_vma *target; 1283 int err; 1284 1285 /* we've already hold a reference to all valid objects */ 1286 target = eb_get_vma(eb, reloc->target_handle); 1287 if (unlikely(!target)) 1288 return -ENOENT; 1289 1290 /* Validate that the target is in a valid r/w GPU domain */ 1291 if (unlikely(reloc->write_domain & (reloc->write_domain - 1))) { 1292 DRM_DEBUG("reloc with multiple write domains: " 1293 "target %d offset %d " 1294 "read %08x write %08x", 1295 reloc->target_handle, 1296 (int) reloc->offset, 1297 reloc->read_domains, 1298 reloc->write_domain); 1299 return -EINVAL; 1300 } 1301 if (unlikely((reloc->write_domain | reloc->read_domains) 1302 & ~I915_GEM_GPU_DOMAINS)) { 1303 DRM_DEBUG("reloc with read/write non-GPU domains: " 1304 "target %d offset %d " 1305 "read %08x write %08x", 1306 reloc->target_handle, 1307 (int) reloc->offset, 1308 reloc->read_domains, 1309 reloc->write_domain); 1310 return -EINVAL; 1311 } 1312 1313 if (reloc->write_domain) { 1314 *target->exec_flags |= EXEC_OBJECT_WRITE; 1315 1316 /* 1317 * Sandybridge PPGTT errata: We need a global gtt mapping 1318 * for MI and pipe_control writes because the gpu doesn't 1319 * properly redirect them through the ppgtt for non_secure 1320 * batchbuffers. 1321 */ 1322 if (reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION && 1323 IS_GEN6(eb->i915)) { 1324 err = i915_vma_bind(target, target->obj->cache_level, 1325 PIN_GLOBAL); 1326 if (WARN_ONCE(err, 1327 "Unexpected failure to bind target VMA!")) 1328 return err; 1329 } 1330 } 1331 1332 /* 1333 * If the relocation already has the right value in it, no 1334 * more work needs to be done. 1335 */ 1336 if (!DBG_FORCE_RELOC && 1337 gen8_canonical_addr(target->node.start) == reloc->presumed_offset) 1338 return 0; 1339 1340 /* Check that the relocation address is valid... */ 1341 if (unlikely(reloc->offset > 1342 vma->size - (eb->reloc_cache.use_64bit_reloc ? 8 : 4))) { 1343 DRM_DEBUG("Relocation beyond object bounds: " 1344 "target %d offset %d size %d.\n", 1345 reloc->target_handle, 1346 (int)reloc->offset, 1347 (int)vma->size); 1348 return -EINVAL; 1349 } 1350 if (unlikely(reloc->offset & 3)) { 1351 DRM_DEBUG("Relocation not 4-byte aligned: " 1352 "target %d offset %d.\n", 1353 reloc->target_handle, 1354 (int)reloc->offset); 1355 return -EINVAL; 1356 } 1357 1358 /* 1359 * If we write into the object, we need to force the synchronisation 1360 * barrier, either with an asynchronous clflush or if we executed the 1361 * patching using the GPU (though that should be serialised by the 1362 * timeline). To be completely sure, and since we are required to 1363 * do relocations we are already stalling, disable the user's opt 1364 * out of our synchronisation. 1365 */ 1366 *vma->exec_flags &= ~EXEC_OBJECT_ASYNC; 1367 1368 /* and update the user's relocation entry */ 1369 return relocate_entry(vma, reloc, eb, target); 1370 } 1371 1372 static int eb_relocate_vma(struct i915_execbuffer *eb, struct i915_vma *vma) 1373 { 1374 #define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry)) 1375 struct drm_i915_gem_relocation_entry stack[N_RELOC(512)]; 1376 struct drm_i915_gem_relocation_entry __user *urelocs; 1377 const struct drm_i915_gem_exec_object2 *entry = exec_entry(eb, vma); 1378 unsigned int remain; 1379 1380 urelocs = u64_to_user_ptr(entry->relocs_ptr); 1381 remain = entry->relocation_count; 1382 if (unlikely(remain > N_RELOC(ULONG_MAX))) 1383 return -EINVAL; 1384 1385 /* 1386 * We must check that the entire relocation array is safe 1387 * to read. However, if the array is not writable the user loses 1388 * the updated relocation values. 1389 */ 1390 #if 0 1391 if (unlikely(!access_ok(VERIFY_READ, urelocs, remain*sizeof(*urelocs)))) 1392 return -EFAULT; 1393 #endif 1394 1395 do { 1396 struct drm_i915_gem_relocation_entry *r = stack; 1397 unsigned int count = 1398 min_t(unsigned int, remain, ARRAY_SIZE(stack)); 1399 unsigned int copied; 1400 1401 /* 1402 * This is the fast path and we cannot handle a pagefault 1403 * whilst holding the struct mutex lest the user pass in the 1404 * relocations contained within a mmaped bo. For in such a case 1405 * we, the page fault handler would call i915_gem_fault() and 1406 * we would try to acquire the struct mutex again. Obviously 1407 * this is bad and so lockdep complains vehemently. 1408 */ 1409 pagefault_disable(); 1410 copied = __copy_from_user_inatomic(r, urelocs, count * sizeof(r[0])); 1411 pagefault_enable(); 1412 if (unlikely(copied)) { 1413 remain = -EFAULT; 1414 goto out; 1415 } 1416 1417 remain -= count; 1418 do { 1419 u64 offset = eb_relocate_entry(eb, vma, r); 1420 1421 if (likely(offset == 0)) { 1422 } else if ((s64)offset < 0) { 1423 remain = (int)offset; 1424 goto out; 1425 } else { 1426 /* 1427 * Note that reporting an error now 1428 * leaves everything in an inconsistent 1429 * state as we have *already* changed 1430 * the relocation value inside the 1431 * object. As we have not changed the 1432 * reloc.presumed_offset or will not 1433 * change the execobject.offset, on the 1434 * call we may not rewrite the value 1435 * inside the object, leaving it 1436 * dangling and causing a GPU hang. Unless 1437 * userspace dynamically rebuilds the 1438 * relocations on each execbuf rather than 1439 * presume a static tree. 1440 * 1441 * We did previously check if the relocations 1442 * were writable (access_ok), an error now 1443 * would be a strange race with mprotect, 1444 * having already demonstrated that we 1445 * can read from this userspace address. 1446 */ 1447 offset = gen8_canonical_addr(offset & ~UPDATE); 1448 __put_user(offset, 1449 &urelocs[r-stack].presumed_offset); 1450 } 1451 } while (r++, --count); 1452 urelocs += ARRAY_SIZE(stack); 1453 } while (remain); 1454 out: 1455 reloc_cache_reset(&eb->reloc_cache); 1456 return remain; 1457 } 1458 1459 static int 1460 eb_relocate_vma_slow(struct i915_execbuffer *eb, struct i915_vma *vma) 1461 { 1462 const struct drm_i915_gem_exec_object2 *entry = exec_entry(eb, vma); 1463 struct drm_i915_gem_relocation_entry *relocs = 1464 u64_to_ptr(typeof(*relocs), entry->relocs_ptr); 1465 unsigned int i; 1466 int err; 1467 1468 for (i = 0; i < entry->relocation_count; i++) { 1469 u64 offset = eb_relocate_entry(eb, vma, &relocs[i]); 1470 1471 if ((s64)offset < 0) { 1472 err = (int)offset; 1473 goto err; 1474 } 1475 } 1476 err = 0; 1477 err: 1478 reloc_cache_reset(&eb->reloc_cache); 1479 return err; 1480 } 1481 1482 static int check_relocations(const struct drm_i915_gem_exec_object2 *entry) 1483 { 1484 const char __user *addr, *end; 1485 unsigned long size; 1486 char __maybe_unused c; 1487 1488 size = entry->relocation_count; 1489 if (size == 0) 1490 return 0; 1491 1492 if (size > N_RELOC(ULONG_MAX)) 1493 return -EINVAL; 1494 1495 addr = u64_to_user_ptr(entry->relocs_ptr); 1496 size *= sizeof(struct drm_i915_gem_relocation_entry); 1497 #if 0 1498 if (!access_ok(VERIFY_READ, addr, size)) 1499 return -EFAULT; 1500 #endif 1501 1502 end = addr + size; 1503 for (; addr < end; addr += PAGE_SIZE) { 1504 int err = __get_user(c, addr); 1505 if (err) 1506 return err; 1507 } 1508 return __get_user(c, end - 1); 1509 } 1510 1511 static int eb_copy_relocations(const struct i915_execbuffer *eb) 1512 { 1513 const unsigned int count = eb->buffer_count; 1514 unsigned int i; 1515 int err; 1516 1517 for (i = 0; i < count; i++) { 1518 const unsigned int nreloc = eb->exec[i].relocation_count; 1519 struct drm_i915_gem_relocation_entry __user *urelocs; 1520 struct drm_i915_gem_relocation_entry *relocs; 1521 unsigned long size; 1522 unsigned long copied; 1523 1524 if (nreloc == 0) 1525 continue; 1526 1527 err = check_relocations(&eb->exec[i]); 1528 if (err) 1529 goto err; 1530 1531 urelocs = u64_to_user_ptr(eb->exec[i].relocs_ptr); 1532 size = nreloc * sizeof(*relocs); 1533 1534 relocs = kvmalloc_array(size, 1, GFP_KERNEL); 1535 if (!relocs) { 1536 kvfree(relocs); 1537 err = -ENOMEM; 1538 goto err; 1539 } 1540 1541 /* copy_from_user is limited to < 4GiB */ 1542 copied = 0; 1543 do { 1544 unsigned int len = 1545 min_t(u64, BIT_ULL(31), size - copied); 1546 1547 if (__copy_from_user((char *)relocs + copied, 1548 (char __user *)urelocs + copied, 1549 len)) { 1550 kvfree(relocs); 1551 err = -EFAULT; 1552 goto err; 1553 } 1554 1555 copied += len; 1556 } while (copied < size); 1557 1558 /* 1559 * As we do not update the known relocation offsets after 1560 * relocating (due to the complexities in lock handling), 1561 * we need to mark them as invalid now so that we force the 1562 * relocation processing next time. Just in case the target 1563 * object is evicted and then rebound into its old 1564 * presumed_offset before the next execbuffer - if that 1565 * happened we would make the mistake of assuming that the 1566 * relocations were valid. 1567 */ 1568 user_access_begin(); 1569 for (copied = 0; copied < nreloc; copied++) 1570 unsafe_put_user(-1, 1571 &urelocs[copied].presumed_offset, 1572 end_user); 1573 end_user: 1574 user_access_end(); 1575 1576 eb->exec[i].relocs_ptr = (uintptr_t)relocs; 1577 } 1578 1579 return 0; 1580 1581 err: 1582 while (i--) { 1583 struct drm_i915_gem_relocation_entry *relocs = 1584 u64_to_ptr(typeof(*relocs), eb->exec[i].relocs_ptr); 1585 if (eb->exec[i].relocation_count) 1586 kvfree(relocs); 1587 } 1588 return err; 1589 } 1590 1591 static int eb_prefault_relocations(const struct i915_execbuffer *eb) 1592 { 1593 const unsigned int count = eb->buffer_count; 1594 unsigned int i; 1595 1596 if (unlikely(i915_modparams.prefault_disable)) 1597 return 0; 1598 1599 for (i = 0; i < count; i++) { 1600 int err; 1601 1602 err = check_relocations(&eb->exec[i]); 1603 if (err) 1604 return err; 1605 } 1606 1607 return 0; 1608 } 1609 1610 static noinline int eb_relocate_slow(struct i915_execbuffer *eb) 1611 { 1612 struct drm_device *dev = &eb->i915->drm; 1613 bool have_copy = false; 1614 struct i915_vma *vma; 1615 int err = 0; 1616 1617 repeat: 1618 if (signal_pending(current)) { 1619 err = -ERESTARTSYS; 1620 goto out; 1621 } 1622 1623 /* We may process another execbuffer during the unlock... */ 1624 eb_reset_vmas(eb); 1625 mutex_unlock(&dev->struct_mutex); 1626 1627 /* 1628 * We take 3 passes through the slowpatch. 1629 * 1630 * 1 - we try to just prefault all the user relocation entries and 1631 * then attempt to reuse the atomic pagefault disabled fast path again. 1632 * 1633 * 2 - we copy the user entries to a local buffer here outside of the 1634 * local and allow ourselves to wait upon any rendering before 1635 * relocations 1636 * 1637 * 3 - we already have a local copy of the relocation entries, but 1638 * were interrupted (EAGAIN) whilst waiting for the objects, try again. 1639 */ 1640 if (!err) { 1641 err = eb_prefault_relocations(eb); 1642 } else if (!have_copy) { 1643 err = eb_copy_relocations(eb); 1644 have_copy = err == 0; 1645 } else { 1646 cond_resched(); 1647 err = 0; 1648 } 1649 if (err) { 1650 mutex_lock(&dev->struct_mutex); 1651 goto out; 1652 } 1653 1654 /* A frequent cause for EAGAIN are currently unavailable client pages */ 1655 flush_workqueue(eb->i915->mm.userptr_wq); 1656 1657 err = i915_mutex_lock_interruptible(dev); 1658 if (err) { 1659 mutex_lock(&dev->struct_mutex); 1660 goto out; 1661 } 1662 1663 /* reacquire the objects */ 1664 err = eb_lookup_vmas(eb); 1665 if (err) 1666 goto err; 1667 1668 GEM_BUG_ON(!eb->batch); 1669 1670 list_for_each_entry(vma, &eb->relocs, reloc_link) { 1671 if (!have_copy) { 1672 pagefault_disable(); 1673 err = eb_relocate_vma(eb, vma); 1674 pagefault_enable(); 1675 if (err) 1676 goto repeat; 1677 } else { 1678 err = eb_relocate_vma_slow(eb, vma); 1679 if (err) 1680 goto err; 1681 } 1682 } 1683 1684 /* 1685 * Leave the user relocations as are, this is the painfully slow path, 1686 * and we want to avoid the complication of dropping the lock whilst 1687 * having buffers reserved in the aperture and so causing spurious 1688 * ENOSPC for random operations. 1689 */ 1690 1691 err: 1692 if (err == -EAGAIN) 1693 goto repeat; 1694 1695 out: 1696 if (have_copy) { 1697 const unsigned int count = eb->buffer_count; 1698 unsigned int i; 1699 1700 for (i = 0; i < count; i++) { 1701 const struct drm_i915_gem_exec_object2 *entry = 1702 &eb->exec[i]; 1703 struct drm_i915_gem_relocation_entry *relocs; 1704 1705 if (!entry->relocation_count) 1706 continue; 1707 1708 relocs = u64_to_ptr(typeof(*relocs), entry->relocs_ptr); 1709 kvfree(relocs); 1710 } 1711 } 1712 1713 return err; 1714 } 1715 1716 static int eb_relocate(struct i915_execbuffer *eb) 1717 { 1718 if (eb_lookup_vmas(eb)) 1719 goto slow; 1720 1721 /* The objects are in their final locations, apply the relocations. */ 1722 if (eb->args->flags & __EXEC_HAS_RELOC) { 1723 struct i915_vma *vma; 1724 1725 list_for_each_entry(vma, &eb->relocs, reloc_link) { 1726 if (eb_relocate_vma(eb, vma)) 1727 goto slow; 1728 } 1729 } 1730 1731 return 0; 1732 1733 slow: 1734 return eb_relocate_slow(eb); 1735 } 1736 1737 static void eb_export_fence(struct i915_vma *vma, 1738 struct drm_i915_gem_request *req, 1739 unsigned int flags) 1740 { 1741 struct reservation_object *resv = vma->resv; 1742 1743 /* 1744 * Ignore errors from failing to allocate the new fence, we can't 1745 * handle an error right now. Worst case should be missed 1746 * synchronisation leading to rendering corruption. 1747 */ 1748 reservation_object_lock(resv, NULL); 1749 if (flags & EXEC_OBJECT_WRITE) 1750 reservation_object_add_excl_fence(resv, &req->fence); 1751 else if (reservation_object_reserve_shared(resv) == 0) 1752 reservation_object_add_shared_fence(resv, &req->fence); 1753 reservation_object_unlock(resv); 1754 } 1755 1756 static int eb_move_to_gpu(struct i915_execbuffer *eb) 1757 { 1758 const unsigned int count = eb->buffer_count; 1759 unsigned int i; 1760 int err; 1761 1762 for (i = 0; i < count; i++) { 1763 unsigned int flags = eb->flags[i]; 1764 struct i915_vma *vma = eb->vma[i]; 1765 struct drm_i915_gem_object *obj = vma->obj; 1766 1767 if (flags & EXEC_OBJECT_CAPTURE) { 1768 struct i915_gem_capture_list *capture; 1769 1770 capture = kmalloc(sizeof(*capture), M_DRM, GFP_KERNEL); 1771 if (unlikely(!capture)) 1772 return -ENOMEM; 1773 1774 capture->next = eb->request->capture_list; 1775 capture->vma = eb->vma[i]; 1776 eb->request->capture_list = capture; 1777 } 1778 1779 /* 1780 * If the GPU is not _reading_ through the CPU cache, we need 1781 * to make sure that any writes (both previous GPU writes from 1782 * before a change in snooping levels and normal CPU writes) 1783 * caught in that cache are flushed to main memory. 1784 * 1785 * We want to say 1786 * obj->cache_dirty && 1787 * !(obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_READ) 1788 * but gcc's optimiser doesn't handle that as well and emits 1789 * two jumps instead of one. Maybe one day... 1790 */ 1791 if (unlikely(obj->cache_dirty & ~obj->cache_coherent)) { 1792 if (i915_gem_clflush_object(obj, 0)) 1793 flags &= ~EXEC_OBJECT_ASYNC; 1794 } 1795 1796 if (flags & EXEC_OBJECT_ASYNC) 1797 continue; 1798 1799 err = i915_gem_request_await_object 1800 (eb->request, obj, flags & EXEC_OBJECT_WRITE); 1801 if (err) 1802 return err; 1803 } 1804 1805 for (i = 0; i < count; i++) { 1806 unsigned int flags = eb->flags[i]; 1807 struct i915_vma *vma = eb->vma[i]; 1808 1809 i915_vma_move_to_active(vma, eb->request, flags); 1810 eb_export_fence(vma, eb->request, flags); 1811 1812 __eb_unreserve_vma(vma, flags); 1813 vma->exec_flags = NULL; 1814 1815 if (unlikely(flags & __EXEC_OBJECT_HAS_REF)) 1816 i915_vma_put(vma); 1817 } 1818 eb->exec = NULL; 1819 1820 /* Unconditionally flush any chipset caches (for streaming writes). */ 1821 i915_gem_chipset_flush(eb->i915); 1822 1823 /* Unconditionally invalidate GPU caches and TLBs. */ 1824 return eb->engine->emit_flush(eb->request, EMIT_INVALIDATE); 1825 } 1826 1827 static bool i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec) 1828 { 1829 if (exec->flags & __I915_EXEC_ILLEGAL_FLAGS) 1830 return false; 1831 1832 /* Kernel clipping was a DRI1 misfeature */ 1833 if (!(exec->flags & I915_EXEC_FENCE_ARRAY)) { 1834 if (exec->num_cliprects || exec->cliprects_ptr) 1835 return false; 1836 } 1837 1838 if (exec->DR4 == 0xffffffff) { 1839 DRM_DEBUG("UXA submitting garbage DR4, fixing up\n"); 1840 exec->DR4 = 0; 1841 } 1842 if (exec->DR1 || exec->DR4) 1843 return false; 1844 1845 if ((exec->batch_start_offset | exec->batch_len) & 0x7) 1846 return false; 1847 1848 return true; 1849 } 1850 1851 void i915_vma_move_to_active(struct i915_vma *vma, 1852 struct drm_i915_gem_request *req, 1853 unsigned int flags) 1854 { 1855 struct drm_i915_gem_object *obj = vma->obj; 1856 const unsigned int idx = req->engine->id; 1857 1858 lockdep_assert_held(&req->i915->drm.struct_mutex); 1859 GEM_BUG_ON(!drm_mm_node_allocated(&vma->node)); 1860 1861 /* 1862 * Add a reference if we're newly entering the active list. 1863 * The order in which we add operations to the retirement queue is 1864 * vital here: mark_active adds to the start of the callback list, 1865 * such that subsequent callbacks are called first. Therefore we 1866 * add the active reference first and queue for it to be dropped 1867 * *last*. 1868 */ 1869 if (!i915_vma_is_active(vma)) 1870 obj->active_count++; 1871 i915_vma_set_active(vma, idx); 1872 i915_gem_active_set(&vma->last_read[idx], req); 1873 list_move_tail(&vma->vm_link, &vma->vm->active_list); 1874 1875 obj->base.write_domain = 0; 1876 if (flags & EXEC_OBJECT_WRITE) { 1877 obj->base.write_domain = I915_GEM_DOMAIN_RENDER; 1878 1879 if (intel_fb_obj_invalidate(obj, ORIGIN_CS)) 1880 i915_gem_active_set(&obj->frontbuffer_write, req); 1881 1882 obj->base.read_domains = 0; 1883 } 1884 obj->base.read_domains |= I915_GEM_GPU_DOMAINS; 1885 1886 if (flags & EXEC_OBJECT_NEEDS_FENCE) 1887 i915_gem_active_set(&vma->last_fence, req); 1888 } 1889 1890 static int i915_reset_gen7_sol_offsets(struct drm_i915_gem_request *req) 1891 { 1892 u32 *cs; 1893 int i; 1894 1895 if (!IS_GEN7(req->i915) || req->engine->id != RCS) { 1896 DRM_DEBUG("sol reset is gen7/rcs only\n"); 1897 return -EINVAL; 1898 } 1899 1900 cs = intel_ring_begin(req, 4 * 2 + 2); 1901 if (IS_ERR(cs)) 1902 return PTR_ERR(cs); 1903 1904 *cs++ = MI_LOAD_REGISTER_IMM(4); 1905 for (i = 0; i < 4; i++) { 1906 *cs++ = i915_mmio_reg_offset(GEN7_SO_WRITE_OFFSET(i)); 1907 *cs++ = 0; 1908 } 1909 *cs++ = MI_NOOP; 1910 intel_ring_advance(req, cs); 1911 1912 return 0; 1913 } 1914 1915 static struct i915_vma *eb_parse(struct i915_execbuffer *eb, bool is_master) 1916 { 1917 struct drm_i915_gem_object *shadow_batch_obj; 1918 struct i915_vma *vma; 1919 int err; 1920 1921 shadow_batch_obj = i915_gem_batch_pool_get(&eb->engine->batch_pool, 1922 PAGE_ALIGN(eb->batch_len)); 1923 if (IS_ERR(shadow_batch_obj)) 1924 return ERR_CAST(shadow_batch_obj); 1925 1926 err = intel_engine_cmd_parser(eb->engine, 1927 eb->batch->obj, 1928 shadow_batch_obj, 1929 eb->batch_start_offset, 1930 eb->batch_len, 1931 is_master); 1932 if (err) { 1933 if (err == -EACCES) /* unhandled chained batch */ 1934 vma = NULL; 1935 else 1936 vma = ERR_PTR(err); 1937 goto out; 1938 } 1939 1940 vma = i915_gem_object_ggtt_pin(shadow_batch_obj, NULL, 0, 0, 0); 1941 if (IS_ERR(vma)) 1942 goto out; 1943 1944 eb->vma[eb->buffer_count] = i915_vma_get(vma); 1945 eb->flags[eb->buffer_count] = 1946 __EXEC_OBJECT_HAS_PIN | __EXEC_OBJECT_HAS_REF; 1947 vma->exec_flags = &eb->flags[eb->buffer_count]; 1948 eb->buffer_count++; 1949 1950 out: 1951 i915_gem_object_unpin_pages(shadow_batch_obj); 1952 return vma; 1953 } 1954 1955 static void 1956 add_to_client(struct drm_i915_gem_request *req, struct drm_file *file) 1957 { 1958 req->file_priv = file->driver_priv; 1959 list_add_tail(&req->client_link, &req->file_priv->mm.request_list); 1960 } 1961 1962 static int eb_submit(struct i915_execbuffer *eb) 1963 { 1964 int err; 1965 1966 err = eb_move_to_gpu(eb); 1967 if (err) 1968 return err; 1969 1970 err = i915_switch_context(eb->request); 1971 if (err) 1972 return err; 1973 1974 if (eb->args->flags & I915_EXEC_GEN7_SOL_RESET) { 1975 err = i915_reset_gen7_sol_offsets(eb->request); 1976 if (err) 1977 return err; 1978 } 1979 1980 err = eb->engine->emit_bb_start(eb->request, 1981 eb->batch->node.start + 1982 eb->batch_start_offset, 1983 eb->batch_len, 1984 eb->batch_flags); 1985 if (err) 1986 return err; 1987 1988 return 0; 1989 } 1990 1991 /** 1992 * Find one BSD ring to dispatch the corresponding BSD command. 1993 * The engine index is returned. 1994 */ 1995 static unsigned int 1996 gen8_dispatch_bsd_engine(struct drm_i915_private *dev_priv, 1997 struct drm_file *file) 1998 { 1999 struct drm_i915_file_private *file_priv = file->driver_priv; 2000 2001 /* Check whether the file_priv has already selected one ring. */ 2002 if ((int)file_priv->bsd_engine < 0) 2003 file_priv->bsd_engine = atomic_fetch_xor(1, 2004 &dev_priv->mm.bsd_engine_dispatch_index); 2005 2006 return file_priv->bsd_engine; 2007 } 2008 2009 #define I915_USER_RINGS (4) 2010 2011 static const enum intel_engine_id user_ring_map[I915_USER_RINGS + 1] = { 2012 [I915_EXEC_DEFAULT] = RCS, 2013 [I915_EXEC_RENDER] = RCS, 2014 [I915_EXEC_BLT] = BCS, 2015 [I915_EXEC_BSD] = VCS, 2016 [I915_EXEC_VEBOX] = VECS 2017 }; 2018 2019 static struct intel_engine_cs * 2020 eb_select_engine(struct drm_i915_private *dev_priv, 2021 struct drm_file *file, 2022 struct drm_i915_gem_execbuffer2 *args) 2023 { 2024 unsigned int user_ring_id = args->flags & I915_EXEC_RING_MASK; 2025 struct intel_engine_cs *engine; 2026 2027 if (user_ring_id > I915_USER_RINGS) { 2028 DRM_DEBUG("execbuf with unknown ring: %u\n", user_ring_id); 2029 return NULL; 2030 } 2031 2032 if ((user_ring_id != I915_EXEC_BSD) && 2033 ((args->flags & I915_EXEC_BSD_MASK) != 0)) { 2034 DRM_DEBUG("execbuf with non bsd ring but with invalid " 2035 "bsd dispatch flags: %d\n", (int)(args->flags)); 2036 return NULL; 2037 } 2038 2039 if (user_ring_id == I915_EXEC_BSD && HAS_BSD2(dev_priv)) { 2040 unsigned int bsd_idx = args->flags & I915_EXEC_BSD_MASK; 2041 2042 if (bsd_idx == I915_EXEC_BSD_DEFAULT) { 2043 bsd_idx = gen8_dispatch_bsd_engine(dev_priv, file); 2044 } else if (bsd_idx >= I915_EXEC_BSD_RING1 && 2045 bsd_idx <= I915_EXEC_BSD_RING2) { 2046 bsd_idx >>= I915_EXEC_BSD_SHIFT; 2047 bsd_idx--; 2048 } else { 2049 DRM_DEBUG("execbuf with unknown bsd ring: %u\n", 2050 bsd_idx); 2051 return NULL; 2052 } 2053 2054 engine = dev_priv->engine[_VCS(bsd_idx)]; 2055 } else { 2056 engine = dev_priv->engine[user_ring_map[user_ring_id]]; 2057 } 2058 2059 if (!engine) { 2060 DRM_DEBUG("execbuf with invalid ring: %u\n", user_ring_id); 2061 return NULL; 2062 } 2063 2064 return engine; 2065 } 2066 2067 static void 2068 __free_fence_array(struct drm_syncobj **fences, unsigned int n) 2069 { 2070 while (n--) 2071 drm_syncobj_put(ptr_mask_bits(fences[n], 2)); 2072 kvfree(fences); 2073 } 2074 2075 static struct drm_syncobj ** 2076 get_fence_array(struct drm_i915_gem_execbuffer2 *args, 2077 struct drm_file *file) 2078 { 2079 const unsigned int nfences = args->num_cliprects; 2080 struct drm_i915_gem_exec_fence __user *user; 2081 struct drm_syncobj **fences; 2082 unsigned int n; 2083 int err; 2084 2085 if (!(args->flags & I915_EXEC_FENCE_ARRAY)) 2086 return NULL; 2087 2088 if (nfences > SIZE_MAX / sizeof(*fences)) 2089 return ERR_PTR(-EINVAL); 2090 2091 user = u64_to_user_ptr(args->cliprects_ptr); 2092 #if 0 2093 if (!access_ok(VERIFY_READ, user, nfences * 2 * sizeof(u32))) 2094 return ERR_PTR(-EFAULT); 2095 #endif 2096 2097 fences = kvmalloc_array(args->num_cliprects, sizeof(*fences), 2098 __GFP_NOWARN | GFP_KERNEL); 2099 if (!fences) 2100 return ERR_PTR(-ENOMEM); 2101 2102 for (n = 0; n < nfences; n++) { 2103 struct drm_i915_gem_exec_fence fence; 2104 struct drm_syncobj *syncobj; 2105 2106 if (__copy_from_user(&fence, user++, sizeof(fence))) { 2107 err = -EFAULT; 2108 goto err; 2109 } 2110 2111 syncobj = drm_syncobj_find(file, fence.handle); 2112 if (!syncobj) { 2113 DRM_DEBUG("Invalid syncobj handle provided\n"); 2114 err = -ENOENT; 2115 goto err; 2116 } 2117 2118 fences[n] = ptr_pack_bits(syncobj, fence.flags, 2); 2119 } 2120 2121 return fences; 2122 2123 err: 2124 __free_fence_array(fences, n); 2125 return ERR_PTR(err); 2126 } 2127 2128 static void 2129 put_fence_array(struct drm_i915_gem_execbuffer2 *args, 2130 struct drm_syncobj **fences) 2131 { 2132 if (fences) 2133 __free_fence_array(fences, args->num_cliprects); 2134 } 2135 2136 static int 2137 await_fence_array(struct i915_execbuffer *eb, 2138 struct drm_syncobj **fences) 2139 { 2140 const unsigned int nfences = eb->args->num_cliprects; 2141 unsigned int n; 2142 int err; 2143 2144 for (n = 0; n < nfences; n++) { 2145 struct drm_syncobj *syncobj; 2146 struct dma_fence *fence; 2147 unsigned int flags; 2148 2149 syncobj = ptr_unpack_bits(fences[n], &flags, 2); 2150 if (!(flags & I915_EXEC_FENCE_WAIT)) 2151 continue; 2152 2153 rcu_read_lock(); 2154 fence = dma_fence_get_rcu_safe(&syncobj->fence); 2155 rcu_read_unlock(); 2156 if (!fence) 2157 return -EINVAL; 2158 2159 err = i915_gem_request_await_dma_fence(eb->request, fence); 2160 dma_fence_put(fence); 2161 if (err < 0) 2162 return err; 2163 } 2164 2165 return 0; 2166 } 2167 2168 static void 2169 signal_fence_array(struct i915_execbuffer *eb, 2170 struct drm_syncobj **fences) 2171 { 2172 const unsigned int nfences = eb->args->num_cliprects; 2173 struct dma_fence * const fence = &eb->request->fence; 2174 unsigned int n; 2175 2176 for (n = 0; n < nfences; n++) { 2177 struct drm_syncobj *syncobj; 2178 unsigned int flags; 2179 2180 syncobj = ptr_unpack_bits(fences[n], &flags, 2); 2181 if (!(flags & I915_EXEC_FENCE_SIGNAL)) 2182 continue; 2183 2184 drm_syncobj_replace_fence(syncobj, fence); 2185 } 2186 } 2187 2188 static int 2189 i915_gem_do_execbuffer(struct drm_device *dev, 2190 struct drm_file *file, 2191 struct drm_i915_gem_execbuffer2 *args, 2192 struct drm_i915_gem_exec_object2 *exec, 2193 struct drm_syncobj **fences) 2194 { 2195 struct i915_execbuffer eb; 2196 struct dma_fence *in_fence = NULL; 2197 struct sync_file *out_fence = NULL; 2198 int out_fence_fd = -1; 2199 int err; 2200 2201 BUILD_BUG_ON(__EXEC_INTERNAL_FLAGS & ~__I915_EXEC_ILLEGAL_FLAGS); 2202 BUILD_BUG_ON(__EXEC_OBJECT_INTERNAL_FLAGS & 2203 ~__EXEC_OBJECT_UNKNOWN_FLAGS); 2204 2205 eb.i915 = to_i915(dev); 2206 eb.file = file; 2207 eb.args = args; 2208 if (DBG_FORCE_RELOC || !(args->flags & I915_EXEC_NO_RELOC)) 2209 args->flags |= __EXEC_HAS_RELOC; 2210 2211 eb.exec = exec; 2212 eb.vma = (struct i915_vma **)(exec + args->buffer_count + 1); 2213 eb.vma[0] = NULL; 2214 eb.flags = (unsigned int *)(eb.vma + args->buffer_count + 1); 2215 2216 eb.invalid_flags = __EXEC_OBJECT_UNKNOWN_FLAGS; 2217 if (USES_FULL_PPGTT(eb.i915)) 2218 eb.invalid_flags |= EXEC_OBJECT_NEEDS_GTT; 2219 reloc_cache_init(&eb.reloc_cache, eb.i915); 2220 2221 eb.buffer_count = args->buffer_count; 2222 eb.batch_start_offset = args->batch_start_offset; 2223 eb.batch_len = args->batch_len; 2224 2225 eb.batch_flags = 0; 2226 if (args->flags & I915_EXEC_SECURE) { 2227 if (!drm_is_current_master(file) || !capable(CAP_SYS_ADMIN)) 2228 return -EPERM; 2229 2230 eb.batch_flags |= I915_DISPATCH_SECURE; 2231 } 2232 if (args->flags & I915_EXEC_IS_PINNED) 2233 eb.batch_flags |= I915_DISPATCH_PINNED; 2234 2235 eb.engine = eb_select_engine(eb.i915, file, args); 2236 if (!eb.engine) 2237 return -EINVAL; 2238 2239 if (args->flags & I915_EXEC_RESOURCE_STREAMER) { 2240 if (!HAS_RESOURCE_STREAMER(eb.i915)) { 2241 DRM_DEBUG("RS is only allowed for Haswell, Gen8 and above\n"); 2242 return -EINVAL; 2243 } 2244 if (eb.engine->id != RCS) { 2245 DRM_DEBUG("RS is not available on %s\n", 2246 eb.engine->name); 2247 return -EINVAL; 2248 } 2249 2250 eb.batch_flags |= I915_DISPATCH_RS; 2251 } 2252 2253 if (args->flags & I915_EXEC_FENCE_IN) { 2254 in_fence = sync_file_get_fence(lower_32_bits(args->rsvd2)); 2255 if (!in_fence) 2256 return -EINVAL; 2257 } 2258 2259 if (args->flags & I915_EXEC_FENCE_OUT) { 2260 out_fence_fd = get_unused_fd_flags(O_CLOEXEC); 2261 if (out_fence_fd < 0) { 2262 err = out_fence_fd; 2263 goto err_in_fence; 2264 } 2265 } 2266 2267 err = eb_create(&eb); 2268 if (err) 2269 goto err_out_fence; 2270 2271 GEM_BUG_ON(!eb.lut_size); 2272 2273 err = eb_select_context(&eb); 2274 if (unlikely(err)) 2275 goto err_destroy; 2276 2277 /* 2278 * Take a local wakeref for preparing to dispatch the execbuf as 2279 * we expect to access the hardware fairly frequently in the 2280 * process. Upon first dispatch, we acquire another prolonged 2281 * wakeref that we hold until the GPU has been idle for at least 2282 * 100ms. 2283 */ 2284 intel_runtime_pm_get(eb.i915); 2285 2286 err = i915_mutex_lock_interruptible(dev); 2287 if (err) 2288 goto err_rpm; 2289 2290 err = eb_relocate(&eb); 2291 if (err) { 2292 /* 2293 * If the user expects the execobject.offset and 2294 * reloc.presumed_offset to be an exact match, 2295 * as for using NO_RELOC, then we cannot update 2296 * the execobject.offset until we have completed 2297 * relocation. 2298 */ 2299 args->flags &= ~__EXEC_HAS_RELOC; 2300 goto err_vma; 2301 } 2302 2303 if (unlikely(*eb.batch->exec_flags & EXEC_OBJECT_WRITE)) { 2304 DRM_DEBUG("Attempting to use self-modifying batch buffer\n"); 2305 err = -EINVAL; 2306 goto err_vma; 2307 } 2308 if (eb.batch_start_offset > eb.batch->size || 2309 eb.batch_len > eb.batch->size - eb.batch_start_offset) { 2310 DRM_DEBUG("Attempting to use out-of-bounds batch\n"); 2311 err = -EINVAL; 2312 goto err_vma; 2313 } 2314 2315 if (eb_use_cmdparser(&eb)) { 2316 struct i915_vma *vma; 2317 2318 vma = eb_parse(&eb, drm_is_current_master(file)); 2319 if (IS_ERR(vma)) { 2320 err = PTR_ERR(vma); 2321 goto err_vma; 2322 } 2323 2324 if (vma) { 2325 /* 2326 * Batch parsed and accepted: 2327 * 2328 * Set the DISPATCH_SECURE bit to remove the NON_SECURE 2329 * bit from MI_BATCH_BUFFER_START commands issued in 2330 * the dispatch_execbuffer implementations. We 2331 * specifically don't want that set on batches the 2332 * command parser has accepted. 2333 */ 2334 eb.batch_flags |= I915_DISPATCH_SECURE; 2335 eb.batch_start_offset = 0; 2336 eb.batch = vma; 2337 } 2338 } 2339 2340 if (eb.batch_len == 0) 2341 eb.batch_len = eb.batch->size - eb.batch_start_offset; 2342 2343 /* 2344 * snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure 2345 * batch" bit. Hence we need to pin secure batches into the global gtt. 2346 * hsw should have this fixed, but bdw mucks it up again. */ 2347 if (eb.batch_flags & I915_DISPATCH_SECURE) { 2348 struct i915_vma *vma; 2349 2350 /* 2351 * So on first glance it looks freaky that we pin the batch here 2352 * outside of the reservation loop. But: 2353 * - The batch is already pinned into the relevant ppgtt, so we 2354 * already have the backing storage fully allocated. 2355 * - No other BO uses the global gtt (well contexts, but meh), 2356 * so we don't really have issues with multiple objects not 2357 * fitting due to fragmentation. 2358 * So this is actually safe. 2359 */ 2360 vma = i915_gem_object_ggtt_pin(eb.batch->obj, NULL, 0, 0, 0); 2361 if (IS_ERR(vma)) { 2362 err = PTR_ERR(vma); 2363 goto err_vma; 2364 } 2365 2366 eb.batch = vma; 2367 } 2368 2369 /* All GPU relocation batches must be submitted prior to the user rq */ 2370 GEM_BUG_ON(eb.reloc_cache.rq); 2371 2372 /* Allocate a request for this batch buffer nice and early. */ 2373 eb.request = i915_gem_request_alloc(eb.engine, eb.ctx); 2374 if (IS_ERR(eb.request)) { 2375 err = PTR_ERR(eb.request); 2376 goto err_batch_unpin; 2377 } 2378 2379 if (in_fence) { 2380 err = i915_gem_request_await_dma_fence(eb.request, in_fence); 2381 if (err < 0) 2382 goto err_request; 2383 } 2384 2385 if (fences) { 2386 err = await_fence_array(&eb, fences); 2387 if (err) 2388 goto err_request; 2389 } 2390 2391 if (out_fence_fd != -1) { 2392 out_fence = sync_file_create(&eb.request->fence); 2393 if (!out_fence) { 2394 err = -ENOMEM; 2395 goto err_request; 2396 } 2397 } 2398 2399 /* 2400 * Whilst this request exists, batch_obj will be on the 2401 * active_list, and so will hold the active reference. Only when this 2402 * request is retired will the the batch_obj be moved onto the 2403 * inactive_list and lose its active reference. Hence we do not need 2404 * to explicitly hold another reference here. 2405 */ 2406 eb.request->batch = eb.batch; 2407 2408 trace_i915_gem_request_queue(eb.request, eb.batch_flags); 2409 err = eb_submit(&eb); 2410 err_request: 2411 __i915_add_request(eb.request, err == 0); 2412 add_to_client(eb.request, file); 2413 2414 if (fences) 2415 signal_fence_array(&eb, fences); 2416 2417 if (out_fence) { 2418 if (err == 0) { 2419 fd_install(out_fence_fd, out_fence->file); 2420 args->rsvd2 &= GENMASK_ULL(31, 0); /* keep in-fence */ 2421 args->rsvd2 |= (u64)out_fence_fd << 32; 2422 out_fence_fd = -1; 2423 } else { 2424 fput(out_fence->file); 2425 } 2426 } 2427 2428 err_batch_unpin: 2429 if (eb.batch_flags & I915_DISPATCH_SECURE) 2430 i915_vma_unpin(eb.batch); 2431 err_vma: 2432 if (eb.exec) 2433 eb_release_vmas(&eb); 2434 mutex_unlock(&dev->struct_mutex); 2435 err_rpm: 2436 intel_runtime_pm_put(eb.i915); 2437 i915_gem_context_put(eb.ctx); 2438 err_destroy: 2439 eb_destroy(&eb); 2440 err_out_fence: 2441 if (out_fence_fd != -1) 2442 put_unused_fd(out_fence_fd); 2443 err_in_fence: 2444 dma_fence_put(in_fence); 2445 return err; 2446 } 2447 2448 /* 2449 * Legacy execbuffer just creates an exec2 list from the original exec object 2450 * list array and passes it to the real function. 2451 */ 2452 int 2453 i915_gem_execbuffer(struct drm_device *dev, void *data, 2454 struct drm_file *file) 2455 { 2456 const size_t sz = (sizeof(struct drm_i915_gem_exec_object2) + 2457 sizeof(struct i915_vma *) + 2458 sizeof(unsigned int)); 2459 struct drm_i915_gem_execbuffer *args = data; 2460 struct drm_i915_gem_execbuffer2 exec2; 2461 struct drm_i915_gem_exec_object *exec_list = NULL; 2462 struct drm_i915_gem_exec_object2 *exec2_list = NULL; 2463 unsigned int i; 2464 int err; 2465 2466 if (args->buffer_count < 1 || args->buffer_count > SIZE_MAX / sz - 1) { 2467 DRM_DEBUG("execbuf2 with %d buffers\n", args->buffer_count); 2468 return -EINVAL; 2469 } 2470 2471 exec2.buffers_ptr = args->buffers_ptr; 2472 exec2.buffer_count = args->buffer_count; 2473 exec2.batch_start_offset = args->batch_start_offset; 2474 exec2.batch_len = args->batch_len; 2475 exec2.DR1 = args->DR1; 2476 exec2.DR4 = args->DR4; 2477 exec2.num_cliprects = args->num_cliprects; 2478 exec2.cliprects_ptr = args->cliprects_ptr; 2479 exec2.flags = I915_EXEC_RENDER; 2480 i915_execbuffer2_set_context_id(exec2, 0); 2481 2482 if (!i915_gem_check_execbuffer(&exec2)) 2483 return -EINVAL; 2484 2485 /* Copy in the exec list from userland */ 2486 exec_list = kvmalloc_array(args->buffer_count, sizeof(*exec_list), 2487 __GFP_NOWARN | GFP_KERNEL); 2488 exec2_list = kvmalloc_array(args->buffer_count + 1, sz, 2489 __GFP_NOWARN | GFP_KERNEL); 2490 if (exec_list == NULL || exec2_list == NULL) { 2491 DRM_DEBUG("Failed to allocate exec list for %d buffers\n", 2492 args->buffer_count); 2493 kvfree(exec_list); 2494 kvfree(exec2_list); 2495 return -ENOMEM; 2496 } 2497 err = copy_from_user(exec_list, 2498 u64_to_user_ptr(args->buffers_ptr), 2499 sizeof(*exec_list) * args->buffer_count); 2500 if (err) { 2501 DRM_DEBUG("copy %d exec entries failed %d\n", 2502 args->buffer_count, err); 2503 kvfree(exec_list); 2504 kvfree(exec2_list); 2505 return -EFAULT; 2506 } 2507 2508 for (i = 0; i < args->buffer_count; i++) { 2509 exec2_list[i].handle = exec_list[i].handle; 2510 exec2_list[i].relocation_count = exec_list[i].relocation_count; 2511 exec2_list[i].relocs_ptr = exec_list[i].relocs_ptr; 2512 exec2_list[i].alignment = exec_list[i].alignment; 2513 exec2_list[i].offset = exec_list[i].offset; 2514 if (INTEL_GEN(to_i915(dev)) < 4) 2515 exec2_list[i].flags = EXEC_OBJECT_NEEDS_FENCE; 2516 else 2517 exec2_list[i].flags = 0; 2518 } 2519 2520 err = i915_gem_do_execbuffer(dev, file, &exec2, exec2_list, NULL); 2521 if (exec2.flags & __EXEC_HAS_RELOC) { 2522 struct drm_i915_gem_exec_object __user *user_exec_list = 2523 u64_to_user_ptr(args->buffers_ptr); 2524 2525 /* Copy the new buffer offsets back to the user's exec list. */ 2526 for (i = 0; i < args->buffer_count; i++) { 2527 if (!(exec2_list[i].offset & UPDATE)) 2528 continue; 2529 2530 exec2_list[i].offset = 2531 gen8_canonical_addr(exec2_list[i].offset & PIN_OFFSET_MASK); 2532 exec2_list[i].offset &= PIN_OFFSET_MASK; 2533 if (__copy_to_user(&user_exec_list[i].offset, 2534 &exec2_list[i].offset, 2535 sizeof(user_exec_list[i].offset))) 2536 break; 2537 } 2538 } 2539 2540 kvfree(exec_list); 2541 kvfree(exec2_list); 2542 return err; 2543 } 2544 2545 int 2546 i915_gem_execbuffer2(struct drm_device *dev, void *data, 2547 struct drm_file *file) 2548 { 2549 const size_t sz = (sizeof(struct drm_i915_gem_exec_object2) + 2550 sizeof(struct i915_vma *) + 2551 sizeof(unsigned int)); 2552 struct drm_i915_gem_execbuffer2 *args = data; 2553 struct drm_i915_gem_exec_object2 *exec2_list; 2554 struct drm_syncobj **fences = NULL; 2555 int err; 2556 2557 if (args->buffer_count < 1 || args->buffer_count > SIZE_MAX / sz - 1) { 2558 DRM_DEBUG("execbuf2 with %d buffers\n", args->buffer_count); 2559 return -EINVAL; 2560 } 2561 2562 if (!i915_gem_check_execbuffer(args)) 2563 return -EINVAL; 2564 2565 /* Allocate an extra slot for use by the command parser */ 2566 exec2_list = kvmalloc_array(args->buffer_count + 1, sz, 2567 __GFP_NOWARN | GFP_KERNEL); 2568 if (exec2_list == NULL) { 2569 DRM_DEBUG("Failed to allocate exec list for %d buffers\n", 2570 args->buffer_count); 2571 return -ENOMEM; 2572 } 2573 if (copy_from_user(exec2_list, 2574 u64_to_user_ptr(args->buffers_ptr), 2575 sizeof(*exec2_list) * args->buffer_count)) { 2576 DRM_DEBUG("copy %d exec entries failed\n", args->buffer_count); 2577 kvfree(exec2_list); 2578 return -EFAULT; 2579 } 2580 2581 if (args->flags & I915_EXEC_FENCE_ARRAY) { 2582 fences = get_fence_array(args, file); 2583 if (IS_ERR(fences)) { 2584 kvfree(exec2_list); 2585 return PTR_ERR(fences); 2586 } 2587 } 2588 2589 err = i915_gem_do_execbuffer(dev, file, args, exec2_list, fences); 2590 2591 /* 2592 * Now that we have begun execution of the batchbuffer, we ignore 2593 * any new error after this point. Also given that we have already 2594 * updated the associated relocations, we try to write out the current 2595 * object locations irrespective of any error. 2596 */ 2597 if (args->flags & __EXEC_HAS_RELOC) { 2598 struct drm_i915_gem_exec_object2 __user *user_exec_list = 2599 u64_to_user_ptr(args->buffers_ptr); 2600 unsigned int i; 2601 2602 /* Copy the new buffer offsets back to the user's exec list. */ 2603 user_access_begin(); 2604 for (i = 0; i < args->buffer_count; i++) { 2605 if (!(exec2_list[i].offset & UPDATE)) 2606 continue; 2607 2608 exec2_list[i].offset = 2609 gen8_canonical_addr(exec2_list[i].offset & PIN_OFFSET_MASK); 2610 unsafe_put_user(exec2_list[i].offset, 2611 &user_exec_list[i].offset, 2612 end_user); 2613 } 2614 end_user: 2615 user_access_end(); 2616 } 2617 2618 args->flags &= ~__I915_EXEC_UNKNOWN_FLAGS; 2619 put_fence_array(args, fences); 2620 kvfree(exec2_list); 2621 return err; 2622 } 2623