1 /*
2  * Copyright © 2014 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21  * IN THE SOFTWARE.
22  *
23  * Authors:
24  *    Mika Kuoppala <mika.kuoppala@intel.com>
25  *
26  */
27 
28 #include "i915_drv.h"
29 #include "intel_renderstate.h"
30 
31 static const struct intel_renderstate_rodata *
32 render_state_get_rodata(struct drm_device *dev, const int gen)
33 {
34 	switch (gen) {
35 	case 6:
36 		return &gen6_null_state;
37 	case 7:
38 		return &gen7_null_state;
39 	case 8:
40 		return &gen8_null_state;
41 	}
42 
43 	return NULL;
44 }
45 
46 static int render_state_init(struct render_state *so, struct drm_device *dev)
47 {
48 	int ret;
49 
50 	so->gen = INTEL_INFO(dev)->gen;
51 	so->rodata = render_state_get_rodata(dev, so->gen);
52 	if (so->rodata == NULL)
53 		return 0;
54 
55 	if (so->rodata->batch_items * 4 > 4096)
56 		return -EINVAL;
57 
58 	so->obj = i915_gem_alloc_object(dev, 4096);
59 	if (so->obj == NULL)
60 		return -ENOMEM;
61 
62 	ret = i915_gem_obj_ggtt_pin(so->obj, 4096, 0);
63 	if (ret)
64 		goto free_gem;
65 
66 	so->ggtt_offset = i915_gem_obj_ggtt_offset(so->obj);
67 	return 0;
68 
69 free_gem:
70 	drm_gem_object_unreference(&so->obj->base);
71 	return ret;
72 }
73 
74 static int render_state_setup(struct render_state *so)
75 {
76 	const struct intel_renderstate_rodata *rodata = so->rodata;
77 	unsigned int i = 0, reloc_index = 0;
78 	struct vm_page *page;
79 	u32 *d;
80 	int ret;
81 
82 	ret = i915_gem_object_set_to_cpu_domain(so->obj, true);
83 	if (ret)
84 		return ret;
85 
86 	page = so->obj->pages[0];
87 	d = kmap(page);
88 
89 	while (i < rodata->batch_items) {
90 		u32 s = rodata->batch[i];
91 
92 		if (i * 4  == rodata->reloc[reloc_index]) {
93 			u64 r = s + so->ggtt_offset;
94 			s = lower_32_bits(r);
95 			if (so->gen >= 8) {
96 				if (i + 1 >= rodata->batch_items ||
97 				    rodata->batch[i + 1] != 0)
98 					return -EINVAL;
99 
100 				d[i++] = s;
101 				s = upper_32_bits(r);
102 			}
103 
104 			reloc_index++;
105 		}
106 
107 		d[i++] = s;
108 	}
109 	kunmap(page);
110 
111 	ret = i915_gem_object_set_to_gtt_domain(so->obj, false);
112 	if (ret)
113 		return ret;
114 
115 	if (rodata->reloc[reloc_index] != -1) {
116 		DRM_ERROR("only %d relocs resolved\n", reloc_index);
117 		return -EINVAL;
118 	}
119 
120 	return 0;
121 }
122 
123 void i915_gem_render_state_fini(struct render_state *so)
124 {
125 	i915_gem_object_ggtt_unpin(so->obj);
126 	drm_gem_object_unreference(&so->obj->base);
127 }
128 
129 int i915_gem_render_state_prepare(struct intel_engine_cs *ring,
130 				  struct render_state *so)
131 {
132 	int ret;
133 
134 	if (WARN_ON(ring->id != RCS))
135 		return -ENOENT;
136 
137 	ret = render_state_init(so, ring->dev);
138 	if (ret)
139 		return ret;
140 
141 	if (so->rodata == NULL)
142 		return 0;
143 
144 	ret = render_state_setup(so);
145 	if (ret) {
146 		i915_gem_render_state_fini(so);
147 		return ret;
148 	}
149 
150 	return 0;
151 }
152 
153 int i915_gem_render_state_init(struct intel_engine_cs *ring)
154 {
155 	struct render_state so;
156 	int ret;
157 
158 	ret = i915_gem_render_state_prepare(ring, &so);
159 	if (ret)
160 		return ret;
161 
162 	if (so.rodata == NULL)
163 		return 0;
164 
165 	ret = ring->dispatch_execbuffer(ring,
166 					so.ggtt_offset,
167 					so.rodata->batch_items * 4,
168 					I915_DISPATCH_SECURE);
169 	if (ret)
170 		goto out;
171 
172 	i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
173 
174 	ret = __i915_add_request(ring, NULL, so.obj, NULL);
175 	/* __i915_add_request moves object to inactive if it fails */
176 out:
177 	i915_gem_render_state_fini(&so);
178 	return ret;
179 }
180