1 /* 2 * Copyright © 2014 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the 6 * "Software"), to deal in the Software without restriction, including 7 * without limitation the rights to use, copy, modify, merge, publish, 8 * distribute, sub license, and/or sell copies of the Software, and to 9 * permit persons to whom the Software is furnished to do so, subject to 10 * the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the 13 * next paragraph) shall be included in all copies or substantial portions 14 * of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 22 * IN THE SOFTWARE. 23 */ 24 25 #include "i915_params.h" 26 #include "i915_drv.h" 27 28 struct i915_params i915 __read_mostly = { 29 .modeset = -1, 30 .panel_ignore_lid = 1, 31 .semaphores = -1, 32 .lvds_channel_mode = 0, 33 .panel_use_ssc = -1, 34 .vbt_sdvo_panel_type = -1, 35 .enable_rc6 = -1, 36 .enable_dc = -1, 37 .enable_fbc = -1, 38 .enable_execlists = -1, 39 .enable_hangcheck = true, 40 .enable_ppgtt = -1, 41 .enable_psr = -1, 42 .preliminary_hw_support = IS_ENABLED(CONFIG_DRM_I915_PRELIMINARY_HW_SUPPORT), 43 .disable_power_well = -1, 44 .enable_ips = 1, 45 .fastboot = 0, 46 .prefault_disable = 0, 47 .load_detect_test = 0, 48 .reset = 1, 49 .invert_brightness = 0, 50 .disable_display = 0, 51 .enable_cmd_parser = 0, 52 .use_mmio_flip = 0, 53 .mmio_debug = 0, 54 .verbose_state_checks = 1, 55 .nuclear_pageflip = 0, 56 .edp_vswing = 0, 57 .enable_guc_submission = false, 58 .guc_log_level = -1, 59 }; 60 61 module_param_named(modeset, i915.modeset, int, 0400); 62 TUNABLE_INT("drm.i915.modeset", &i915.modeset); 63 MODULE_PARM_DESC(modeset, 64 "Use kernel modesetting [KMS] (0=disable, " 65 "1=on, -1=force vga console preference [default])"); 66 67 module_param_named_unsafe(panel_ignore_lid, i915.panel_ignore_lid, int, 0600); 68 TUNABLE_INT("drm.i915.panel_ignore_lid", &i915.panel_ignore_lid); 69 MODULE_PARM_DESC(panel_ignore_lid, 70 "Override lid status (0=autodetect, 1=autodetect disabled [default], " 71 "-1=force lid closed, -2=force lid open)"); 72 73 module_param_named_unsafe(semaphores, i915.semaphores, int, 0400); 74 TUNABLE_INT("drm.i915.semaphores", &i915.semaphores); 75 MODULE_PARM_DESC(semaphores, 76 "Use semaphores for inter-ring sync " 77 "(default: -1 (use per-chip defaults))"); 78 79 module_param_named_unsafe(enable_rc6, i915.enable_rc6, int, 0400); 80 TUNABLE_INT("drm.i915.enable_rc6", &i915.enable_rc6); 81 MODULE_PARM_DESC(enable_rc6, 82 "Enable power-saving render C-state 6. " 83 "Different stages can be selected via bitmask values " 84 "(0 = disable; 1 = enable rc6; 2 = enable deep rc6; 4 = enable deepest rc6). " 85 "For example, 3 would enable rc6 and deep rc6, and 7 would enable everything. " 86 "default: -1 (use per-chip default)"); 87 88 module_param_named_unsafe(enable_dc, i915.enable_dc, int, 0400); 89 MODULE_PARM_DESC(enable_dc, 90 "Enable power-saving display C-states. " 91 "(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6)"); 92 93 module_param_named_unsafe(enable_fbc, i915.enable_fbc, int, 0600); 94 TUNABLE_INT("drm.i915.enable_fbc", &i915.enable_fbc); 95 MODULE_PARM_DESC(enable_fbc, 96 "Enable frame buffer compression for power savings " 97 "(default: -1 (use per-chip default))"); 98 99 module_param_named_unsafe(lvds_channel_mode, i915.lvds_channel_mode, int, 0400); 100 TUNABLE_INT("drm.i915.lvds_channel_mode", &i915.lvds_channel_mode); 101 MODULE_PARM_DESC(lvds_channel_mode, 102 "Specify LVDS channel mode " 103 "(0=probe BIOS [default], 1=single-channel, 2=dual-channel)"); 104 105 module_param_named_unsafe(lvds_use_ssc, i915.panel_use_ssc, int, 0600); 106 TUNABLE_INT("drm.i915.panel_use_ssc", &i915.panel_use_ssc); 107 MODULE_PARM_DESC(lvds_use_ssc, 108 "Use Spread Spectrum Clock with panels [LVDS/eDP] " 109 "(default: auto from VBT)"); 110 111 module_param_named_unsafe(vbt_sdvo_panel_type, i915.vbt_sdvo_panel_type, int, 0400); 112 TUNABLE_INT("drm.i915.vbt_sdvo_panel_type", &i915.vbt_sdvo_panel_type); 113 MODULE_PARM_DESC(vbt_sdvo_panel_type, 114 "Override/Ignore selection of SDVO panel mode in the VBT " 115 "(-2=ignore, -1=auto [default], index in VBT BIOS table)"); 116 117 module_param_named_unsafe(reset, i915.reset, bool, 0600); 118 TUNABLE_INT("drm.i915.reset", &i915.reset); 119 MODULE_PARM_DESC(reset, "Attempt GPU resets (default: true)"); 120 121 module_param_named_unsafe(enable_hangcheck, i915.enable_hangcheck, bool, 0644); 122 MODULE_PARM_DESC(enable_hangcheck, 123 "Periodically check GPU activity for detecting hangs. " 124 "WARNING: Disabling this can cause system wide hangs. " 125 "(default: true)"); 126 127 module_param_named_unsafe(enable_ppgtt, i915.enable_ppgtt, int, 0400); 128 TUNABLE_INT("drm.i915.enable_ppgtt", &i915.enable_ppgtt); 129 MODULE_PARM_DESC(enable_ppgtt, 130 "Override PPGTT usage. " 131 "(-1=auto [default], 0=disabled, 1=aliasing, 2=full, 3=full with extended address space)"); 132 133 module_param_named_unsafe(enable_execlists, i915.enable_execlists, int, 0400); 134 TUNABLE_INT("drm.i915.enable_execlists", &i915.enable_execlists); 135 MODULE_PARM_DESC(enable_execlists, 136 "Override execlists usage. " 137 "(-1=auto [default], 0=disabled, 1=enabled)"); 138 139 module_param_named_unsafe(enable_psr, i915.enable_psr, int, 0600); 140 TUNABLE_INT("drm.i915.enable_psr", &i915.enable_psr); 141 MODULE_PARM_DESC(enable_psr, "Enable PSR " 142 "(0=disabled, 1=enabled - link mode chosen per-platform, 2=force link-standby mode, 3=force link-off mode) " 143 "Default: -1 (use per-chip default)"); 144 145 module_param_named_unsafe(preliminary_hw_support, i915.preliminary_hw_support, int, 0400); 146 MODULE_PARM_DESC(preliminary_hw_support, 147 "Enable preliminary hardware support."); 148 149 module_param_named_unsafe(disable_power_well, i915.disable_power_well, int, 0400); 150 MODULE_PARM_DESC(disable_power_well, 151 "Disable display power wells when possible " 152 "(-1=auto [default], 0=power wells always on, 1=power wells disabled when possible)"); 153 154 module_param_named_unsafe(enable_ips, i915.enable_ips, int, 0600); 155 MODULE_PARM_DESC(enable_ips, "Enable IPS (default: true)"); 156 157 module_param_named(fastboot, i915.fastboot, bool, 0600); 158 MODULE_PARM_DESC(fastboot, 159 "Try to skip unnecessary mode sets at boot time (default: false)"); 160 161 module_param_named_unsafe(prefault_disable, i915.prefault_disable, bool, 0600); 162 MODULE_PARM_DESC(prefault_disable, 163 "Disable page prefaulting for pread/pwrite/reloc (default:false). " 164 "For developers only."); 165 166 module_param_named_unsafe(load_detect_test, i915.load_detect_test, bool, 0600); 167 MODULE_PARM_DESC(load_detect_test, 168 "Force-enable the VGA load detect code for testing (default:false). " 169 "For developers only."); 170 171 module_param_named_unsafe(invert_brightness, i915.invert_brightness, int, 0600); 172 TUNABLE_INT("drm.i915.panel_invert_brightness", &i915.invert_brightness); 173 MODULE_PARM_DESC(invert_brightness, 174 "Invert backlight brightness " 175 "(-1 force normal, 0 machine defaults, 1 force inversion), please " 176 "report PCI device ID, subsystem vendor and subsystem device ID " 177 "to dri-devel@lists.freedesktop.org, if your machine needs it. " 178 "It will then be included in an upcoming module version."); 179 180 module_param_named(disable_display, i915.disable_display, bool, 0400); 181 MODULE_PARM_DESC(disable_display, "Disable display (default: false)"); 182 183 module_param_named_unsafe(enable_cmd_parser, i915.enable_cmd_parser, int, 0600); 184 MODULE_PARM_DESC(enable_cmd_parser, 185 "Enable command parsing (1=enabled [default], 0=disabled)"); 186 187 module_param_named_unsafe(use_mmio_flip, i915.use_mmio_flip, int, 0600); 188 TUNABLE_INT("drm.i915.use_mmio_flip", &i915.use_mmio_flip); 189 MODULE_PARM_DESC(use_mmio_flip, 190 "use MMIO flips (-1=never, 0=driver discretion [default], 1=always)"); 191 192 module_param_named(mmio_debug, i915.mmio_debug, int, 0600); 193 MODULE_PARM_DESC(mmio_debug, 194 "Enable the MMIO debug code for the first N failures (default: off). " 195 "This may negatively affect performance."); 196 197 module_param_named(verbose_state_checks, i915.verbose_state_checks, bool, 0600); 198 MODULE_PARM_DESC(verbose_state_checks, 199 "Enable verbose logs (ie. WARN_ON()) in case of unexpected hw state conditions."); 200 201 module_param_named_unsafe(nuclear_pageflip, i915.nuclear_pageflip, bool, 0600); 202 MODULE_PARM_DESC(nuclear_pageflip, 203 "Force atomic modeset functionality; asynchronous mode is not yet supported. (default: false)."); 204 205 /* WA to get away with the default setting in VBT for early platforms.Will be removed */ 206 module_param_named_unsafe(edp_vswing, i915.edp_vswing, int, 0400); 207 MODULE_PARM_DESC(edp_vswing, 208 "Ignore/Override vswing pre-emph table selection from VBT " 209 "(0=use value from vbt [default], 1=low power swing(200mV)," 210 "2=default swing(400mV))"); 211 212 module_param_named_unsafe(enable_guc_submission, i915.enable_guc_submission, bool, 0400); 213 MODULE_PARM_DESC(enable_guc_submission, "Enable GuC submission (default:false)"); 214 215 module_param_named(guc_log_level, i915.guc_log_level, int, 0400); 216 MODULE_PARM_DESC(guc_log_level, 217 "GuC firmware logging level (-1:disabled (default), 0-3:enabled)"); 218