1 /* 2 * Copyright(c) 2011-2015 Intel Corporation. All rights reserved. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 */ 23 24 #include "intel_drv.h" 25 #include "i915_vgpu.h" 26 27 /** 28 * DOC: Intel GVT-g guest support 29 * 30 * Intel GVT-g is a graphics virtualization technology which shares the 31 * GPU among multiple virtual machines on a time-sharing basis. Each 32 * virtual machine is presented a virtual GPU (vGPU), which has equivalent 33 * features as the underlying physical GPU (pGPU), so i915 driver can run 34 * seamlessly in a virtual machine. This file provides vGPU specific 35 * optimizations when running in a virtual machine, to reduce the complexity 36 * of vGPU emulation and to improve the overall performance. 37 * 38 * A primary function introduced here is so-called "address space ballooning" 39 * technique. Intel GVT-g partitions global graphics memory among multiple VMs, 40 * so each VM can directly access a portion of the memory without hypervisor's 41 * intervention, e.g. filling textures or queuing commands. However with the 42 * partitioning an unmodified i915 driver would assume a smaller graphics 43 * memory starting from address ZERO, then requires vGPU emulation module to 44 * translate the graphics address between 'guest view' and 'host view', for 45 * all registers and command opcodes which contain a graphics memory address. 46 * To reduce the complexity, Intel GVT-g introduces "address space ballooning", 47 * by telling the exact partitioning knowledge to each guest i915 driver, which 48 * then reserves and prevents non-allocated portions from allocation. Thus vGPU 49 * emulation module only needs to scan and validate graphics addresses without 50 * complexity of address translation. 51 * 52 */ 53 54 /** 55 * i915_check_vgpu - detect virtual GPU 56 * @dev_priv: i915 device private 57 * 58 * This function is called at the initialization stage, to detect whether 59 * running on a vGPU. 60 */ 61 void i915_check_vgpu(struct drm_i915_private *dev_priv) 62 { 63 u64 magic; 64 u16 version_major; 65 66 BUILD_BUG_ON(sizeof(struct vgt_if) != VGT_PVINFO_SIZE); 67 68 magic = __raw_i915_read64(dev_priv, vgtif_reg(magic)); 69 if (magic != VGT_MAGIC) 70 return; 71 72 version_major = __raw_i915_read16(dev_priv, vgtif_reg(version_major)); 73 if (version_major < VGT_VERSION_MAJOR) { 74 DRM_INFO("VGT interface version mismatch!\n"); 75 return; 76 } 77 78 dev_priv->vgpu.caps = __raw_i915_read32(dev_priv, vgtif_reg(vgt_caps)); 79 80 dev_priv->vgpu.active = true; 81 DRM_INFO("Virtual GPU for Intel GVT-g detected.\n"); 82 } 83 84 bool intel_vgpu_has_full_48bit_ppgtt(struct drm_i915_private *dev_priv) 85 { 86 return dev_priv->vgpu.caps & VGT_CAPS_FULL_48BIT_PPGTT; 87 } 88 89 struct _balloon_info_ { 90 /* 91 * There are up to 2 regions per mappable/unmappable graphic 92 * memory that might be ballooned. Here, index 0/1 is for mappable 93 * graphic memory, 2/3 for unmappable graphic memory. 94 */ 95 struct drm_mm_node space[4]; 96 }; 97 98 static struct _balloon_info_ bl_info; 99 100 static void vgt_deballoon_space(struct i915_ggtt *ggtt, 101 struct drm_mm_node *node) 102 { 103 DRM_DEBUG_DRIVER("deballoon space: range [0x%llx - 0x%llx] %llu KiB.\n", 104 node->start, 105 node->start + node->size, 106 node->size / 1024); 107 108 ggtt->base.reserved -= node->size; 109 drm_mm_remove_node(node); 110 } 111 112 /** 113 * intel_vgt_deballoon - deballoon reserved graphics address trunks 114 * @dev_priv: i915 device private data 115 * 116 * This function is called to deallocate the ballooned-out graphic memory, when 117 * driver is unloaded or when ballooning fails. 118 */ 119 void intel_vgt_deballoon(struct drm_i915_private *dev_priv) 120 { 121 int i; 122 123 if (!intel_vgpu_active(dev_priv)) 124 return; 125 126 DRM_DEBUG("VGT deballoon.\n"); 127 128 for (i = 0; i < 4; i++) 129 vgt_deballoon_space(&dev_priv->ggtt, &bl_info.space[i]); 130 } 131 132 static int vgt_balloon_space(struct i915_ggtt *ggtt, 133 struct drm_mm_node *node, 134 unsigned long start, unsigned long end) 135 { 136 unsigned long size = end - start; 137 int ret; 138 139 if (start >= end) 140 return -EINVAL; 141 142 DRM_INFO("balloon space: range [ 0x%lx - 0x%lx ] %lu KiB.\n", 143 start, end, size / 1024); 144 ret = i915_gem_gtt_reserve(&ggtt->base, node, 145 size, start, I915_COLOR_UNEVICTABLE, 146 0); 147 if (!ret) 148 ggtt->base.reserved += size; 149 150 return ret; 151 } 152 153 /** 154 * intel_vgt_balloon - balloon out reserved graphics address trunks 155 * @dev_priv: i915 device private data 156 * 157 * This function is called at the initialization stage, to balloon out the 158 * graphic address space allocated to other vGPUs, by marking these spaces as 159 * reserved. The ballooning related knowledge(starting address and size of 160 * the mappable/unmappable graphic memory) is described in the vgt_if structure 161 * in a reserved mmio range. 162 * 163 * To give an example, the drawing below depicts one typical scenario after 164 * ballooning. Here the vGPU1 has 2 pieces of graphic address spaces ballooned 165 * out each for the mappable and the non-mappable part. From the vGPU1 point of 166 * view, the total size is the same as the physical one, with the start address 167 * of its graphic space being zero. Yet there are some portions ballooned out( 168 * the shadow part, which are marked as reserved by drm allocator). From the 169 * host point of view, the graphic address space is partitioned by multiple 170 * vGPUs in different VMs. :: 171 * 172 * vGPU1 view Host view 173 * 0 ------> +-----------+ +-----------+ 174 * ^ |###########| | vGPU3 | 175 * | |###########| +-----------+ 176 * | |###########| | vGPU2 | 177 * | +-----------+ +-----------+ 178 * mappable GM | available | ==> | vGPU1 | 179 * | +-----------+ +-----------+ 180 * | |###########| | | 181 * v |###########| | Host | 182 * +=======+===========+ +===========+ 183 * ^ |###########| | vGPU3 | 184 * | |###########| +-----------+ 185 * | |###########| | vGPU2 | 186 * | +-----------+ +-----------+ 187 * unmappable GM | available | ==> | vGPU1 | 188 * | +-----------+ +-----------+ 189 * | |###########| | | 190 * | |###########| | Host | 191 * v |###########| | | 192 * total GM size ------> +-----------+ +-----------+ 193 * 194 * Returns: 195 * zero on success, non-zero if configuration invalid or ballooning failed 196 */ 197 int intel_vgt_balloon(struct drm_i915_private *dev_priv) 198 { 199 struct i915_ggtt *ggtt = &dev_priv->ggtt; 200 unsigned long ggtt_end = ggtt->base.total; 201 202 unsigned long mappable_base, mappable_size, mappable_end; 203 unsigned long unmappable_base, unmappable_size, unmappable_end; 204 int ret; 205 206 if (!intel_vgpu_active(dev_priv)) 207 return 0; 208 209 mappable_base = I915_READ(vgtif_reg(avail_rs.mappable_gmadr.base)); 210 mappable_size = I915_READ(vgtif_reg(avail_rs.mappable_gmadr.size)); 211 unmappable_base = I915_READ(vgtif_reg(avail_rs.nonmappable_gmadr.base)); 212 unmappable_size = I915_READ(vgtif_reg(avail_rs.nonmappable_gmadr.size)); 213 214 mappable_end = mappable_base + mappable_size; 215 unmappable_end = unmappable_base + unmappable_size; 216 217 DRM_INFO("VGT ballooning configuration:\n"); 218 DRM_INFO("Mappable graphic memory: base 0x%lx size %ldKiB\n", 219 mappable_base, mappable_size / 1024); 220 DRM_INFO("Unmappable graphic memory: base 0x%lx size %ldKiB\n", 221 unmappable_base, unmappable_size / 1024); 222 223 if (mappable_end > ggtt->mappable_end || 224 unmappable_base < ggtt->mappable_end || 225 unmappable_end > ggtt_end) { 226 DRM_ERROR("Invalid ballooning configuration!\n"); 227 return -EINVAL; 228 } 229 230 /* Unmappable graphic memory ballooning */ 231 if (unmappable_base > ggtt->mappable_end) { 232 ret = vgt_balloon_space(ggtt, &bl_info.space[2], 233 ggtt->mappable_end, unmappable_base); 234 235 if (ret) 236 goto err; 237 } 238 239 if (unmappable_end < ggtt_end) { 240 ret = vgt_balloon_space(ggtt, &bl_info.space[3], 241 unmappable_end, ggtt_end); 242 if (ret) 243 goto err_upon_mappable; 244 } 245 246 /* Mappable graphic memory ballooning */ 247 if (mappable_base) { 248 ret = vgt_balloon_space(ggtt, &bl_info.space[0], 249 0, mappable_base); 250 251 if (ret) 252 goto err_upon_unmappable; 253 } 254 255 if (mappable_end < ggtt->mappable_end) { 256 ret = vgt_balloon_space(ggtt, &bl_info.space[1], 257 mappable_end, ggtt->mappable_end); 258 259 if (ret) 260 goto err_below_mappable; 261 } 262 263 DRM_INFO("VGT balloon successfully\n"); 264 return 0; 265 266 err_below_mappable: 267 vgt_deballoon_space(ggtt, &bl_info.space[0]); 268 err_upon_unmappable: 269 vgt_deballoon_space(ggtt, &bl_info.space[3]); 270 err_upon_mappable: 271 vgt_deballoon_space(ggtt, &bl_info.space[2]); 272 err: 273 DRM_ERROR("VGT balloon fail\n"); 274 return ret; 275 } 276