xref: /dragonfly/sys/dev/drm/i915/i915_vgpu.c (revision a9783bc6)
1 /*
2  * Copyright(c) 2011-2015 Intel Corporation. All rights reserved.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21  * SOFTWARE.
22  */
23 
24 #include "intel_drv.h"
25 #include "i915_vgpu.h"
26 
27 /**
28  * DOC: Intel GVT-g guest support
29  *
30  * Intel GVT-g is a graphics virtualization technology which shares the
31  * GPU among multiple virtual machines on a time-sharing basis. Each
32  * virtual machine is presented a virtual GPU (vGPU), which has equivalent
33  * features as the underlying physical GPU (pGPU), so i915 driver can run
34  * seamlessly in a virtual machine. This file provides vGPU specific
35  * optimizations when running in a virtual machine, to reduce the complexity
36  * of vGPU emulation and to improve the overall performance.
37  *
38  * A primary function introduced here is so-called "address space ballooning"
39  * technique. Intel GVT-g partitions global graphics memory among multiple VMs,
40  * so each VM can directly access a portion of the memory without hypervisor's
41  * intervention, e.g. filling textures or queuing commands. However with the
42  * partitioning an unmodified i915 driver would assume a smaller graphics
43  * memory starting from address ZERO, then requires vGPU emulation module to
44  * translate the graphics address between 'guest view' and 'host view', for
45  * all registers and command opcodes which contain a graphics memory address.
46  * To reduce the complexity, Intel GVT-g introduces "address space ballooning",
47  * by telling the exact partitioning knowledge to each guest i915 driver, which
48  * then reserves and prevents non-allocated portions from allocation. Thus vGPU
49  * emulation module only needs to scan and validate graphics addresses without
50  * complexity of address translation.
51  *
52  */
53 
54 /**
55  * i915_check_vgpu - detect virtual GPU
56  * @dev_priv: i915 device private
57  *
58  * This function is called at the initialization stage, to detect whether
59  * running on a vGPU.
60  */
61 void i915_check_vgpu(struct drm_i915_private *dev_priv)
62 {
63 	uint64_t magic;
64 	uint32_t version;
65 
66 	BUILD_BUG_ON(sizeof(struct vgt_if) != VGT_PVINFO_SIZE);
67 
68 	magic = __raw_i915_read64(dev_priv, vgtif_reg(magic));
69 	if (magic != VGT_MAGIC)
70 		return;
71 
72 	version = INTEL_VGT_IF_VERSION_ENCODE(
73 		__raw_i915_read16(dev_priv, vgtif_reg(version_major)),
74 		__raw_i915_read16(dev_priv, vgtif_reg(version_minor)));
75 	if (version != INTEL_VGT_IF_VERSION) {
76 		DRM_INFO("VGT interface version mismatch!\n");
77 		return;
78 	}
79 
80 	dev_priv->vgpu.active = true;
81 	DRM_INFO("Virtual GPU for Intel GVT-g detected.\n");
82 }
83 
84 struct _balloon_info_ {
85 	/*
86 	 * There are up to 2 regions per mappable/unmappable graphic
87 	 * memory that might be ballooned. Here, index 0/1 is for mappable
88 	 * graphic memory, 2/3 for unmappable graphic memory.
89 	 */
90 	struct drm_mm_node space[4];
91 };
92 
93 static struct _balloon_info_ bl_info;
94 
95 /**
96  * intel_vgt_deballoon - deballoon reserved graphics address trunks
97  *
98  * This function is called to deallocate the ballooned-out graphic memory, when
99  * driver is unloaded or when ballooning fails.
100  */
101 void intel_vgt_deballoon(struct drm_i915_private *dev_priv)
102 {
103 	int i;
104 
105 	if (!intel_vgpu_active(dev_priv))
106 		return;
107 
108 	DRM_DEBUG("VGT deballoon.\n");
109 
110 	for (i = 0; i < 4; i++) {
111 		if (bl_info.space[i].allocated)
112 			drm_mm_remove_node(&bl_info.space[i]);
113 	}
114 
115 	memset(&bl_info, 0, sizeof(bl_info));
116 }
117 
118 static int vgt_balloon_space(struct drm_mm *mm,
119 			     struct drm_mm_node *node,
120 			     unsigned long start, unsigned long end)
121 {
122 	unsigned long size = end - start;
123 
124 	if (start == end)
125 		return -EINVAL;
126 
127 	DRM_INFO("balloon space: range [ 0x%lx - 0x%lx ] %lu KiB.\n",
128 		 start, end, size / 1024);
129 
130 	node->start = start;
131 	node->size = size;
132 
133 	return drm_mm_reserve_node(mm, node);
134 }
135 
136 /**
137  * intel_vgt_balloon - balloon out reserved graphics address trunks
138  * @dev: drm device
139  *
140  * This function is called at the initialization stage, to balloon out the
141  * graphic address space allocated to other vGPUs, by marking these spaces as
142  * reserved. The ballooning related knowledge(starting address and size of
143  * the mappable/unmappable graphic memory) is described in the vgt_if structure
144  * in a reserved mmio range.
145  *
146  * To give an example, the drawing below depicts one typical scenario after
147  * ballooning. Here the vGPU1 has 2 pieces of graphic address spaces ballooned
148  * out each for the mappable and the non-mappable part. From the vGPU1 point of
149  * view, the total size is the same as the physical one, with the start address
150  * of its graphic space being zero. Yet there are some portions ballooned out(
151  * the shadow part, which are marked as reserved by drm allocator). From the
152  * host point of view, the graphic address space is partitioned by multiple
153  * vGPUs in different VMs. ::
154  *
155  *                        vGPU1 view         Host view
156  *             0 ------> +-----------+     +-----------+
157  *               ^       |###########|     |   vGPU3   |
158  *               |       |###########|     +-----------+
159  *               |       |###########|     |   vGPU2   |
160  *               |       +-----------+     +-----------+
161  *        mappable GM    | available | ==> |   vGPU1   |
162  *               |       +-----------+     +-----------+
163  *               |       |###########|     |           |
164  *               v       |###########|     |   Host    |
165  *               +=======+===========+     +===========+
166  *               ^       |###########|     |   vGPU3   |
167  *               |       |###########|     +-----------+
168  *               |       |###########|     |   vGPU2   |
169  *               |       +-----------+     +-----------+
170  *      unmappable GM    | available | ==> |   vGPU1   |
171  *               |       +-----------+     +-----------+
172  *               |       |###########|     |           |
173  *               |       |###########|     |   Host    |
174  *               v       |###########|     |           |
175  * total GM size ------> +-----------+     +-----------+
176  *
177  * Returns:
178  * zero on success, non-zero if configuration invalid or ballooning failed
179  */
180 int intel_vgt_balloon(struct drm_i915_private *dev_priv)
181 {
182 	struct i915_ggtt *ggtt = &dev_priv->ggtt;
183 	unsigned long ggtt_end = ggtt->base.start + ggtt->base.total;
184 
185 	unsigned long mappable_base, mappable_size, mappable_end;
186 	unsigned long unmappable_base, unmappable_size, unmappable_end;
187 	int ret;
188 
189 	if (!intel_vgpu_active(dev_priv))
190 		return 0;
191 
192 	mappable_base = I915_READ(vgtif_reg(avail_rs.mappable_gmadr.base));
193 	mappable_size = I915_READ(vgtif_reg(avail_rs.mappable_gmadr.size));
194 	unmappable_base = I915_READ(vgtif_reg(avail_rs.nonmappable_gmadr.base));
195 	unmappable_size = I915_READ(vgtif_reg(avail_rs.nonmappable_gmadr.size));
196 
197 	mappable_end = mappable_base + mappable_size;
198 	unmappable_end = unmappable_base + unmappable_size;
199 
200 	DRM_INFO("VGT ballooning configuration:\n");
201 	DRM_INFO("Mappable graphic memory: base 0x%lx size %ldKiB\n",
202 		 mappable_base, mappable_size / 1024);
203 	DRM_INFO("Unmappable graphic memory: base 0x%lx size %ldKiB\n",
204 		 unmappable_base, unmappable_size / 1024);
205 
206 	if (mappable_base < ggtt->base.start ||
207 	    mappable_end > ggtt->mappable_end ||
208 	    unmappable_base < ggtt->mappable_end ||
209 	    unmappable_end > ggtt_end) {
210 		DRM_ERROR("Invalid ballooning configuration!\n");
211 		return -EINVAL;
212 	}
213 
214 	/* Unmappable graphic memory ballooning */
215 	if (unmappable_base > ggtt->mappable_end) {
216 		ret = vgt_balloon_space(&ggtt->base.mm,
217 					&bl_info.space[2],
218 					ggtt->mappable_end,
219 					unmappable_base);
220 
221 		if (ret)
222 			goto err;
223 	}
224 
225 	/*
226 	 * No need to partition out the last physical page,
227 	 * because it is reserved to the guard page.
228 	 */
229 	if (unmappable_end < ggtt_end - PAGE_SIZE) {
230 		ret = vgt_balloon_space(&ggtt->base.mm,
231 					&bl_info.space[3],
232 					unmappable_end,
233 					ggtt_end - PAGE_SIZE);
234 		if (ret)
235 			goto err;
236 	}
237 
238 	/* Mappable graphic memory ballooning */
239 	if (mappable_base > ggtt->base.start) {
240 		ret = vgt_balloon_space(&ggtt->base.mm,
241 					&bl_info.space[0],
242 					ggtt->base.start, mappable_base);
243 
244 		if (ret)
245 			goto err;
246 	}
247 
248 	if (mappable_end < ggtt->mappable_end) {
249 		ret = vgt_balloon_space(&ggtt->base.mm,
250 					&bl_info.space[1],
251 					mappable_end,
252 					ggtt->mappable_end);
253 
254 		if (ret)
255 			goto err;
256 	}
257 
258 	DRM_INFO("VGT balloon successfully\n");
259 	return 0;
260 
261 err:
262 	DRM_ERROR("VGT balloon fail\n");
263 	intel_vgt_deballoon(dev_priv);
264 	return ret;
265 }
266