1 /* 2 * Copyright © 2015 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 */ 23 24 /** 25 * DOC: atomic modeset support 26 * 27 * The functions here implement the state management and hardware programming 28 * dispatch required by the atomic modeset infrastructure. 29 * See intel_atomic_plane.c for the plane-specific atomic functionality. 30 */ 31 32 #include <drm/drmP.h> 33 #include <drm/drm_atomic.h> 34 #include <drm/drm_atomic_helper.h> 35 #include <drm/drm_plane_helper.h> 36 #include "intel_drv.h" 37 38 39 /** 40 * intel_atomic_check - validate state object 41 * @dev: drm device 42 * @state: state to validate 43 */ 44 int intel_atomic_check(struct drm_device *dev, 45 struct drm_atomic_state *state) 46 { 47 int nplanes = dev->mode_config.num_total_plane; 48 int ncrtcs = dev->mode_config.num_crtc; 49 int nconnectors = dev->mode_config.num_connector; 50 enum i915_pipe nuclear_pipe = INVALID_PIPE; 51 struct intel_crtc *nuclear_crtc = NULL; 52 struct intel_crtc_state *crtc_state = NULL; 53 int ret; 54 int i; 55 bool not_nuclear = false; 56 57 /* 58 * FIXME: At the moment, we only support "nuclear pageflip" on a 59 * single CRTC. Cross-crtc updates will be added later. 60 */ 61 for (i = 0; i < nplanes; i++) { 62 struct intel_plane *plane = to_intel_plane(state->planes[i]); 63 if (!plane) 64 continue; 65 66 if (nuclear_pipe == INVALID_PIPE) { 67 nuclear_pipe = plane->pipe; 68 } else if (nuclear_pipe != plane->pipe) { 69 DRM_DEBUG_KMS("i915 only support atomic plane operations on a single CRTC at the moment\n"); 70 return -EINVAL; 71 } 72 } 73 74 /* 75 * FIXME: We only handle planes for now; make sure there are no CRTC's 76 * or connectors involved. 77 */ 78 state->allow_modeset = false; 79 for (i = 0; i < ncrtcs; i++) { 80 struct intel_crtc *crtc = to_intel_crtc(state->crtcs[i]); 81 if (crtc) 82 memset(&crtc->atomic, 0, sizeof(crtc->atomic)); 83 if (crtc && crtc->pipe != nuclear_pipe) 84 not_nuclear = true; 85 if (crtc && crtc->pipe == nuclear_pipe) { 86 nuclear_crtc = crtc; 87 crtc_state = to_intel_crtc_state(state->crtc_states[i]); 88 } 89 } 90 for (i = 0; i < nconnectors; i++) 91 if (state->connectors[i] != NULL) 92 not_nuclear = true; 93 94 if (not_nuclear) { 95 DRM_DEBUG_KMS("i915 only supports atomic plane operations at the moment\n"); 96 return -EINVAL; 97 } 98 99 ret = drm_atomic_helper_check_planes(dev, state); 100 if (ret) 101 return ret; 102 103 /* FIXME: move to crtc atomic check function once it is ready */ 104 ret = intel_atomic_setup_scalers(dev, nuclear_crtc, crtc_state); 105 if (ret) 106 return ret; 107 108 return ret; 109 } 110 111 112 /** 113 * intel_atomic_commit - commit validated state object 114 * @dev: DRM device 115 * @state: the top-level driver state object 116 * @async: asynchronous commit 117 * 118 * This function commits a top-level state object that has been validated 119 * with drm_atomic_helper_check(). 120 * 121 * FIXME: Atomic modeset support for i915 is not yet complete. At the moment 122 * we can only handle plane-related operations and do not yet support 123 * asynchronous commit. 124 * 125 * RETURNS 126 * Zero for success or -errno. 127 */ 128 int intel_atomic_commit(struct drm_device *dev, 129 struct drm_atomic_state *state, 130 bool async) 131 { 132 struct drm_crtc_state *crtc_state; 133 struct drm_crtc *crtc; 134 int ret, i; 135 136 if (async) { 137 DRM_DEBUG_KMS("i915 does not yet support async commit\n"); 138 return -EINVAL; 139 } 140 141 ret = drm_atomic_helper_prepare_planes(dev, state); 142 if (ret) 143 return ret; 144 145 /* Point of no return */ 146 drm_atomic_helper_swap_state(dev, state); 147 148 /* swap crtc_scaler_state */ 149 for_each_crtc_in_state(state, crtc, crtc_state, i) { 150 to_intel_crtc(crtc)->config = to_intel_crtc_state(crtc->state); 151 152 if (INTEL_INFO(dev)->gen >= 9) 153 skl_detach_scalers(to_intel_crtc(crtc)); 154 155 drm_atomic_helper_commit_planes_on_crtc(crtc_state); 156 } 157 158 drm_atomic_helper_wait_for_vblanks(dev, state); 159 drm_atomic_helper_cleanup_planes(dev, state); 160 drm_atomic_state_free(state); 161 162 return 0; 163 } 164 165 /** 166 * intel_connector_atomic_get_property - fetch connector property value 167 * @connector: connector to fetch property for 168 * @state: state containing the property value 169 * @property: property to look up 170 * @val: pointer to write property value into 171 * 172 * The DRM core does not store shadow copies of properties for 173 * atomic-capable drivers. This entrypoint is used to fetch 174 * the current value of a driver-specific connector property. 175 */ 176 int 177 intel_connector_atomic_get_property(struct drm_connector *connector, 178 const struct drm_connector_state *state, 179 struct drm_property *property, 180 uint64_t *val) 181 { 182 int i; 183 184 /* 185 * TODO: We only have atomic modeset for planes at the moment, so the 186 * crtc/connector code isn't quite ready yet. Until it's ready, 187 * continue to look up all property values in the DRM's shadow copy 188 * in obj->properties->values[]. 189 * 190 * When the crtc/connector state work matures, this function should 191 * be updated to read the values out of the state structure instead. 192 */ 193 for (i = 0; i < connector->base.properties->count; i++) { 194 if (connector->base.properties->properties[i] == property) { 195 *val = connector->base.properties->values[i]; 196 return 0; 197 } 198 } 199 200 return -EINVAL; 201 } 202 203 /* 204 * intel_crtc_duplicate_state - duplicate crtc state 205 * @crtc: drm crtc 206 * 207 * Allocates and returns a copy of the crtc state (both common and 208 * Intel-specific) for the specified crtc. 209 * 210 * Returns: The newly allocated crtc state, or NULL on failure. 211 */ 212 struct drm_crtc_state * 213 intel_crtc_duplicate_state(struct drm_crtc *crtc) 214 { 215 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 216 struct intel_crtc_state *crtc_state; 217 218 if (WARN_ON(!intel_crtc->config)) 219 crtc_state = kzalloc(sizeof(*crtc_state), GFP_KERNEL); 220 else 221 crtc_state = kmemdup(intel_crtc->config, 222 sizeof(*intel_crtc->config), GFP_KERNEL); 223 224 if (!crtc_state) 225 return NULL; 226 227 __drm_atomic_helper_crtc_duplicate_state(crtc, &crtc_state->base); 228 229 crtc_state->base.crtc = crtc; 230 231 return &crtc_state->base; 232 } 233 234 /** 235 * intel_crtc_destroy_state - destroy crtc state 236 * @crtc: drm crtc 237 * 238 * Destroys the crtc state (both common and Intel-specific) for the 239 * specified crtc. 240 */ 241 void 242 intel_crtc_destroy_state(struct drm_crtc *crtc, 243 struct drm_crtc_state *state) 244 { 245 drm_atomic_helper_crtc_destroy_state(crtc, state); 246 } 247 248 /** 249 * intel_atomic_setup_scalers() - setup scalers for crtc per staged requests 250 * @dev: DRM device 251 * @crtc: intel crtc 252 * @crtc_state: incoming crtc_state to validate and setup scalers 253 * 254 * This function sets up scalers based on staged scaling requests for 255 * a @crtc and its planes. It is called from crtc level check path. If request 256 * is a supportable request, it attaches scalers to requested planes and crtc. 257 * 258 * This function takes into account the current scaler(s) in use by any planes 259 * not being part of this atomic state 260 * 261 * Returns: 262 * 0 - scalers were setup succesfully 263 * error code - otherwise 264 */ 265 int intel_atomic_setup_scalers(struct drm_device *dev, 266 struct intel_crtc *intel_crtc, 267 struct intel_crtc_state *crtc_state) 268 { 269 struct drm_plane *plane = NULL; 270 struct intel_plane *intel_plane; 271 struct intel_plane_state *plane_state = NULL; 272 struct intel_crtc_scaler_state *scaler_state; 273 struct drm_atomic_state *drm_state; 274 int num_scalers_need; 275 int i, j; 276 277 if (INTEL_INFO(dev)->gen < 9 || !intel_crtc || !crtc_state) 278 return 0; 279 280 scaler_state = &crtc_state->scaler_state; 281 drm_state = crtc_state->base.state; 282 283 num_scalers_need = hweight32(scaler_state->scaler_users); 284 DRM_DEBUG_KMS("crtc_state = %p need = %d avail = %d scaler_users = 0x%x\n", 285 crtc_state, num_scalers_need, intel_crtc->num_scalers, 286 scaler_state->scaler_users); 287 288 /* 289 * High level flow: 290 * - staged scaler requests are already in scaler_state->scaler_users 291 * - check whether staged scaling requests can be supported 292 * - add planes using scalers that aren't in current transaction 293 * - assign scalers to requested users 294 * - as part of plane commit, scalers will be committed 295 * (i.e., either attached or detached) to respective planes in hw 296 * - as part of crtc_commit, scaler will be either attached or detached 297 * to crtc in hw 298 */ 299 300 /* fail if required scalers > available scalers */ 301 if (num_scalers_need > intel_crtc->num_scalers){ 302 DRM_DEBUG_KMS("Too many scaling requests %d > %d\n", 303 num_scalers_need, intel_crtc->num_scalers); 304 return -EINVAL; 305 } 306 307 /* walkthrough scaler_users bits and start assigning scalers */ 308 for (i = 0; i < sizeof(scaler_state->scaler_users) * 8; i++) { 309 int *scaler_id; 310 311 /* skip if scaler not required */ 312 if (!(scaler_state->scaler_users & (1 << i))) 313 continue; 314 315 if (i == SKL_CRTC_INDEX) { 316 /* panel fitter case: assign as a crtc scaler */ 317 scaler_id = &scaler_state->scaler_id; 318 } else { 319 if (!drm_state) 320 continue; 321 322 /* plane scaler case: assign as a plane scaler */ 323 /* find the plane that set the bit as scaler_user */ 324 plane = drm_state->planes[i]; 325 326 /* 327 * to enable/disable hq mode, add planes that are using scaler 328 * into this transaction 329 */ 330 if (!plane) { 331 struct drm_plane_state *state; 332 plane = drm_plane_from_index(dev, i); 333 state = drm_atomic_get_plane_state(drm_state, plane); 334 if (IS_ERR(state)) { 335 DRM_DEBUG_KMS("Failed to add [PLANE:%d] to drm_state\n", 336 plane->base.id); 337 return PTR_ERR(state); 338 } 339 } 340 341 intel_plane = to_intel_plane(plane); 342 343 /* plane on different crtc cannot be a scaler user of this crtc */ 344 if (WARN_ON(intel_plane->pipe != intel_crtc->pipe)) { 345 continue; 346 } 347 348 plane_state = to_intel_plane_state(drm_state->plane_states[i]); 349 scaler_id = &plane_state->scaler_id; 350 } 351 352 if (*scaler_id < 0) { 353 /* find a free scaler */ 354 for (j = 0; j < intel_crtc->num_scalers; j++) { 355 if (!scaler_state->scalers[j].in_use) { 356 scaler_state->scalers[j].in_use = 1; 357 *scaler_id = scaler_state->scalers[j].id; 358 DRM_DEBUG_KMS("Attached scaler id %u.%u to %s:%d\n", 359 intel_crtc->pipe, 360 i == SKL_CRTC_INDEX ? scaler_state->scaler_id : 361 plane_state->scaler_id, 362 i == SKL_CRTC_INDEX ? "CRTC" : "PLANE", 363 i == SKL_CRTC_INDEX ? intel_crtc->base.base.id : 364 plane->base.id); 365 break; 366 } 367 } 368 } 369 370 if (WARN_ON(*scaler_id < 0)) { 371 DRM_DEBUG_KMS("Cannot find scaler for %s:%d\n", 372 i == SKL_CRTC_INDEX ? "CRTC" : "PLANE", 373 i == SKL_CRTC_INDEX ? intel_crtc->base.base.id:plane->base.id); 374 continue; 375 } 376 377 /* set scaler mode */ 378 if (num_scalers_need == 1 && intel_crtc->pipe != PIPE_C) { 379 /* 380 * when only 1 scaler is in use on either pipe A or B, 381 * scaler 0 operates in high quality (HQ) mode. 382 * In this case use scaler 0 to take advantage of HQ mode 383 */ 384 *scaler_id = 0; 385 scaler_state->scalers[0].in_use = 1; 386 scaler_state->scalers[0].mode = PS_SCALER_MODE_HQ; 387 scaler_state->scalers[1].in_use = 0; 388 } else { 389 scaler_state->scalers[*scaler_id].mode = PS_SCALER_MODE_DYN; 390 } 391 } 392 393 return 0; 394 } 395