1 /* 2 * Copyright © 2006-2007 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 * 23 * Authors: 24 * Eric Anholt <eric@anholt.net> 25 * 26 * $FreeBSD: src/sys/dev/drm2/i915/intel_crt.c,v 1.1 2012/05/22 11:07:44 kib Exp $ 27 */ 28 29 #include <drm/drmP.h> 30 #include <drm/drm_crtc.h> 31 #include <drm/drm_crtc_helper.h> 32 #include <drm/drm_edid.h> 33 #include "intel_drv.h" 34 #include <drm/i915_drm.h> 35 #include "i915_drv.h" 36 37 /* Here's the desired hotplug mode */ 38 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \ 39 ADPA_CRT_HOTPLUG_WARMUP_10MS | \ 40 ADPA_CRT_HOTPLUG_SAMPLE_4S | \ 41 ADPA_CRT_HOTPLUG_VOLTAGE_50 | \ 42 ADPA_CRT_HOTPLUG_VOLREF_325MV | \ 43 ADPA_CRT_HOTPLUG_ENABLE) 44 45 struct intel_crt { 46 struct intel_encoder base; 47 bool force_hotplug_required; 48 }; 49 50 static struct intel_crt *intel_attached_crt(struct drm_connector *connector) 51 { 52 return container_of(intel_attached_encoder(connector), 53 struct intel_crt, base); 54 } 55 56 static void intel_crt_dpms(struct drm_encoder *encoder, int mode) 57 { 58 struct drm_device *dev = encoder->dev; 59 struct drm_i915_private *dev_priv = dev->dev_private; 60 u32 temp, reg; 61 62 if (HAS_PCH_SPLIT(dev)) 63 reg = PCH_ADPA; 64 else 65 reg = ADPA; 66 67 temp = I915_READ(reg); 68 temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE); 69 temp &= ~ADPA_DAC_ENABLE; 70 71 switch (mode) { 72 case DRM_MODE_DPMS_ON: 73 temp |= ADPA_DAC_ENABLE; 74 break; 75 case DRM_MODE_DPMS_STANDBY: 76 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE; 77 break; 78 case DRM_MODE_DPMS_SUSPEND: 79 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE; 80 break; 81 case DRM_MODE_DPMS_OFF: 82 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE; 83 break; 84 } 85 86 I915_WRITE(reg, temp); 87 } 88 89 static int intel_crt_mode_valid(struct drm_connector *connector, 90 struct drm_display_mode *mode) 91 { 92 struct drm_device *dev = connector->dev; 93 94 int max_clock = 0; 95 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 96 return MODE_NO_DBLESCAN; 97 98 if (mode->clock < 25000) 99 return MODE_CLOCK_LOW; 100 101 if (IS_GEN2(dev)) 102 max_clock = 350000; 103 else 104 max_clock = 400000; 105 if (mode->clock > max_clock) 106 return MODE_CLOCK_HIGH; 107 108 return MODE_OK; 109 } 110 111 static bool intel_crt_mode_fixup(struct drm_encoder *encoder, 112 const struct drm_display_mode *mode, 113 struct drm_display_mode *adjusted_mode) 114 { 115 return true; 116 } 117 118 static void intel_crt_mode_set(struct drm_encoder *encoder, 119 struct drm_display_mode *mode, 120 struct drm_display_mode *adjusted_mode) 121 { 122 123 struct drm_device *dev = encoder->dev; 124 struct drm_crtc *crtc = encoder->crtc; 125 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 126 struct drm_i915_private *dev_priv = dev->dev_private; 127 int dpll_md_reg; 128 u32 adpa, dpll_md; 129 u32 adpa_reg; 130 131 dpll_md_reg = DPLL_MD(intel_crtc->pipe); 132 133 if (HAS_PCH_SPLIT(dev)) 134 adpa_reg = PCH_ADPA; 135 else 136 adpa_reg = ADPA; 137 138 /* 139 * Disable separate mode multiplier used when cloning SDVO to CRT 140 * XXX this needs to be adjusted when we really are cloning 141 */ 142 if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) { 143 dpll_md = I915_READ(dpll_md_reg); 144 I915_WRITE(dpll_md_reg, 145 dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK); 146 } 147 148 adpa = ADPA_HOTPLUG_BITS; 149 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) 150 adpa |= ADPA_HSYNC_ACTIVE_HIGH; 151 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) 152 adpa |= ADPA_VSYNC_ACTIVE_HIGH; 153 154 /* For CPT allow 3 pipe config, for others just use A or B */ 155 if (HAS_PCH_CPT(dev)) 156 adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe); 157 else if (intel_crtc->pipe == 0) 158 adpa |= ADPA_PIPE_A_SELECT; 159 else 160 adpa |= ADPA_PIPE_B_SELECT; 161 162 if (!HAS_PCH_SPLIT(dev)) 163 I915_WRITE(BCLRPAT(intel_crtc->pipe), 0); 164 165 I915_WRITE(adpa_reg, adpa); 166 } 167 168 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector) 169 { 170 struct drm_device *dev = connector->dev; 171 struct intel_crt *crt = intel_attached_crt(connector); 172 struct drm_i915_private *dev_priv = dev->dev_private; 173 u32 adpa; 174 bool ret; 175 176 /* The first time through, trigger an explicit detection cycle */ 177 if (crt->force_hotplug_required) { 178 bool turn_off_dac = HAS_PCH_SPLIT(dev); 179 u32 save_adpa; 180 181 crt->force_hotplug_required = 0; 182 183 save_adpa = adpa = I915_READ(PCH_ADPA); 184 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa); 185 186 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER; 187 if (turn_off_dac) 188 adpa &= ~ADPA_DAC_ENABLE; 189 190 I915_WRITE(PCH_ADPA, adpa); 191 192 if (_intel_wait_for(dev, 193 (I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0, 194 1000, 1, "915crt")) 195 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER\n"); 196 197 if (turn_off_dac) { 198 I915_WRITE(PCH_ADPA, save_adpa); 199 POSTING_READ(PCH_ADPA); 200 } 201 } 202 203 /* Check the status to see if both blue and green are on now */ 204 adpa = I915_READ(PCH_ADPA); 205 if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0) 206 ret = true; 207 else 208 ret = false; 209 DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret); 210 211 return ret; 212 } 213 214 /** 215 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence. 216 * 217 * Not for i915G/i915GM 218 * 219 * \return true if CRT is connected. 220 * \return false if CRT is disconnected. 221 */ 222 static bool intel_crt_detect_hotplug(struct drm_connector *connector) 223 { 224 struct drm_device *dev = connector->dev; 225 struct drm_i915_private *dev_priv = dev->dev_private; 226 u32 hotplug_en, orig, stat; 227 bool ret = false; 228 int i, tries = 0; 229 230 if (HAS_PCH_SPLIT(dev)) 231 return intel_ironlake_crt_detect_hotplug(connector); 232 233 /* 234 * On 4 series desktop, CRT detect sequence need to be done twice 235 * to get a reliable result. 236 */ 237 238 if (IS_G4X(dev) && !IS_GM45(dev)) 239 tries = 2; 240 else 241 tries = 1; 242 hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN); 243 hotplug_en |= CRT_HOTPLUG_FORCE_DETECT; 244 245 for (i = 0; i < tries ; i++) { 246 /* turn on the FORCE_DETECT */ 247 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en); 248 /* wait for FORCE_DETECT to go off */ 249 if (_intel_wait_for(dev, 250 (I915_READ(PORT_HOTPLUG_EN) & CRT_HOTPLUG_FORCE_DETECT) == 0, 251 1000, 1, "915cr2")) 252 DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off"); 253 } 254 255 stat = I915_READ(PORT_HOTPLUG_STAT); 256 if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE) 257 ret = true; 258 259 /* clear the interrupt we just generated, if any */ 260 I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS); 261 262 /* and put the bits back */ 263 I915_WRITE(PORT_HOTPLUG_EN, orig); 264 265 return ret; 266 } 267 268 static bool intel_crt_detect_ddc(struct drm_connector *connector) 269 { 270 struct intel_crt *crt = intel_attached_crt(connector); 271 struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private; 272 273 /* CRT should always be at 0, but check anyway */ 274 if (crt->base.type != INTEL_OUTPUT_ANALOG) 275 return false; 276 277 if (intel_ddc_probe(&crt->base, dev_priv->crt_ddc_pin)) { 278 struct edid *edid; 279 bool is_digital = false; 280 281 edid = drm_get_edid(connector, 282 dev_priv->gmbus[dev_priv->crt_ddc_pin]); 283 /* 284 * This may be a DVI-I connector with a shared DDC 285 * link between analog and digital outputs, so we 286 * have to check the EDID input spec of the attached device. 287 * 288 * On the other hand, what should we do if it is a broken EDID? 289 */ 290 if (edid != NULL) { 291 is_digital = edid->input & DRM_EDID_INPUT_DIGITAL; 292 drm_free(edid, DRM_MEM_KMS); 293 } 294 295 if (!is_digital) { 296 DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n"); 297 return true; 298 } else { 299 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n"); 300 } 301 } 302 303 return false; 304 } 305 306 static enum drm_connector_status 307 intel_crt_load_detect(struct intel_crt *crt) 308 { 309 struct drm_device *dev = crt->base.base.dev; 310 struct drm_i915_private *dev_priv = dev->dev_private; 311 uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe; 312 uint32_t save_bclrpat; 313 uint32_t save_vtotal; 314 uint32_t vtotal, vactive; 315 uint32_t vsample; 316 uint32_t vblank, vblank_start, vblank_end; 317 uint32_t dsl; 318 uint32_t bclrpat_reg; 319 uint32_t vtotal_reg; 320 uint32_t vblank_reg; 321 uint32_t vsync_reg; 322 uint32_t pipeconf_reg; 323 uint32_t pipe_dsl_reg; 324 uint8_t st00; 325 enum drm_connector_status status; 326 327 DRM_DEBUG_KMS("starting load-detect on CRT\n"); 328 329 bclrpat_reg = BCLRPAT(pipe); 330 vtotal_reg = VTOTAL(pipe); 331 vblank_reg = VBLANK(pipe); 332 vsync_reg = VSYNC(pipe); 333 pipeconf_reg = PIPECONF(pipe); 334 pipe_dsl_reg = PIPEDSL(pipe); 335 336 save_bclrpat = I915_READ(bclrpat_reg); 337 save_vtotal = I915_READ(vtotal_reg); 338 vblank = I915_READ(vblank_reg); 339 340 vtotal = ((save_vtotal >> 16) & 0xfff) + 1; 341 vactive = (save_vtotal & 0x7ff) + 1; 342 343 vblank_start = (vblank & 0xfff) + 1; 344 vblank_end = ((vblank >> 16) & 0xfff) + 1; 345 346 /* Set the border color to purple. */ 347 I915_WRITE(bclrpat_reg, 0x500050); 348 349 if (!IS_GEN2(dev)) { 350 uint32_t pipeconf = I915_READ(pipeconf_reg); 351 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER); 352 POSTING_READ(pipeconf_reg); 353 /* Wait for next Vblank to substitue 354 * border color for Color info */ 355 intel_wait_for_vblank(dev, pipe); 356 st00 = I915_READ8(VGA_MSR_WRITE); 357 status = ((st00 & (1 << 4)) != 0) ? 358 connector_status_connected : 359 connector_status_disconnected; 360 361 I915_WRITE(pipeconf_reg, pipeconf); 362 } else { 363 bool restore_vblank = false; 364 int count, detect; 365 366 /* 367 * If there isn't any border, add some. 368 * Yes, this will flicker 369 */ 370 if (vblank_start <= vactive && vblank_end >= vtotal) { 371 uint32_t vsync = I915_READ(vsync_reg); 372 uint32_t vsync_start = (vsync & 0xffff) + 1; 373 374 vblank_start = vsync_start; 375 I915_WRITE(vblank_reg, 376 (vblank_start - 1) | 377 ((vblank_end - 1) << 16)); 378 restore_vblank = true; 379 } 380 /* sample in the vertical border, selecting the larger one */ 381 if (vblank_start - vactive >= vtotal - vblank_end) 382 vsample = (vblank_start + vactive) >> 1; 383 else 384 vsample = (vtotal + vblank_end) >> 1; 385 386 /* 387 * Wait for the border to be displayed 388 */ 389 while (I915_READ(pipe_dsl_reg) >= vactive) 390 ; 391 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample) 392 ; 393 /* 394 * Watch ST00 for an entire scanline 395 */ 396 detect = 0; 397 count = 0; 398 do { 399 count++; 400 /* Read the ST00 VGA status register */ 401 st00 = I915_READ8(VGA_MSR_WRITE); 402 if (st00 & (1 << 4)) 403 detect++; 404 } while ((I915_READ(pipe_dsl_reg) == dsl)); 405 406 /* restore vblank if necessary */ 407 if (restore_vblank) 408 I915_WRITE(vblank_reg, vblank); 409 /* 410 * If more than 3/4 of the scanline detected a monitor, 411 * then it is assumed to be present. This works even on i830, 412 * where there isn't any way to force the border color across 413 * the screen 414 */ 415 status = detect * 4 > count * 3 ? 416 connector_status_connected : 417 connector_status_disconnected; 418 } 419 420 /* Restore previous settings */ 421 I915_WRITE(bclrpat_reg, save_bclrpat); 422 423 return status; 424 } 425 426 static enum drm_connector_status 427 intel_crt_detect(struct drm_connector *connector, bool force) 428 { 429 struct drm_device *dev = connector->dev; 430 struct intel_crt *crt = intel_attached_crt(connector); 431 enum drm_connector_status status; 432 struct intel_load_detect_pipe tmp; 433 434 if (I915_HAS_HOTPLUG(dev)) { 435 if (intel_crt_detect_hotplug(connector)) { 436 DRM_DEBUG_KMS("CRT detected via hotplug\n"); 437 return connector_status_connected; 438 } else { 439 DRM_DEBUG_KMS("CRT not detected via hotplug\n"); 440 return connector_status_disconnected; 441 } 442 } 443 444 if (intel_crt_detect_ddc(connector)) 445 return connector_status_connected; 446 447 if (!force) 448 return connector->status; 449 450 /* for pre-945g platforms use load detect */ 451 if (intel_get_load_detect_pipe(&crt->base, connector, NULL, 452 &tmp)) { 453 if (intel_crt_detect_ddc(connector)) 454 status = connector_status_connected; 455 else 456 status = intel_crt_load_detect(crt); 457 intel_release_load_detect_pipe(&crt->base, connector, 458 &tmp); 459 } else 460 status = connector_status_unknown; 461 462 return status; 463 } 464 465 static void intel_crt_destroy(struct drm_connector *connector) 466 { 467 468 #if 0 469 drm_sysfs_connector_remove(connector); 470 #endif 471 drm_connector_cleanup(connector); 472 drm_free(connector, DRM_MEM_KMS); 473 } 474 475 static int intel_crt_get_modes(struct drm_connector *connector) 476 { 477 struct drm_device *dev = connector->dev; 478 struct drm_i915_private *dev_priv = dev->dev_private; 479 int ret; 480 481 ret = intel_ddc_get_modes(connector, 482 dev_priv->gmbus[dev_priv->crt_ddc_pin]); 483 if (ret || !IS_G4X(dev)) 484 return ret; 485 486 /* Try to probe digital port for output in DVI-I -> VGA mode. */ 487 return (intel_ddc_get_modes(connector, 488 dev_priv->gmbus[GMBUS_PORT_DPB])); 489 } 490 491 static int intel_crt_set_property(struct drm_connector *connector, 492 struct drm_property *property, 493 uint64_t value) 494 { 495 return 0; 496 } 497 498 static void intel_crt_reset(struct drm_connector *connector) 499 { 500 struct drm_device *dev = connector->dev; 501 struct intel_crt *crt = intel_attached_crt(connector); 502 503 if (HAS_PCH_SPLIT(dev)) 504 crt->force_hotplug_required = 1; 505 } 506 507 /* 508 * Routines for controlling stuff on the analog port 509 */ 510 511 static const struct drm_encoder_helper_funcs intel_crt_helper_funcs = { 512 .dpms = intel_crt_dpms, 513 .mode_fixup = intel_crt_mode_fixup, 514 .prepare = intel_encoder_prepare, 515 .commit = intel_encoder_commit, 516 .mode_set = intel_crt_mode_set, 517 }; 518 519 static const struct drm_connector_funcs intel_crt_connector_funcs = { 520 .reset = intel_crt_reset, 521 .dpms = drm_helper_connector_dpms, 522 .detect = intel_crt_detect, 523 .fill_modes = drm_helper_probe_single_connector_modes, 524 .destroy = intel_crt_destroy, 525 .set_property = intel_crt_set_property, 526 }; 527 528 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = { 529 .mode_valid = intel_crt_mode_valid, 530 .get_modes = intel_crt_get_modes, 531 .best_encoder = intel_best_encoder, 532 }; 533 534 static const struct drm_encoder_funcs intel_crt_enc_funcs = { 535 .destroy = intel_encoder_destroy, 536 }; 537 538 static int intel_no_crt_dmi_callback(const struct dmi_system_id *id) 539 { 540 DRM_DEBUG_KMS("Skipping CRT initialization for %s\n", id->ident); 541 return 1; 542 } 543 544 static const struct dmi_system_id intel_no_crt[] = { 545 { 546 .callback = intel_no_crt_dmi_callback, 547 .ident = "ACER ZGB", 548 .matches = { 549 DMI_MATCH(DMI_SYS_VENDOR, "ACER"), 550 DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"), 551 }, 552 }, 553 { } 554 }; 555 556 void intel_crt_init(struct drm_device *dev) 557 { 558 struct drm_connector *connector; 559 struct intel_crt *crt; 560 struct intel_connector *intel_connector; 561 struct drm_i915_private *dev_priv = dev->dev_private; 562 563 /* Skip machines without VGA that falsely report hotplug events */ 564 if (dmi_check_system(intel_no_crt)) 565 return; 566 567 crt = kmalloc(sizeof(struct intel_crt), DRM_MEM_KMS, M_WAITOK | M_ZERO); 568 intel_connector = kmalloc(sizeof(struct intel_connector), DRM_MEM_KMS, 569 M_WAITOK | M_ZERO); 570 571 connector = &intel_connector->base; 572 drm_connector_init(dev, &intel_connector->base, 573 &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA); 574 575 drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs, 576 DRM_MODE_ENCODER_DAC); 577 578 intel_connector_attach_encoder(intel_connector, &crt->base); 579 580 crt->base.type = INTEL_OUTPUT_ANALOG; 581 crt->base.clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT | 582 1 << INTEL_ANALOG_CLONE_BIT | 583 1 << INTEL_SDVO_LVDS_CLONE_BIT); 584 crt->base.crtc_mask = (1 << 0) | (1 << 1); 585 if (IS_GEN2(dev)) 586 connector->interlace_allowed = 0; 587 else 588 connector->interlace_allowed = 1; 589 connector->doublescan_allowed = 0; 590 591 drm_encoder_helper_add(&crt->base.base, &intel_crt_helper_funcs); 592 drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs); 593 594 #if 0 595 drm_sysfs_connector_add(connector); 596 #endif 597 598 if (I915_HAS_HOTPLUG(dev)) 599 connector->polled = DRM_CONNECTOR_POLL_HPD; 600 else 601 connector->polled = DRM_CONNECTOR_POLL_CONNECT; 602 603 /* 604 * Configure the automatic hotplug detection stuff 605 */ 606 crt->force_hotplug_required = 0; 607 if (HAS_PCH_SPLIT(dev)) { 608 u32 adpa; 609 610 adpa = I915_READ(PCH_ADPA); 611 adpa &= ~ADPA_CRT_HOTPLUG_MASK; 612 adpa |= ADPA_HOTPLUG_BITS; 613 I915_WRITE(PCH_ADPA, adpa); 614 POSTING_READ(PCH_ADPA); 615 616 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa); 617 crt->force_hotplug_required = 1; 618 } 619 620 dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS; 621 } 622