xref: /dragonfly/sys/dev/drm/i915/intel_dsi.h (revision 799ba435)
1 /*
2  * Copyright © 2013 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21  * DEALINGS IN THE SOFTWARE.
22  */
23 
24 #ifndef _INTEL_DSI_H
25 #define _INTEL_DSI_H
26 
27 #include <drm/drmP.h>
28 #include <drm/drm_crtc.h>
29 #include <drm/drm_mipi_dsi.h>
30 #include "intel_drv.h"
31 
32 /* Dual Link support */
33 #define DSI_DUAL_LINK_NONE		0
34 #define DSI_DUAL_LINK_FRONT_BACK	1
35 #define DSI_DUAL_LINK_PIXEL_ALT		2
36 
37 struct intel_dsi_host;
38 
39 struct intel_dsi {
40 	struct intel_encoder base;
41 
42 	struct drm_panel *panel;
43 	struct intel_dsi_host *dsi_hosts[I915_MAX_PORTS];
44 
45 	/* GPIO Desc for CRC based Panel control */
46 	struct gpio_desc *gpio_panel;
47 
48 	struct intel_connector *attached_connector;
49 
50 	/* bit mask of ports being driven */
51 	u16 ports;
52 
53 	/* if true, use HS mode, otherwise LP */
54 	bool hs;
55 
56 	/* virtual channel */
57 	int channel;
58 
59 	/* Video mode or command mode */
60 	u16 operation_mode;
61 
62 	/* number of DSI lanes */
63 	unsigned int lane_count;
64 
65 	/*
66 	 * video mode pixel format
67 	 *
68 	 * XXX: consolidate on .format in struct mipi_dsi_device.
69 	 */
70 	enum mipi_dsi_pixel_format pixel_format;
71 
72 	/* video mode format for MIPI_VIDEO_MODE_FORMAT register */
73 	u32 video_mode_format;
74 
75 	/* eot for MIPI_EOT_DISABLE register */
76 	u8 eotp_pkt;
77 	u8 clock_stop;
78 
79 	u8 escape_clk_div;
80 	u8 dual_link;
81 	u8 pixel_overlap;
82 	u32 port_bits;
83 	u32 bw_timer;
84 	u32 dphy_reg;
85 	u32 video_frmt_cfg_bits;
86 	u16 lp_byte_clk;
87 
88 	/* timeouts in byte clocks */
89 	u16 lp_rx_timeout;
90 	u16 turn_arnd_val;
91 	u16 rst_timer_val;
92 	u16 hs_to_lp_count;
93 	u16 clk_lp_to_hs_count;
94 	u16 clk_hs_to_lp_count;
95 
96 	u16 init_count;
97 	u32 pclk;
98 	u16 burst_mode_ratio;
99 
100 	/* all delays in ms */
101 	u16 backlight_off_delay;
102 	u16 backlight_on_delay;
103 	u16 panel_on_delay;
104 	u16 panel_off_delay;
105 	u16 panel_pwr_cycle_delay;
106 };
107 
108 struct intel_dsi_host {
109 	struct mipi_dsi_host base;
110 	struct intel_dsi *intel_dsi;
111 	enum port port;
112 
113 	/* our little hack */
114 	struct mipi_dsi_device *device;
115 };
116 
117 static inline struct intel_dsi_host *to_intel_dsi_host(struct mipi_dsi_host *h)
118 {
119 	return container_of(h, struct intel_dsi_host, base);
120 }
121 
122 #define for_each_dsi_port(__port, __ports_mask) for_each_port_masked(__port, __ports_mask)
123 
124 static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder)
125 {
126 	return container_of(encoder, struct intel_dsi, base.base);
127 }
128 
129 bool intel_dsi_pll_is_enabled(struct drm_i915_private *dev_priv);
130 int intel_compute_dsi_pll(struct intel_encoder *encoder,
131 			  struct intel_crtc_state *config);
132 void intel_enable_dsi_pll(struct intel_encoder *encoder,
133 			  const struct intel_crtc_state *config);
134 void intel_disable_dsi_pll(struct intel_encoder *encoder);
135 u32 intel_dsi_get_pclk(struct intel_encoder *encoder, int pipe_bpp,
136 		       struct intel_crtc_state *config);
137 void intel_dsi_reset_clocks(struct intel_encoder *encoder,
138 			    enum port port);
139 
140 struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id);
141 enum mipi_dsi_pixel_format pixel_format_from_register_bits(u32 fmt);
142 
143 #endif /* _INTEL_DSI_H */
144