1 /* 2 * Copyright © 2013 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 */ 23 24 #ifndef _INTEL_DSI_H 25 #define _INTEL_DSI_H 26 27 #include <drm/drmP.h> 28 #include <drm/drm_crtc.h> 29 #include <drm/drm_mipi_dsi.h> 30 #include "intel_drv.h" 31 32 /* Dual Link support */ 33 #define DSI_DUAL_LINK_NONE 0 34 #define DSI_DUAL_LINK_FRONT_BACK 1 35 #define DSI_DUAL_LINK_PIXEL_ALT 2 36 37 int dsi_pixel_format_bpp(int pixel_format); 38 39 struct intel_dsi_host; 40 41 struct intel_dsi { 42 struct intel_encoder base; 43 44 struct drm_panel *panel; 45 struct intel_dsi_host *dsi_hosts[I915_MAX_PORTS]; 46 47 /* GPIO Desc for CRC based Panel control */ 48 struct gpio_desc *gpio_panel; 49 50 struct intel_connector *attached_connector; 51 52 /* bit mask of ports being driven */ 53 u16 ports; 54 55 /* if true, use HS mode, otherwise LP */ 56 bool hs; 57 58 /* virtual channel */ 59 int channel; 60 61 /* Video mode or command mode */ 62 u16 operation_mode; 63 64 /* number of DSI lanes */ 65 unsigned int lane_count; 66 67 /* video mode pixel format for MIPI_DSI_FUNC_PRG register */ 68 u32 pixel_format; 69 70 /* video mode format for MIPI_VIDEO_MODE_FORMAT register */ 71 u32 video_mode_format; 72 73 /* eot for MIPI_EOT_DISABLE register */ 74 u8 eotp_pkt; 75 u8 clock_stop; 76 77 u8 escape_clk_div; 78 u8 dual_link; 79 u8 pixel_overlap; 80 u32 port_bits; 81 u32 bw_timer; 82 u32 dphy_reg; 83 u32 video_frmt_cfg_bits; 84 u16 lp_byte_clk; 85 86 /* timeouts in byte clocks */ 87 u16 lp_rx_timeout; 88 u16 turn_arnd_val; 89 u16 rst_timer_val; 90 u16 hs_to_lp_count; 91 u16 clk_lp_to_hs_count; 92 u16 clk_hs_to_lp_count; 93 94 u16 init_count; 95 u32 pclk; 96 u16 burst_mode_ratio; 97 98 /* all delays in ms */ 99 u16 backlight_off_delay; 100 u16 backlight_on_delay; 101 u16 panel_on_delay; 102 u16 panel_off_delay; 103 u16 panel_pwr_cycle_delay; 104 }; 105 106 struct intel_dsi_host { 107 struct mipi_dsi_host base; 108 struct intel_dsi *intel_dsi; 109 enum port port; 110 111 /* our little hack */ 112 struct mipi_dsi_device *device; 113 }; 114 115 static inline struct intel_dsi_host *to_intel_dsi_host(struct mipi_dsi_host *h) 116 { 117 return container_of(h, struct intel_dsi_host, base); 118 } 119 120 #define for_each_dsi_port(__port, __ports_mask) \ 121 for ((__port) = PORT_A; (__port) < I915_MAX_PORTS; (__port)++) \ 122 for_each_if ((__ports_mask) & (1 << (__port))) 123 124 static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder) 125 { 126 return container_of(encoder, struct intel_dsi, base.base); 127 } 128 129 extern void intel_enable_dsi_pll(struct intel_encoder *encoder); 130 extern void intel_disable_dsi_pll(struct intel_encoder *encoder); 131 extern u32 intel_dsi_get_pclk(struct intel_encoder *encoder, int pipe_bpp); 132 extern void intel_dsi_reset_clocks(struct intel_encoder *encoder, 133 enum port port); 134 135 struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id); 136 137 #endif /* _INTEL_DSI_H */ 138