1 /* 2 * Copyright 2006 Dave Airlie <airlied@linux.ie> 3 * Copyright © 2006-2007 Intel Corporation 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: 25 * Eric Anholt <eric@anholt.net> 26 */ 27 #include <linux/i2c.h> 28 #include <linux/slab.h> 29 #include <drm/drmP.h> 30 #include <drm/drm_atomic_helper.h> 31 #include <drm/drm_crtc.h> 32 #include "intel_drv.h" 33 #include <drm/i915_drm.h> 34 #include "i915_drv.h" 35 #include "dvo.h" 36 37 #define SIL164_ADDR 0x38 38 #define CH7xxx_ADDR 0x76 39 #define TFP410_ADDR 0x38 40 #define NS2501_ADDR 0x38 41 42 static const struct intel_dvo_device intel_dvo_devices[] = { 43 { 44 .type = INTEL_DVO_CHIP_TMDS, 45 .name = "sil164", 46 .dvo_reg = DVOC, 47 .dvo_srcdim_reg = DVOC_SRCDIM, 48 .slave_addr = SIL164_ADDR, 49 .dev_ops = &sil164_ops, 50 }, 51 { 52 .type = INTEL_DVO_CHIP_TMDS, 53 .name = "ch7xxx", 54 .dvo_reg = DVOC, 55 .dvo_srcdim_reg = DVOC_SRCDIM, 56 .slave_addr = CH7xxx_ADDR, 57 .dev_ops = &ch7xxx_ops, 58 }, 59 { 60 .type = INTEL_DVO_CHIP_TMDS, 61 .name = "ch7xxx", 62 .dvo_reg = DVOC, 63 .dvo_srcdim_reg = DVOC_SRCDIM, 64 .slave_addr = 0x75, /* For some ch7010 */ 65 .dev_ops = &ch7xxx_ops, 66 }, 67 { 68 .type = INTEL_DVO_CHIP_LVDS, 69 .name = "ivch", 70 .dvo_reg = DVOA, 71 .dvo_srcdim_reg = DVOA_SRCDIM, 72 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */ 73 .dev_ops = &ivch_ops, 74 }, 75 { 76 .type = INTEL_DVO_CHIP_TMDS, 77 .name = "tfp410", 78 .dvo_reg = DVOC, 79 .dvo_srcdim_reg = DVOC_SRCDIM, 80 .slave_addr = TFP410_ADDR, 81 .dev_ops = &tfp410_ops, 82 }, 83 { 84 .type = INTEL_DVO_CHIP_LVDS, 85 .name = "ch7017", 86 .dvo_reg = DVOC, 87 .dvo_srcdim_reg = DVOC_SRCDIM, 88 .slave_addr = 0x75, 89 .gpio = GMBUS_PIN_DPB, 90 .dev_ops = &ch7017_ops, 91 }, 92 { 93 .type = INTEL_DVO_CHIP_TMDS, 94 .name = "ns2501", 95 .dvo_reg = DVOB, 96 .dvo_srcdim_reg = DVOB_SRCDIM, 97 .slave_addr = NS2501_ADDR, 98 .dev_ops = &ns2501_ops, 99 } 100 }; 101 102 struct intel_dvo { 103 struct intel_encoder base; 104 105 struct intel_dvo_device dev; 106 107 struct intel_connector *attached_connector; 108 109 bool panel_wants_dither; 110 }; 111 112 static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder) 113 { 114 return container_of(encoder, struct intel_dvo, base); 115 } 116 117 static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector) 118 { 119 return enc_to_dvo(intel_attached_encoder(connector)); 120 } 121 122 static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector) 123 { 124 struct drm_device *dev = connector->base.dev; 125 struct drm_i915_private *dev_priv = to_i915(dev); 126 struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base); 127 u32 tmp; 128 129 tmp = I915_READ(intel_dvo->dev.dvo_reg); 130 131 if (!(tmp & DVO_ENABLE)) 132 return false; 133 134 return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev); 135 } 136 137 static bool intel_dvo_get_hw_state(struct intel_encoder *encoder, 138 enum i915_pipe *pipe) 139 { 140 struct drm_device *dev = encoder->base.dev; 141 struct drm_i915_private *dev_priv = to_i915(dev); 142 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 143 u32 tmp; 144 145 tmp = I915_READ(intel_dvo->dev.dvo_reg); 146 147 if (!(tmp & DVO_ENABLE)) 148 return false; 149 150 *pipe = PORT_TO_PIPE(tmp); 151 152 return true; 153 } 154 155 static void intel_dvo_get_config(struct intel_encoder *encoder, 156 struct intel_crtc_state *pipe_config) 157 { 158 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 159 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 160 u32 tmp, flags = 0; 161 162 tmp = I915_READ(intel_dvo->dev.dvo_reg); 163 if (tmp & DVO_HSYNC_ACTIVE_HIGH) 164 flags |= DRM_MODE_FLAG_PHSYNC; 165 else 166 flags |= DRM_MODE_FLAG_NHSYNC; 167 if (tmp & DVO_VSYNC_ACTIVE_HIGH) 168 flags |= DRM_MODE_FLAG_PVSYNC; 169 else 170 flags |= DRM_MODE_FLAG_NVSYNC; 171 172 pipe_config->base.adjusted_mode.flags |= flags; 173 174 pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock; 175 } 176 177 static void intel_disable_dvo(struct intel_encoder *encoder, 178 const struct intel_crtc_state *old_crtc_state, 179 const struct drm_connector_state *old_conn_state) 180 { 181 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 182 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 183 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg; 184 u32 temp = I915_READ(dvo_reg); 185 186 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false); 187 I915_WRITE(dvo_reg, temp & ~DVO_ENABLE); 188 I915_READ(dvo_reg); 189 } 190 191 static void intel_enable_dvo(struct intel_encoder *encoder, 192 const struct intel_crtc_state *pipe_config, 193 const struct drm_connector_state *conn_state) 194 { 195 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 196 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 197 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg; 198 u32 temp = I915_READ(dvo_reg); 199 200 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, 201 &pipe_config->base.mode, 202 &pipe_config->base.adjusted_mode); 203 204 I915_WRITE(dvo_reg, temp | DVO_ENABLE); 205 I915_READ(dvo_reg); 206 207 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true); 208 } 209 210 static enum drm_mode_status 211 intel_dvo_mode_valid(struct drm_connector *connector, 212 struct drm_display_mode *mode) 213 { 214 struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 215 const struct drm_display_mode *fixed_mode = 216 to_intel_connector(connector)->panel.fixed_mode; 217 int max_dotclk = to_i915(connector->dev)->max_dotclk_freq; 218 int target_clock = mode->clock; 219 220 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 221 return MODE_NO_DBLESCAN; 222 223 /* XXX: Validate clock range */ 224 225 if (fixed_mode) { 226 if (mode->hdisplay > fixed_mode->hdisplay) 227 return MODE_PANEL; 228 if (mode->vdisplay > fixed_mode->vdisplay) 229 return MODE_PANEL; 230 231 target_clock = fixed_mode->clock; 232 } 233 234 if (target_clock > max_dotclk) 235 return MODE_CLOCK_HIGH; 236 237 return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode); 238 } 239 240 static bool intel_dvo_compute_config(struct intel_encoder *encoder, 241 struct intel_crtc_state *pipe_config, 242 struct drm_connector_state *conn_state) 243 { 244 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 245 const struct drm_display_mode *fixed_mode = 246 intel_dvo->attached_connector->panel.fixed_mode; 247 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; 248 249 /* If we have timings from the BIOS for the panel, put them in 250 * to the adjusted mode. The CRTC will be set up for this mode, 251 * with the panel scaling set up to source from the H/VDisplay 252 * of the original mode. 253 */ 254 if (fixed_mode) 255 intel_fixed_panel_mode(fixed_mode, adjusted_mode); 256 257 return true; 258 } 259 260 static void intel_dvo_pre_enable(struct intel_encoder *encoder, 261 const struct intel_crtc_state *pipe_config, 262 const struct drm_connector_state *conn_state) 263 { 264 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 265 struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); 266 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; 267 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 268 int pipe = crtc->pipe; 269 u32 dvo_val; 270 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg; 271 i915_reg_t dvo_srcdim_reg = intel_dvo->dev.dvo_srcdim_reg; 272 273 /* Save the data order, since I don't know what it should be set to. */ 274 dvo_val = I915_READ(dvo_reg) & 275 (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG); 276 dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE | 277 DVO_BLANK_ACTIVE_HIGH; 278 279 if (pipe == 1) 280 dvo_val |= DVO_PIPE_B_SELECT; 281 dvo_val |= DVO_PIPE_STALL; 282 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) 283 dvo_val |= DVO_HSYNC_ACTIVE_HIGH; 284 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) 285 dvo_val |= DVO_VSYNC_ACTIVE_HIGH; 286 287 /*I915_WRITE(DVOB_SRCDIM, 288 (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) | 289 (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/ 290 I915_WRITE(dvo_srcdim_reg, 291 (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) | 292 (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT)); 293 /*I915_WRITE(DVOB, dvo_val);*/ 294 I915_WRITE(dvo_reg, dvo_val); 295 } 296 297 /** 298 * Detect the output connection on our DVO device. 299 * 300 * Unimplemented. 301 */ 302 static enum drm_connector_status 303 intel_dvo_detect(struct drm_connector *connector, bool force) 304 { 305 struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 306 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", 307 connector->base.id, connector->name); 308 return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev); 309 } 310 311 static int intel_dvo_get_modes(struct drm_connector *connector) 312 { 313 struct drm_i915_private *dev_priv = to_i915(connector->dev); 314 const struct drm_display_mode *fixed_mode = 315 to_intel_connector(connector)->panel.fixed_mode; 316 317 /* We should probably have an i2c driver get_modes function for those 318 * devices which will have a fixed set of modes determined by the chip 319 * (TV-out, for example), but for now with just TMDS and LVDS, 320 * that's not the case. 321 */ 322 intel_ddc_get_modes(connector, 323 intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPC)); 324 if (!list_empty(&connector->probed_modes)) 325 return 1; 326 327 if (fixed_mode) { 328 struct drm_display_mode *mode; 329 mode = drm_mode_duplicate(connector->dev, fixed_mode); 330 if (mode) { 331 drm_mode_probed_add(connector, mode); 332 return 1; 333 } 334 } 335 336 return 0; 337 } 338 339 static void intel_dvo_destroy(struct drm_connector *connector) 340 { 341 drm_connector_cleanup(connector); 342 intel_panel_fini(&to_intel_connector(connector)->panel); 343 kfree(connector); 344 } 345 346 static const struct drm_connector_funcs intel_dvo_connector_funcs = { 347 .detect = intel_dvo_detect, 348 .late_register = intel_connector_register, 349 .early_unregister = intel_connector_unregister, 350 .destroy = intel_dvo_destroy, 351 .fill_modes = drm_helper_probe_single_connector_modes, 352 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 353 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, 354 }; 355 356 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = { 357 .mode_valid = intel_dvo_mode_valid, 358 .get_modes = intel_dvo_get_modes, 359 }; 360 361 static void intel_dvo_enc_destroy(struct drm_encoder *encoder) 362 { 363 struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder)); 364 365 if (intel_dvo->dev.dev_ops->destroy) 366 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev); 367 368 intel_encoder_destroy(encoder); 369 } 370 371 static const struct drm_encoder_funcs intel_dvo_enc_funcs = { 372 .destroy = intel_dvo_enc_destroy, 373 }; 374 375 /** 376 * Attempts to get a fixed panel timing for LVDS (currently only the i830). 377 * 378 * Other chips with DVO LVDS will need to extend this to deal with the LVDS 379 * chip being on DVOB/C and having multiple pipes. 380 */ 381 static struct drm_display_mode * 382 intel_dvo_get_current_mode(struct intel_encoder *encoder) 383 { 384 struct drm_display_mode *mode; 385 386 mode = intel_encoder_current_mode(encoder); 387 if (mode) { 388 DRM_DEBUG_KMS("using current (BIOS) mode: "); 389 drm_mode_debug_printmodeline(mode); 390 mode->type |= DRM_MODE_TYPE_PREFERRED; 391 } 392 393 return mode; 394 } 395 396 static enum port intel_dvo_port(i915_reg_t dvo_reg) 397 { 398 if (i915_mmio_reg_equal(dvo_reg, DVOA)) 399 return PORT_A; 400 else if (i915_mmio_reg_equal(dvo_reg, DVOB)) 401 return PORT_B; 402 else 403 return PORT_C; 404 } 405 406 void intel_dvo_init(struct drm_i915_private *dev_priv) 407 { 408 struct intel_encoder *intel_encoder; 409 struct intel_dvo *intel_dvo; 410 struct intel_connector *intel_connector; 411 int i; 412 int encoder_type = DRM_MODE_ENCODER_NONE; 413 414 intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL); 415 if (!intel_dvo) 416 return; 417 418 intel_connector = intel_connector_alloc(); 419 if (!intel_connector) { 420 kfree(intel_dvo); 421 return; 422 } 423 424 intel_dvo->attached_connector = intel_connector; 425 426 intel_encoder = &intel_dvo->base; 427 428 intel_encoder->disable = intel_disable_dvo; 429 intel_encoder->enable = intel_enable_dvo; 430 intel_encoder->get_hw_state = intel_dvo_get_hw_state; 431 intel_encoder->get_config = intel_dvo_get_config; 432 intel_encoder->compute_config = intel_dvo_compute_config; 433 intel_encoder->pre_enable = intel_dvo_pre_enable; 434 intel_connector->get_hw_state = intel_dvo_connector_get_hw_state; 435 436 /* Now, try to find a controller */ 437 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) { 438 struct drm_connector *connector = &intel_connector->base; 439 const struct intel_dvo_device *dvo = &intel_dvo_devices[i]; 440 struct i2c_adapter *i2c; 441 int gpio; 442 bool dvoinit; 443 enum i915_pipe pipe; 444 uint32_t dpll[I915_MAX_PIPES]; 445 enum port port; 446 447 /* Allow the I2C driver info to specify the GPIO to be used in 448 * special cases, but otherwise default to what's defined 449 * in the spec. 450 */ 451 if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio)) 452 gpio = dvo->gpio; 453 else if (dvo->type == INTEL_DVO_CHIP_LVDS) 454 gpio = GMBUS_PIN_SSC; 455 else 456 gpio = GMBUS_PIN_DPB; 457 458 /* Set up the I2C bus necessary for the chip we're probing. 459 * It appears that everything is on GPIOE except for panels 460 * on i830 laptops, which are on GPIOB (DVOA). 461 */ 462 i2c = intel_gmbus_get_adapter(dev_priv, gpio); 463 464 intel_dvo->dev = *dvo; 465 466 /* GMBUS NAK handling seems to be unstable, hence let the 467 * transmitter detection run in bit banging mode for now. 468 */ 469 intel_gmbus_force_bit(i2c, true); 470 471 /* ns2501 requires the DVO 2x clock before it will 472 * respond to i2c accesses, so make sure we have 473 * have the clock enabled before we attempt to 474 * initialize the device. 475 */ 476 for_each_pipe(dev_priv, pipe) { 477 dpll[pipe] = I915_READ(DPLL(pipe)); 478 I915_WRITE(DPLL(pipe), dpll[pipe] | DPLL_DVO_2X_MODE); 479 } 480 481 dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c); 482 483 /* restore the DVO 2x clock state to original */ 484 for_each_pipe(dev_priv, pipe) { 485 I915_WRITE(DPLL(pipe), dpll[pipe]); 486 } 487 488 intel_gmbus_force_bit(i2c, false); 489 490 if (!dvoinit) 491 continue; 492 493 port = intel_dvo_port(dvo->dvo_reg); 494 drm_encoder_init(&dev_priv->drm, &intel_encoder->base, 495 &intel_dvo_enc_funcs, encoder_type, 496 "DVO %c", port_name(port)); 497 498 intel_encoder->type = INTEL_OUTPUT_DVO; 499 intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER; 500 intel_encoder->port = port; 501 intel_encoder->crtc_mask = (1 << 0) | (1 << 1); 502 503 switch (dvo->type) { 504 case INTEL_DVO_CHIP_TMDS: 505 intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) | 506 (1 << INTEL_OUTPUT_DVO); 507 drm_connector_init(&dev_priv->drm, connector, 508 &intel_dvo_connector_funcs, 509 DRM_MODE_CONNECTOR_DVII); 510 encoder_type = DRM_MODE_ENCODER_TMDS; 511 break; 512 case INTEL_DVO_CHIP_LVDS: 513 intel_encoder->cloneable = 0; 514 drm_connector_init(&dev_priv->drm, connector, 515 &intel_dvo_connector_funcs, 516 DRM_MODE_CONNECTOR_LVDS); 517 encoder_type = DRM_MODE_ENCODER_LVDS; 518 break; 519 } 520 521 drm_connector_helper_add(connector, 522 &intel_dvo_connector_helper_funcs); 523 connector->display_info.subpixel_order = SubPixelHorizontalRGB; 524 connector->interlace_allowed = false; 525 connector->doublescan_allowed = false; 526 527 intel_connector_attach_encoder(intel_connector, intel_encoder); 528 if (dvo->type == INTEL_DVO_CHIP_LVDS) { 529 /* For our LVDS chipsets, we should hopefully be able 530 * to dig the fixed panel mode out of the BIOS data. 531 * However, it's in a different format from the BIOS 532 * data on chipsets with integrated LVDS (stored in AIM 533 * headers, likely), so for now, just get the current 534 * mode being output through DVO. 535 */ 536 intel_panel_init(&intel_connector->panel, 537 intel_dvo_get_current_mode(intel_encoder), 538 NULL, NULL); 539 intel_dvo->panel_wants_dither = true; 540 } 541 542 return; 543 } 544 545 kfree(intel_dvo); 546 kfree(intel_connector); 547 } 548