1 /* 2 * Copyright 2006 Dave Airlie <airlied@linux.ie> 3 * Copyright © 2006-2007 Intel Corporation 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: 25 * Eric Anholt <eric@anholt.net> 26 */ 27 #include <linux/i2c.h> 28 #include <drm/drmP.h> 29 #include <drm/drm_atomic_helper.h> 30 #include <drm/drm_crtc.h> 31 #include "intel_drv.h" 32 #include <drm/i915_drm.h> 33 #include "i915_drv.h" 34 #include "dvo.h" 35 36 #define SIL164_ADDR 0x38 37 #define CH7xxx_ADDR 0x76 38 #define TFP410_ADDR 0x38 39 #define NS2501_ADDR 0x38 40 41 static const struct intel_dvo_device intel_dvo_devices[] = { 42 { 43 .type = INTEL_DVO_CHIP_TMDS, 44 .name = "sil164", 45 .dvo_reg = DVOC, 46 .slave_addr = SIL164_ADDR, 47 .dev_ops = &sil164_ops, 48 }, 49 { 50 .type = INTEL_DVO_CHIP_TMDS, 51 .name = "ch7xxx", 52 .dvo_reg = DVOC, 53 .slave_addr = CH7xxx_ADDR, 54 .dev_ops = &ch7xxx_ops, 55 }, 56 { 57 .type = INTEL_DVO_CHIP_TMDS, 58 .name = "ch7xxx", 59 .dvo_reg = DVOC, 60 .slave_addr = 0x75, /* For some ch7010 */ 61 .dev_ops = &ch7xxx_ops, 62 }, 63 { 64 .type = INTEL_DVO_CHIP_LVDS, 65 .name = "ivch", 66 .dvo_reg = DVOA, 67 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */ 68 .dev_ops = &ivch_ops, 69 }, 70 { 71 .type = INTEL_DVO_CHIP_TMDS, 72 .name = "tfp410", 73 .dvo_reg = DVOC, 74 .slave_addr = TFP410_ADDR, 75 .dev_ops = &tfp410_ops, 76 }, 77 { 78 .type = INTEL_DVO_CHIP_LVDS, 79 .name = "ch7017", 80 .dvo_reg = DVOC, 81 .slave_addr = 0x75, 82 .gpio = GMBUS_PIN_DPB, 83 .dev_ops = &ch7017_ops, 84 }, 85 { 86 .type = INTEL_DVO_CHIP_TMDS, 87 .name = "ns2501", 88 .dvo_reg = DVOB, 89 .slave_addr = NS2501_ADDR, 90 .dev_ops = &ns2501_ops, 91 } 92 }; 93 94 struct intel_dvo { 95 struct intel_encoder base; 96 97 struct intel_dvo_device dev; 98 99 struct drm_display_mode *panel_fixed_mode; 100 bool panel_wants_dither; 101 }; 102 103 static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder) 104 { 105 return container_of(encoder, struct intel_dvo, base); 106 } 107 108 static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector) 109 { 110 return enc_to_dvo(intel_attached_encoder(connector)); 111 } 112 113 static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector) 114 { 115 struct drm_device *dev = connector->base.dev; 116 struct drm_i915_private *dev_priv = dev->dev_private; 117 struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base); 118 u32 tmp; 119 120 tmp = I915_READ(intel_dvo->dev.dvo_reg); 121 122 if (!(tmp & DVO_ENABLE)) 123 return false; 124 125 return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev); 126 } 127 128 static bool intel_dvo_get_hw_state(struct intel_encoder *encoder, 129 enum i915_pipe *pipe) 130 { 131 struct drm_device *dev = encoder->base.dev; 132 struct drm_i915_private *dev_priv = dev->dev_private; 133 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 134 u32 tmp; 135 136 tmp = I915_READ(intel_dvo->dev.dvo_reg); 137 138 if (!(tmp & DVO_ENABLE)) 139 return false; 140 141 *pipe = PORT_TO_PIPE(tmp); 142 143 return true; 144 } 145 146 static void intel_dvo_get_config(struct intel_encoder *encoder, 147 struct intel_crtc_state *pipe_config) 148 { 149 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; 150 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 151 u32 tmp, flags = 0; 152 153 tmp = I915_READ(intel_dvo->dev.dvo_reg); 154 if (tmp & DVO_HSYNC_ACTIVE_HIGH) 155 flags |= DRM_MODE_FLAG_PHSYNC; 156 else 157 flags |= DRM_MODE_FLAG_NHSYNC; 158 if (tmp & DVO_VSYNC_ACTIVE_HIGH) 159 flags |= DRM_MODE_FLAG_PVSYNC; 160 else 161 flags |= DRM_MODE_FLAG_NVSYNC; 162 163 pipe_config->base.adjusted_mode.flags |= flags; 164 165 pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock; 166 } 167 168 static void intel_disable_dvo(struct intel_encoder *encoder) 169 { 170 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; 171 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 172 u32 dvo_reg = intel_dvo->dev.dvo_reg; 173 u32 temp = I915_READ(dvo_reg); 174 175 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false); 176 I915_WRITE(dvo_reg, temp & ~DVO_ENABLE); 177 I915_READ(dvo_reg); 178 } 179 180 static void intel_enable_dvo(struct intel_encoder *encoder) 181 { 182 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; 183 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 184 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); 185 u32 dvo_reg = intel_dvo->dev.dvo_reg; 186 u32 temp = I915_READ(dvo_reg); 187 188 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, 189 &crtc->config->base.mode, 190 &crtc->config->base.adjusted_mode); 191 192 I915_WRITE(dvo_reg, temp | DVO_ENABLE); 193 I915_READ(dvo_reg); 194 195 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true); 196 } 197 198 static enum drm_mode_status 199 intel_dvo_mode_valid(struct drm_connector *connector, 200 struct drm_display_mode *mode) 201 { 202 struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 203 204 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 205 return MODE_NO_DBLESCAN; 206 207 /* XXX: Validate clock range */ 208 209 if (intel_dvo->panel_fixed_mode) { 210 if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay) 211 return MODE_PANEL; 212 if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay) 213 return MODE_PANEL; 214 } 215 216 return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode); 217 } 218 219 static bool intel_dvo_compute_config(struct intel_encoder *encoder, 220 struct intel_crtc_state *pipe_config) 221 { 222 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 223 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; 224 225 /* If we have timings from the BIOS for the panel, put them in 226 * to the adjusted mode. The CRTC will be set up for this mode, 227 * with the panel scaling set up to source from the H/VDisplay 228 * of the original mode. 229 */ 230 if (intel_dvo->panel_fixed_mode != NULL) { 231 #define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x 232 C(hdisplay); 233 C(hsync_start); 234 C(hsync_end); 235 C(htotal); 236 C(vdisplay); 237 C(vsync_start); 238 C(vsync_end); 239 C(vtotal); 240 C(clock); 241 #undef C 242 243 drm_mode_set_crtcinfo(adjusted_mode, 0); 244 } 245 246 return true; 247 } 248 249 static void intel_dvo_pre_enable(struct intel_encoder *encoder) 250 { 251 struct drm_device *dev = encoder->base.dev; 252 struct drm_i915_private *dev_priv = dev->dev_private; 253 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); 254 struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode; 255 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 256 int pipe = crtc->pipe; 257 u32 dvo_val; 258 u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg; 259 260 switch (dvo_reg) { 261 case DVOA: 262 default: 263 dvo_srcdim_reg = DVOA_SRCDIM; 264 break; 265 case DVOB: 266 dvo_srcdim_reg = DVOB_SRCDIM; 267 break; 268 case DVOC: 269 dvo_srcdim_reg = DVOC_SRCDIM; 270 break; 271 } 272 273 /* Save the data order, since I don't know what it should be set to. */ 274 dvo_val = I915_READ(dvo_reg) & 275 (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG); 276 dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE | 277 DVO_BLANK_ACTIVE_HIGH; 278 279 if (pipe == 1) 280 dvo_val |= DVO_PIPE_B_SELECT; 281 dvo_val |= DVO_PIPE_STALL; 282 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) 283 dvo_val |= DVO_HSYNC_ACTIVE_HIGH; 284 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) 285 dvo_val |= DVO_VSYNC_ACTIVE_HIGH; 286 287 /*I915_WRITE(DVOB_SRCDIM, 288 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) | 289 (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/ 290 I915_WRITE(dvo_srcdim_reg, 291 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) | 292 (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT)); 293 /*I915_WRITE(DVOB, dvo_val);*/ 294 I915_WRITE(dvo_reg, dvo_val); 295 } 296 297 /** 298 * Detect the output connection on our DVO device. 299 * 300 * Unimplemented. 301 */ 302 static enum drm_connector_status 303 intel_dvo_detect(struct drm_connector *connector, bool force) 304 { 305 struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 306 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", 307 connector->base.id, connector->name); 308 return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev); 309 } 310 311 static int intel_dvo_get_modes(struct drm_connector *connector) 312 { 313 struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 314 struct drm_i915_private *dev_priv = connector->dev->dev_private; 315 316 /* We should probably have an i2c driver get_modes function for those 317 * devices which will have a fixed set of modes determined by the chip 318 * (TV-out, for example), but for now with just TMDS and LVDS, 319 * that's not the case. 320 */ 321 intel_ddc_get_modes(connector, 322 intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPC)); 323 if (!list_empty(&connector->probed_modes)) 324 return 1; 325 326 if (intel_dvo->panel_fixed_mode != NULL) { 327 struct drm_display_mode *mode; 328 mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode); 329 if (mode) { 330 drm_mode_probed_add(connector, mode); 331 return 1; 332 } 333 } 334 335 return 0; 336 } 337 338 static void intel_dvo_destroy(struct drm_connector *connector) 339 { 340 drm_connector_cleanup(connector); 341 kfree(connector); 342 } 343 344 static const struct drm_connector_funcs intel_dvo_connector_funcs = { 345 .dpms = drm_atomic_helper_connector_dpms, 346 .detect = intel_dvo_detect, 347 .destroy = intel_dvo_destroy, 348 .fill_modes = drm_helper_probe_single_connector_modes, 349 .atomic_get_property = intel_connector_atomic_get_property, 350 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 351 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, 352 }; 353 354 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = { 355 .mode_valid = intel_dvo_mode_valid, 356 .get_modes = intel_dvo_get_modes, 357 .best_encoder = intel_best_encoder, 358 }; 359 360 static void intel_dvo_enc_destroy(struct drm_encoder *encoder) 361 { 362 struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder)); 363 364 if (intel_dvo->dev.dev_ops->destroy) 365 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev); 366 367 kfree(intel_dvo->panel_fixed_mode); 368 369 intel_encoder_destroy(encoder); 370 } 371 372 static const struct drm_encoder_funcs intel_dvo_enc_funcs = { 373 .destroy = intel_dvo_enc_destroy, 374 }; 375 376 /** 377 * Attempts to get a fixed panel timing for LVDS (currently only the i830). 378 * 379 * Other chips with DVO LVDS will need to extend this to deal with the LVDS 380 * chip being on DVOB/C and having multiple pipes. 381 */ 382 static struct drm_display_mode * 383 intel_dvo_get_current_mode(struct drm_connector *connector) 384 { 385 struct drm_device *dev = connector->dev; 386 struct drm_i915_private *dev_priv = dev->dev_private; 387 struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 388 uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg); 389 struct drm_display_mode *mode = NULL; 390 391 /* If the DVO port is active, that'll be the LVDS, so we can pull out 392 * its timings to get how the BIOS set up the panel. 393 */ 394 if (dvo_val & DVO_ENABLE) { 395 struct drm_crtc *crtc; 396 int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0; 397 398 crtc = intel_get_crtc_for_pipe(dev, pipe); 399 if (crtc) { 400 mode = intel_crtc_mode_get(dev, crtc); 401 if (mode) { 402 mode->type |= DRM_MODE_TYPE_PREFERRED; 403 if (dvo_val & DVO_HSYNC_ACTIVE_HIGH) 404 mode->flags |= DRM_MODE_FLAG_PHSYNC; 405 if (dvo_val & DVO_VSYNC_ACTIVE_HIGH) 406 mode->flags |= DRM_MODE_FLAG_PVSYNC; 407 } 408 } 409 } 410 411 return mode; 412 } 413 414 void intel_dvo_init(struct drm_device *dev) 415 { 416 struct drm_i915_private *dev_priv = dev->dev_private; 417 struct intel_encoder *intel_encoder; 418 struct intel_dvo *intel_dvo; 419 struct intel_connector *intel_connector; 420 int i; 421 int encoder_type = DRM_MODE_ENCODER_NONE; 422 423 intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL); 424 if (!intel_dvo) 425 return; 426 427 intel_connector = intel_connector_alloc(); 428 if (!intel_connector) { 429 kfree(intel_dvo); 430 return; 431 } 432 433 intel_encoder = &intel_dvo->base; 434 drm_encoder_init(dev, &intel_encoder->base, 435 &intel_dvo_enc_funcs, encoder_type); 436 437 intel_encoder->disable = intel_disable_dvo; 438 intel_encoder->enable = intel_enable_dvo; 439 intel_encoder->get_hw_state = intel_dvo_get_hw_state; 440 intel_encoder->get_config = intel_dvo_get_config; 441 intel_encoder->compute_config = intel_dvo_compute_config; 442 intel_encoder->pre_enable = intel_dvo_pre_enable; 443 intel_connector->get_hw_state = intel_dvo_connector_get_hw_state; 444 intel_connector->unregister = intel_connector_unregister; 445 446 /* Now, try to find a controller */ 447 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) { 448 struct drm_connector *connector = &intel_connector->base; 449 const struct intel_dvo_device *dvo = &intel_dvo_devices[i]; 450 struct device *i2c; 451 int gpio; 452 bool dvoinit; 453 enum i915_pipe pipe; 454 uint32_t dpll[I915_MAX_PIPES]; 455 456 /* Allow the I2C driver info to specify the GPIO to be used in 457 * special cases, but otherwise default to what's defined 458 * in the spec. 459 */ 460 if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio)) 461 gpio = dvo->gpio; 462 else if (dvo->type == INTEL_DVO_CHIP_LVDS) 463 gpio = GMBUS_PIN_SSC; 464 else 465 gpio = GMBUS_PIN_DPB; 466 467 /* Set up the I2C bus necessary for the chip we're probing. 468 * It appears that everything is on GPIOE except for panels 469 * on i830 laptops, which are on GPIOB (DVOA). 470 */ 471 i2c = intel_gmbus_get_adapter(dev_priv, gpio); 472 473 intel_dvo->dev = *dvo; 474 475 /* GMBUS NAK handling seems to be unstable, hence let the 476 * transmitter detection run in bit banging mode for now. 477 */ 478 intel_gmbus_force_bit(i2c, true); 479 480 /* ns2501 requires the DVO 2x clock before it will 481 * respond to i2c accesses, so make sure we have 482 * have the clock enabled before we attempt to 483 * initialize the device. 484 */ 485 for_each_pipe(dev_priv, pipe) { 486 dpll[pipe] = I915_READ(DPLL(pipe)); 487 I915_WRITE(DPLL(pipe), dpll[pipe] | DPLL_DVO_2X_MODE); 488 } 489 490 dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c); 491 492 /* restore the DVO 2x clock state to original */ 493 for_each_pipe(dev_priv, pipe) { 494 I915_WRITE(DPLL(pipe), dpll[pipe]); 495 } 496 497 intel_gmbus_force_bit(i2c, false); 498 499 if (!dvoinit) 500 continue; 501 502 intel_encoder->type = INTEL_OUTPUT_DVO; 503 intel_encoder->crtc_mask = (1 << 0) | (1 << 1); 504 switch (dvo->type) { 505 case INTEL_DVO_CHIP_TMDS: 506 intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) | 507 (1 << INTEL_OUTPUT_DVO); 508 drm_connector_init(dev, connector, 509 &intel_dvo_connector_funcs, 510 DRM_MODE_CONNECTOR_DVII); 511 encoder_type = DRM_MODE_ENCODER_TMDS; 512 break; 513 case INTEL_DVO_CHIP_LVDS: 514 intel_encoder->cloneable = 0; 515 drm_connector_init(dev, connector, 516 &intel_dvo_connector_funcs, 517 DRM_MODE_CONNECTOR_LVDS); 518 encoder_type = DRM_MODE_ENCODER_LVDS; 519 break; 520 } 521 522 drm_connector_helper_add(connector, 523 &intel_dvo_connector_helper_funcs); 524 connector->display_info.subpixel_order = SubPixelHorizontalRGB; 525 connector->interlace_allowed = false; 526 connector->doublescan_allowed = false; 527 528 intel_connector_attach_encoder(intel_connector, intel_encoder); 529 if (dvo->type == INTEL_DVO_CHIP_LVDS) { 530 /* For our LVDS chipsets, we should hopefully be able 531 * to dig the fixed panel mode out of the BIOS data. 532 * However, it's in a different format from the BIOS 533 * data on chipsets with integrated LVDS (stored in AIM 534 * headers, likely), so for now, just get the current 535 * mode being output through DVO. 536 */ 537 intel_dvo->panel_fixed_mode = 538 intel_dvo_get_current_mode(connector); 539 intel_dvo->panel_wants_dither = true; 540 } 541 542 drm_connector_register(connector); 543 return; 544 } 545 546 drm_encoder_cleanup(&intel_encoder->base); 547 kfree(intel_dvo); 548 kfree(intel_connector); 549 } 550