1 /* 2 * Copyright 2006 Dave Airlie <airlied@linux.ie> 3 * Copyright © 2006-2007 Intel Corporation 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: 25 * Eric Anholt <eric@anholt.net> 26 */ 27 #include <linux/i2c.h> 28 #include <drm/drmP.h> 29 #include <drm/drm_crtc.h> 30 #include "intel_drv.h" 31 #include <drm/i915_drm.h> 32 #include "i915_drv.h" 33 #include "dvo.h" 34 35 #define SIL164_ADDR 0x38 36 #define CH7xxx_ADDR 0x76 37 #define TFP410_ADDR 0x38 38 #define NS2501_ADDR 0x38 39 40 static const struct intel_dvo_device intel_dvo_devices[] = { 41 { 42 .type = INTEL_DVO_CHIP_TMDS, 43 .name = "sil164", 44 .dvo_reg = DVOC, 45 .slave_addr = SIL164_ADDR, 46 .dev_ops = &sil164_ops, 47 }, 48 { 49 .type = INTEL_DVO_CHIP_TMDS, 50 .name = "ch7xxx", 51 .dvo_reg = DVOC, 52 .slave_addr = CH7xxx_ADDR, 53 .dev_ops = &ch7xxx_ops, 54 }, 55 { 56 .type = INTEL_DVO_CHIP_TMDS, 57 .name = "ch7xxx", 58 .dvo_reg = DVOC, 59 .slave_addr = 0x75, /* For some ch7010 */ 60 .dev_ops = &ch7xxx_ops, 61 }, 62 { 63 .type = INTEL_DVO_CHIP_LVDS, 64 .name = "ivch", 65 .dvo_reg = DVOA, 66 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */ 67 .dev_ops = &ivch_ops, 68 }, 69 { 70 .type = INTEL_DVO_CHIP_TMDS, 71 .name = "tfp410", 72 .dvo_reg = DVOC, 73 .slave_addr = TFP410_ADDR, 74 .dev_ops = &tfp410_ops, 75 }, 76 { 77 .type = INTEL_DVO_CHIP_LVDS, 78 .name = "ch7017", 79 .dvo_reg = DVOC, 80 .slave_addr = 0x75, 81 .gpio = GMBUS_PORT_DPB, 82 .dev_ops = &ch7017_ops, 83 }, 84 { 85 .type = INTEL_DVO_CHIP_TMDS, 86 .name = "ns2501", 87 .dvo_reg = DVOC, 88 .slave_addr = NS2501_ADDR, 89 .dev_ops = &ns2501_ops, 90 } 91 }; 92 93 struct intel_dvo { 94 struct intel_encoder base; 95 96 struct intel_dvo_device dev; 97 98 struct drm_display_mode *panel_fixed_mode; 99 bool panel_wants_dither; 100 }; 101 102 static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder) 103 { 104 return container_of(encoder, struct intel_dvo, base); 105 } 106 107 static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector) 108 { 109 return enc_to_dvo(intel_attached_encoder(connector)); 110 } 111 112 static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector) 113 { 114 struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base); 115 116 return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev); 117 } 118 119 static bool intel_dvo_get_hw_state(struct intel_encoder *encoder, 120 enum i915_pipe *pipe) 121 { 122 struct drm_device *dev = encoder->base.dev; 123 struct drm_i915_private *dev_priv = dev->dev_private; 124 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 125 u32 tmp; 126 127 tmp = I915_READ(intel_dvo->dev.dvo_reg); 128 129 if (!(tmp & DVO_ENABLE)) 130 return false; 131 132 *pipe = PORT_TO_PIPE(tmp); 133 134 return true; 135 } 136 137 static void intel_dvo_get_config(struct intel_encoder *encoder, 138 struct intel_crtc_config *pipe_config) 139 { 140 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; 141 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 142 u32 tmp, flags = 0; 143 144 tmp = I915_READ(intel_dvo->dev.dvo_reg); 145 if (tmp & DVO_HSYNC_ACTIVE_HIGH) 146 flags |= DRM_MODE_FLAG_PHSYNC; 147 else 148 flags |= DRM_MODE_FLAG_NHSYNC; 149 if (tmp & DVO_VSYNC_ACTIVE_HIGH) 150 flags |= DRM_MODE_FLAG_PVSYNC; 151 else 152 flags |= DRM_MODE_FLAG_NVSYNC; 153 154 pipe_config->adjusted_mode.flags |= flags; 155 156 pipe_config->adjusted_mode.crtc_clock = pipe_config->port_clock; 157 } 158 159 static void intel_disable_dvo(struct intel_encoder *encoder) 160 { 161 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; 162 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 163 u32 dvo_reg = intel_dvo->dev.dvo_reg; 164 u32 temp = I915_READ(dvo_reg); 165 166 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false); 167 I915_WRITE(dvo_reg, temp & ~DVO_ENABLE); 168 I915_READ(dvo_reg); 169 } 170 171 static void intel_enable_dvo(struct intel_encoder *encoder) 172 { 173 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; 174 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 175 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); 176 u32 dvo_reg = intel_dvo->dev.dvo_reg; 177 u32 temp = I915_READ(dvo_reg); 178 179 I915_WRITE(dvo_reg, temp | DVO_ENABLE); 180 I915_READ(dvo_reg); 181 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, 182 &crtc->config.requested_mode, 183 &crtc->config.adjusted_mode); 184 185 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true); 186 } 187 188 /* Special dpms function to support cloning between dvo/sdvo/crt. */ 189 static void intel_dvo_dpms(struct drm_connector *connector, int mode) 190 { 191 struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 192 struct drm_crtc *crtc; 193 struct intel_crtc_config *config; 194 195 /* dvo supports only 2 dpms states. */ 196 if (mode != DRM_MODE_DPMS_ON) 197 mode = DRM_MODE_DPMS_OFF; 198 199 if (mode == connector->dpms) 200 return; 201 202 connector->dpms = mode; 203 204 /* Only need to change hw state when actually enabled */ 205 crtc = intel_dvo->base.base.crtc; 206 if (!crtc) { 207 intel_dvo->base.connectors_active = false; 208 return; 209 } 210 211 /* We call connector dpms manually below in case pipe dpms doesn't 212 * change due to cloning. */ 213 if (mode == DRM_MODE_DPMS_ON) { 214 config = &to_intel_crtc(crtc)->config; 215 216 intel_dvo->base.connectors_active = true; 217 218 intel_crtc_update_dpms(crtc); 219 220 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, 221 &config->requested_mode, 222 &config->adjusted_mode); 223 224 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true); 225 } else { 226 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false); 227 228 intel_dvo->base.connectors_active = false; 229 230 intel_crtc_update_dpms(crtc); 231 } 232 233 intel_modeset_check_state(connector->dev); 234 } 235 236 static enum drm_mode_status 237 intel_dvo_mode_valid(struct drm_connector *connector, 238 struct drm_display_mode *mode) 239 { 240 struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 241 242 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 243 return MODE_NO_DBLESCAN; 244 245 /* XXX: Validate clock range */ 246 247 if (intel_dvo->panel_fixed_mode) { 248 if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay) 249 return MODE_PANEL; 250 if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay) 251 return MODE_PANEL; 252 } 253 254 return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode); 255 } 256 257 static bool intel_dvo_compute_config(struct intel_encoder *encoder, 258 struct intel_crtc_config *pipe_config) 259 { 260 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 261 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode; 262 263 /* If we have timings from the BIOS for the panel, put them in 264 * to the adjusted mode. The CRTC will be set up for this mode, 265 * with the panel scaling set up to source from the H/VDisplay 266 * of the original mode. 267 */ 268 if (intel_dvo->panel_fixed_mode != NULL) { 269 #define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x 270 C(hdisplay); 271 C(hsync_start); 272 C(hsync_end); 273 C(htotal); 274 C(vdisplay); 275 C(vsync_start); 276 C(vsync_end); 277 C(vtotal); 278 C(clock); 279 #undef C 280 281 drm_mode_set_crtcinfo(adjusted_mode, 0); 282 } 283 284 return true; 285 } 286 287 static void intel_dvo_pre_enable(struct intel_encoder *encoder) 288 { 289 struct drm_device *dev = encoder->base.dev; 290 struct drm_i915_private *dev_priv = dev->dev_private; 291 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); 292 struct drm_display_mode *adjusted_mode = &crtc->config.adjusted_mode; 293 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 294 int pipe = crtc->pipe; 295 u32 dvo_val; 296 u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg; 297 298 switch (dvo_reg) { 299 case DVOA: 300 default: 301 dvo_srcdim_reg = DVOA_SRCDIM; 302 break; 303 case DVOB: 304 dvo_srcdim_reg = DVOB_SRCDIM; 305 break; 306 case DVOC: 307 dvo_srcdim_reg = DVOC_SRCDIM; 308 break; 309 } 310 311 /* Save the data order, since I don't know what it should be set to. */ 312 dvo_val = I915_READ(dvo_reg) & 313 (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG); 314 dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE | 315 DVO_BLANK_ACTIVE_HIGH; 316 317 if (pipe == 1) 318 dvo_val |= DVO_PIPE_B_SELECT; 319 dvo_val |= DVO_PIPE_STALL; 320 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) 321 dvo_val |= DVO_HSYNC_ACTIVE_HIGH; 322 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) 323 dvo_val |= DVO_VSYNC_ACTIVE_HIGH; 324 325 /*I915_WRITE(DVOB_SRCDIM, 326 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) | 327 (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/ 328 I915_WRITE(dvo_srcdim_reg, 329 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) | 330 (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT)); 331 /*I915_WRITE(DVOB, dvo_val);*/ 332 I915_WRITE(dvo_reg, dvo_val); 333 } 334 335 /** 336 * Detect the output connection on our DVO device. 337 * 338 * Unimplemented. 339 */ 340 static enum drm_connector_status 341 intel_dvo_detect(struct drm_connector *connector, bool force) 342 { 343 struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 344 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", 345 connector->base.id, connector->name); 346 return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev); 347 } 348 349 static int intel_dvo_get_modes(struct drm_connector *connector) 350 { 351 struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 352 struct drm_i915_private *dev_priv = connector->dev->dev_private; 353 354 /* We should probably have an i2c driver get_modes function for those 355 * devices which will have a fixed set of modes determined by the chip 356 * (TV-out, for example), but for now with just TMDS and LVDS, 357 * that's not the case. 358 */ 359 intel_ddc_get_modes(connector, 360 intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPC)); 361 if (!list_empty(&connector->probed_modes)) 362 return 1; 363 364 if (intel_dvo->panel_fixed_mode != NULL) { 365 struct drm_display_mode *mode; 366 mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode); 367 if (mode) { 368 drm_mode_probed_add(connector, mode); 369 return 1; 370 } 371 } 372 373 return 0; 374 } 375 376 static void intel_dvo_destroy(struct drm_connector *connector) 377 { 378 drm_connector_cleanup(connector); 379 kfree(connector); 380 } 381 382 static const struct drm_connector_funcs intel_dvo_connector_funcs = { 383 .dpms = intel_dvo_dpms, 384 .detect = intel_dvo_detect, 385 .destroy = intel_dvo_destroy, 386 .fill_modes = drm_helper_probe_single_connector_modes, 387 }; 388 389 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = { 390 .mode_valid = intel_dvo_mode_valid, 391 .get_modes = intel_dvo_get_modes, 392 .best_encoder = intel_best_encoder, 393 }; 394 395 static void intel_dvo_enc_destroy(struct drm_encoder *encoder) 396 { 397 struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder)); 398 399 if (intel_dvo->dev.dev_ops->destroy) 400 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev); 401 402 kfree(intel_dvo->panel_fixed_mode); 403 404 intel_encoder_destroy(encoder); 405 } 406 407 static const struct drm_encoder_funcs intel_dvo_enc_funcs = { 408 .destroy = intel_dvo_enc_destroy, 409 }; 410 411 /** 412 * Attempts to get a fixed panel timing for LVDS (currently only the i830). 413 * 414 * Other chips with DVO LVDS will need to extend this to deal with the LVDS 415 * chip being on DVOB/C and having multiple pipes. 416 */ 417 static struct drm_display_mode * 418 intel_dvo_get_current_mode(struct drm_connector *connector) 419 { 420 struct drm_device *dev = connector->dev; 421 struct drm_i915_private *dev_priv = dev->dev_private; 422 struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 423 uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg); 424 struct drm_display_mode *mode = NULL; 425 426 /* If the DVO port is active, that'll be the LVDS, so we can pull out 427 * its timings to get how the BIOS set up the panel. 428 */ 429 if (dvo_val & DVO_ENABLE) { 430 struct drm_crtc *crtc; 431 int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0; 432 433 crtc = intel_get_crtc_for_pipe(dev, pipe); 434 if (crtc) { 435 mode = intel_crtc_mode_get(dev, crtc); 436 if (mode) { 437 mode->type |= DRM_MODE_TYPE_PREFERRED; 438 if (dvo_val & DVO_HSYNC_ACTIVE_HIGH) 439 mode->flags |= DRM_MODE_FLAG_PHSYNC; 440 if (dvo_val & DVO_VSYNC_ACTIVE_HIGH) 441 mode->flags |= DRM_MODE_FLAG_PVSYNC; 442 } 443 } 444 } 445 446 return mode; 447 } 448 449 void intel_dvo_init(struct drm_device *dev) 450 { 451 struct drm_i915_private *dev_priv = dev->dev_private; 452 struct intel_encoder *intel_encoder; 453 struct intel_dvo *intel_dvo; 454 struct intel_connector *intel_connector; 455 int i; 456 int encoder_type = DRM_MODE_ENCODER_NONE; 457 458 intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL); 459 if (!intel_dvo) 460 return; 461 462 intel_connector = kzalloc(sizeof(*intel_connector), GFP_KERNEL); 463 if (!intel_connector) { 464 kfree(intel_dvo); 465 return; 466 } 467 468 intel_encoder = &intel_dvo->base; 469 drm_encoder_init(dev, &intel_encoder->base, 470 &intel_dvo_enc_funcs, encoder_type); 471 472 intel_encoder->disable = intel_disable_dvo; 473 intel_encoder->enable = intel_enable_dvo; 474 intel_encoder->get_hw_state = intel_dvo_get_hw_state; 475 intel_encoder->get_config = intel_dvo_get_config; 476 intel_encoder->compute_config = intel_dvo_compute_config; 477 intel_encoder->pre_enable = intel_dvo_pre_enable; 478 intel_connector->get_hw_state = intel_dvo_connector_get_hw_state; 479 intel_connector->unregister = intel_connector_unregister; 480 481 /* Now, try to find a controller */ 482 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) { 483 struct drm_connector *connector = &intel_connector->base; 484 const struct intel_dvo_device *dvo = &intel_dvo_devices[i]; 485 struct device *i2c; 486 int gpio; 487 bool dvoinit; 488 489 /* Allow the I2C driver info to specify the GPIO to be used in 490 * special cases, but otherwise default to what's defined 491 * in the spec. 492 */ 493 if (intel_gmbus_is_port_valid(dvo->gpio)) 494 gpio = dvo->gpio; 495 else if (dvo->type == INTEL_DVO_CHIP_LVDS) 496 gpio = GMBUS_PORT_SSC; 497 else 498 gpio = GMBUS_PORT_DPB; 499 500 /* Set up the I2C bus necessary for the chip we're probing. 501 * It appears that everything is on GPIOE except for panels 502 * on i830 laptops, which are on GPIOB (DVOA). 503 */ 504 i2c = intel_gmbus_get_adapter(dev_priv, gpio); 505 506 intel_dvo->dev = *dvo; 507 508 /* GMBUS NAK handling seems to be unstable, hence let the 509 * transmitter detection run in bit banging mode for now. 510 */ 511 intel_gmbus_force_bit(i2c, true); 512 513 dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c); 514 515 intel_gmbus_force_bit(i2c, false); 516 517 if (!dvoinit) 518 continue; 519 520 intel_encoder->type = INTEL_OUTPUT_DVO; 521 intel_encoder->crtc_mask = (1 << 0) | (1 << 1); 522 switch (dvo->type) { 523 case INTEL_DVO_CHIP_TMDS: 524 intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) | 525 (1 << INTEL_OUTPUT_DVO); 526 drm_connector_init(dev, connector, 527 &intel_dvo_connector_funcs, 528 DRM_MODE_CONNECTOR_DVII); 529 encoder_type = DRM_MODE_ENCODER_TMDS; 530 break; 531 case INTEL_DVO_CHIP_LVDS: 532 intel_encoder->cloneable = 0; 533 drm_connector_init(dev, connector, 534 &intel_dvo_connector_funcs, 535 DRM_MODE_CONNECTOR_LVDS); 536 encoder_type = DRM_MODE_ENCODER_LVDS; 537 break; 538 } 539 540 drm_connector_helper_add(connector, 541 &intel_dvo_connector_helper_funcs); 542 connector->display_info.subpixel_order = SubPixelHorizontalRGB; 543 connector->interlace_allowed = false; 544 connector->doublescan_allowed = false; 545 546 intel_connector_attach_encoder(intel_connector, intel_encoder); 547 if (dvo->type == INTEL_DVO_CHIP_LVDS) { 548 /* For our LVDS chipsets, we should hopefully be able 549 * to dig the fixed panel mode out of the BIOS data. 550 * However, it's in a different format from the BIOS 551 * data on chipsets with integrated LVDS (stored in AIM 552 * headers, likely), so for now, just get the current 553 * mode being output through DVO. 554 */ 555 intel_dvo->panel_fixed_mode = 556 intel_dvo_get_current_mode(connector); 557 intel_dvo->panel_wants_dither = true; 558 } 559 560 drm_sysfs_connector_add(connector); 561 return; 562 } 563 564 drm_encoder_cleanup(&intel_encoder->base); 565 kfree(intel_dvo); 566 kfree(intel_connector); 567 } 568