1 /* 2 * Copyright 2006 Dave Airlie <airlied@linux.ie> 3 * Copyright © 2006-2007 Intel Corporation 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: 25 * Eric Anholt <eric@anholt.net> 26 */ 27 #include <linux/i2c.h> 28 #include <drm/drmP.h> 29 #include <drm/drm_crtc.h> 30 #include "intel_drv.h" 31 #include <drm/i915_drm.h> 32 #include "i915_drv.h" 33 #include "dvo.h" 34 35 #define SIL164_ADDR 0x38 36 #define CH7xxx_ADDR 0x76 37 #define TFP410_ADDR 0x38 38 #define NS2501_ADDR 0x38 39 40 static const struct intel_dvo_device intel_dvo_devices[] = { 41 { 42 .type = INTEL_DVO_CHIP_TMDS, 43 .name = "sil164", 44 .dvo_reg = DVOC, 45 .slave_addr = SIL164_ADDR, 46 .dev_ops = &sil164_ops, 47 }, 48 { 49 .type = INTEL_DVO_CHIP_TMDS, 50 .name = "ch7xxx", 51 .dvo_reg = DVOC, 52 .slave_addr = CH7xxx_ADDR, 53 .dev_ops = &ch7xxx_ops, 54 }, 55 { 56 .type = INTEL_DVO_CHIP_TMDS, 57 .name = "ch7xxx", 58 .dvo_reg = DVOC, 59 .slave_addr = 0x75, /* For some ch7010 */ 60 .dev_ops = &ch7xxx_ops, 61 }, 62 { 63 .type = INTEL_DVO_CHIP_LVDS, 64 .name = "ivch", 65 .dvo_reg = DVOA, 66 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */ 67 .dev_ops = &ivch_ops, 68 }, 69 { 70 .type = INTEL_DVO_CHIP_TMDS, 71 .name = "tfp410", 72 .dvo_reg = DVOC, 73 .slave_addr = TFP410_ADDR, 74 .dev_ops = &tfp410_ops, 75 }, 76 { 77 .type = INTEL_DVO_CHIP_LVDS, 78 .name = "ch7017", 79 .dvo_reg = DVOC, 80 .slave_addr = 0x75, 81 .gpio = GMBUS_PORT_DPB, 82 .dev_ops = &ch7017_ops, 83 }, 84 { 85 .type = INTEL_DVO_CHIP_TMDS, 86 .name = "ns2501", 87 .dvo_reg = DVOC, 88 .slave_addr = NS2501_ADDR, 89 .dev_ops = &ns2501_ops, 90 } 91 }; 92 93 struct intel_dvo { 94 struct intel_encoder base; 95 96 struct intel_dvo_device dev; 97 98 struct drm_display_mode *panel_fixed_mode; 99 bool panel_wants_dither; 100 }; 101 102 static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder) 103 { 104 return container_of(encoder, struct intel_dvo, base); 105 } 106 107 static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector) 108 { 109 return enc_to_dvo(intel_attached_encoder(connector)); 110 } 111 112 static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector) 113 { 114 struct drm_device *dev = connector->base.dev; 115 struct drm_i915_private *dev_priv = dev->dev_private; 116 struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base); 117 u32 tmp; 118 119 tmp = I915_READ(intel_dvo->dev.dvo_reg); 120 121 if (!(tmp & DVO_ENABLE)) 122 return false; 123 124 return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev); 125 } 126 127 static bool intel_dvo_get_hw_state(struct intel_encoder *encoder, 128 enum i915_pipe *pipe) 129 { 130 struct drm_device *dev = encoder->base.dev; 131 struct drm_i915_private *dev_priv = dev->dev_private; 132 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 133 u32 tmp; 134 135 tmp = I915_READ(intel_dvo->dev.dvo_reg); 136 137 if (!(tmp & DVO_ENABLE)) 138 return false; 139 140 *pipe = PORT_TO_PIPE(tmp); 141 142 return true; 143 } 144 145 static void intel_dvo_get_config(struct intel_encoder *encoder, 146 struct intel_crtc_config *pipe_config) 147 { 148 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; 149 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 150 u32 tmp, flags = 0; 151 152 tmp = I915_READ(intel_dvo->dev.dvo_reg); 153 if (tmp & DVO_HSYNC_ACTIVE_HIGH) 154 flags |= DRM_MODE_FLAG_PHSYNC; 155 else 156 flags |= DRM_MODE_FLAG_NHSYNC; 157 if (tmp & DVO_VSYNC_ACTIVE_HIGH) 158 flags |= DRM_MODE_FLAG_PVSYNC; 159 else 160 flags |= DRM_MODE_FLAG_NVSYNC; 161 162 pipe_config->adjusted_mode.flags |= flags; 163 164 pipe_config->adjusted_mode.crtc_clock = pipe_config->port_clock; 165 } 166 167 static void intel_disable_dvo(struct intel_encoder *encoder) 168 { 169 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; 170 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 171 u32 dvo_reg = intel_dvo->dev.dvo_reg; 172 u32 temp = I915_READ(dvo_reg); 173 174 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false); 175 I915_WRITE(dvo_reg, temp & ~DVO_ENABLE); 176 I915_READ(dvo_reg); 177 } 178 179 static void intel_enable_dvo(struct intel_encoder *encoder) 180 { 181 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; 182 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 183 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); 184 u32 dvo_reg = intel_dvo->dev.dvo_reg; 185 u32 temp = I915_READ(dvo_reg); 186 187 I915_WRITE(dvo_reg, temp | DVO_ENABLE); 188 I915_READ(dvo_reg); 189 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, 190 &crtc->config.requested_mode, 191 &crtc->config.adjusted_mode); 192 193 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true); 194 } 195 196 /* Special dpms function to support cloning between dvo/sdvo/crt. */ 197 static void intel_dvo_dpms(struct drm_connector *connector, int mode) 198 { 199 struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 200 struct drm_crtc *crtc; 201 struct intel_crtc_config *config; 202 203 /* dvo supports only 2 dpms states. */ 204 if (mode != DRM_MODE_DPMS_ON) 205 mode = DRM_MODE_DPMS_OFF; 206 207 if (mode == connector->dpms) 208 return; 209 210 connector->dpms = mode; 211 212 /* Only need to change hw state when actually enabled */ 213 crtc = intel_dvo->base.base.crtc; 214 if (!crtc) { 215 intel_dvo->base.connectors_active = false; 216 return; 217 } 218 219 /* We call connector dpms manually below in case pipe dpms doesn't 220 * change due to cloning. */ 221 if (mode == DRM_MODE_DPMS_ON) { 222 config = &to_intel_crtc(crtc)->config; 223 224 intel_dvo->base.connectors_active = true; 225 226 intel_crtc_update_dpms(crtc); 227 228 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, 229 &config->requested_mode, 230 &config->adjusted_mode); 231 232 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true); 233 } else { 234 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false); 235 236 intel_dvo->base.connectors_active = false; 237 238 intel_crtc_update_dpms(crtc); 239 } 240 241 intel_modeset_check_state(connector->dev); 242 } 243 244 static enum drm_mode_status 245 intel_dvo_mode_valid(struct drm_connector *connector, 246 struct drm_display_mode *mode) 247 { 248 struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 249 250 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 251 return MODE_NO_DBLESCAN; 252 253 /* XXX: Validate clock range */ 254 255 if (intel_dvo->panel_fixed_mode) { 256 if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay) 257 return MODE_PANEL; 258 if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay) 259 return MODE_PANEL; 260 } 261 262 return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode); 263 } 264 265 static bool intel_dvo_compute_config(struct intel_encoder *encoder, 266 struct intel_crtc_config *pipe_config) 267 { 268 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 269 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode; 270 271 /* If we have timings from the BIOS for the panel, put them in 272 * to the adjusted mode. The CRTC will be set up for this mode, 273 * with the panel scaling set up to source from the H/VDisplay 274 * of the original mode. 275 */ 276 if (intel_dvo->panel_fixed_mode != NULL) { 277 #define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x 278 C(hdisplay); 279 C(hsync_start); 280 C(hsync_end); 281 C(htotal); 282 C(vdisplay); 283 C(vsync_start); 284 C(vsync_end); 285 C(vtotal); 286 C(clock); 287 #undef C 288 289 drm_mode_set_crtcinfo(adjusted_mode, 0); 290 } 291 292 return true; 293 } 294 295 static void intel_dvo_pre_enable(struct intel_encoder *encoder) 296 { 297 struct drm_device *dev = encoder->base.dev; 298 struct drm_i915_private *dev_priv = dev->dev_private; 299 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); 300 struct drm_display_mode *adjusted_mode = &crtc->config.adjusted_mode; 301 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 302 int pipe = crtc->pipe; 303 u32 dvo_val; 304 u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg; 305 306 switch (dvo_reg) { 307 case DVOA: 308 default: 309 dvo_srcdim_reg = DVOA_SRCDIM; 310 break; 311 case DVOB: 312 dvo_srcdim_reg = DVOB_SRCDIM; 313 break; 314 case DVOC: 315 dvo_srcdim_reg = DVOC_SRCDIM; 316 break; 317 } 318 319 /* Save the data order, since I don't know what it should be set to. */ 320 dvo_val = I915_READ(dvo_reg) & 321 (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG); 322 dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE | 323 DVO_BLANK_ACTIVE_HIGH; 324 325 if (pipe == 1) 326 dvo_val |= DVO_PIPE_B_SELECT; 327 dvo_val |= DVO_PIPE_STALL; 328 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) 329 dvo_val |= DVO_HSYNC_ACTIVE_HIGH; 330 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) 331 dvo_val |= DVO_VSYNC_ACTIVE_HIGH; 332 333 /*I915_WRITE(DVOB_SRCDIM, 334 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) | 335 (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/ 336 I915_WRITE(dvo_srcdim_reg, 337 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) | 338 (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT)); 339 /*I915_WRITE(DVOB, dvo_val);*/ 340 I915_WRITE(dvo_reg, dvo_val); 341 } 342 343 /** 344 * Detect the output connection on our DVO device. 345 * 346 * Unimplemented. 347 */ 348 static enum drm_connector_status 349 intel_dvo_detect(struct drm_connector *connector, bool force) 350 { 351 struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 352 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", 353 connector->base.id, connector->name); 354 return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev); 355 } 356 357 static int intel_dvo_get_modes(struct drm_connector *connector) 358 { 359 struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 360 struct drm_i915_private *dev_priv = connector->dev->dev_private; 361 362 /* We should probably have an i2c driver get_modes function for those 363 * devices which will have a fixed set of modes determined by the chip 364 * (TV-out, for example), but for now with just TMDS and LVDS, 365 * that's not the case. 366 */ 367 intel_ddc_get_modes(connector, 368 intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPC)); 369 if (!list_empty(&connector->probed_modes)) 370 return 1; 371 372 if (intel_dvo->panel_fixed_mode != NULL) { 373 struct drm_display_mode *mode; 374 mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode); 375 if (mode) { 376 drm_mode_probed_add(connector, mode); 377 return 1; 378 } 379 } 380 381 return 0; 382 } 383 384 static void intel_dvo_destroy(struct drm_connector *connector) 385 { 386 drm_connector_cleanup(connector); 387 kfree(connector); 388 } 389 390 static const struct drm_connector_funcs intel_dvo_connector_funcs = { 391 .dpms = intel_dvo_dpms, 392 .detect = intel_dvo_detect, 393 .destroy = intel_dvo_destroy, 394 .fill_modes = drm_helper_probe_single_connector_modes, 395 }; 396 397 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = { 398 .mode_valid = intel_dvo_mode_valid, 399 .get_modes = intel_dvo_get_modes, 400 .best_encoder = intel_best_encoder, 401 }; 402 403 static void intel_dvo_enc_destroy(struct drm_encoder *encoder) 404 { 405 struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder)); 406 407 if (intel_dvo->dev.dev_ops->destroy) 408 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev); 409 410 kfree(intel_dvo->panel_fixed_mode); 411 412 intel_encoder_destroy(encoder); 413 } 414 415 static const struct drm_encoder_funcs intel_dvo_enc_funcs = { 416 .destroy = intel_dvo_enc_destroy, 417 }; 418 419 /** 420 * Attempts to get a fixed panel timing for LVDS (currently only the i830). 421 * 422 * Other chips with DVO LVDS will need to extend this to deal with the LVDS 423 * chip being on DVOB/C and having multiple pipes. 424 */ 425 static struct drm_display_mode * 426 intel_dvo_get_current_mode(struct drm_connector *connector) 427 { 428 struct drm_device *dev = connector->dev; 429 struct drm_i915_private *dev_priv = dev->dev_private; 430 struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 431 uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg); 432 struct drm_display_mode *mode = NULL; 433 434 /* If the DVO port is active, that'll be the LVDS, so we can pull out 435 * its timings to get how the BIOS set up the panel. 436 */ 437 if (dvo_val & DVO_ENABLE) { 438 struct drm_crtc *crtc; 439 int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0; 440 441 crtc = intel_get_crtc_for_pipe(dev, pipe); 442 if (crtc) { 443 mode = intel_crtc_mode_get(dev, crtc); 444 if (mode) { 445 mode->type |= DRM_MODE_TYPE_PREFERRED; 446 if (dvo_val & DVO_HSYNC_ACTIVE_HIGH) 447 mode->flags |= DRM_MODE_FLAG_PHSYNC; 448 if (dvo_val & DVO_VSYNC_ACTIVE_HIGH) 449 mode->flags |= DRM_MODE_FLAG_PVSYNC; 450 } 451 } 452 } 453 454 return mode; 455 } 456 457 void intel_dvo_init(struct drm_device *dev) 458 { 459 struct drm_i915_private *dev_priv = dev->dev_private; 460 struct intel_encoder *intel_encoder; 461 struct intel_dvo *intel_dvo; 462 struct intel_connector *intel_connector; 463 int i; 464 int encoder_type = DRM_MODE_ENCODER_NONE; 465 466 intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL); 467 if (!intel_dvo) 468 return; 469 470 intel_connector = kzalloc(sizeof(*intel_connector), GFP_KERNEL); 471 if (!intel_connector) { 472 kfree(intel_dvo); 473 return; 474 } 475 476 intel_encoder = &intel_dvo->base; 477 drm_encoder_init(dev, &intel_encoder->base, 478 &intel_dvo_enc_funcs, encoder_type); 479 480 intel_encoder->disable = intel_disable_dvo; 481 intel_encoder->enable = intel_enable_dvo; 482 intel_encoder->get_hw_state = intel_dvo_get_hw_state; 483 intel_encoder->get_config = intel_dvo_get_config; 484 intel_encoder->compute_config = intel_dvo_compute_config; 485 intel_encoder->pre_enable = intel_dvo_pre_enable; 486 intel_connector->get_hw_state = intel_dvo_connector_get_hw_state; 487 intel_connector->unregister = intel_connector_unregister; 488 489 /* Now, try to find a controller */ 490 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) { 491 struct drm_connector *connector = &intel_connector->base; 492 const struct intel_dvo_device *dvo = &intel_dvo_devices[i]; 493 struct device *i2c; 494 int gpio; 495 bool dvoinit; 496 497 /* Allow the I2C driver info to specify the GPIO to be used in 498 * special cases, but otherwise default to what's defined 499 * in the spec. 500 */ 501 if (intel_gmbus_is_port_valid(dvo->gpio)) 502 gpio = dvo->gpio; 503 else if (dvo->type == INTEL_DVO_CHIP_LVDS) 504 gpio = GMBUS_PORT_SSC; 505 else 506 gpio = GMBUS_PORT_DPB; 507 508 /* Set up the I2C bus necessary for the chip we're probing. 509 * It appears that everything is on GPIOE except for panels 510 * on i830 laptops, which are on GPIOB (DVOA). 511 */ 512 i2c = intel_gmbus_get_adapter(dev_priv, gpio); 513 514 intel_dvo->dev = *dvo; 515 516 /* GMBUS NAK handling seems to be unstable, hence let the 517 * transmitter detection run in bit banging mode for now. 518 */ 519 intel_gmbus_force_bit(i2c, true); 520 521 dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c); 522 523 intel_gmbus_force_bit(i2c, false); 524 525 if (!dvoinit) 526 continue; 527 528 intel_encoder->type = INTEL_OUTPUT_DVO; 529 intel_encoder->crtc_mask = (1 << 0) | (1 << 1); 530 switch (dvo->type) { 531 case INTEL_DVO_CHIP_TMDS: 532 intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) | 533 (1 << INTEL_OUTPUT_DVO); 534 drm_connector_init(dev, connector, 535 &intel_dvo_connector_funcs, 536 DRM_MODE_CONNECTOR_DVII); 537 encoder_type = DRM_MODE_ENCODER_TMDS; 538 break; 539 case INTEL_DVO_CHIP_LVDS: 540 intel_encoder->cloneable = 0; 541 drm_connector_init(dev, connector, 542 &intel_dvo_connector_funcs, 543 DRM_MODE_CONNECTOR_LVDS); 544 encoder_type = DRM_MODE_ENCODER_LVDS; 545 break; 546 } 547 548 drm_connector_helper_add(connector, 549 &intel_dvo_connector_helper_funcs); 550 connector->display_info.subpixel_order = SubPixelHorizontalRGB; 551 connector->interlace_allowed = false; 552 connector->doublescan_allowed = false; 553 554 intel_connector_attach_encoder(intel_connector, intel_encoder); 555 if (dvo->type == INTEL_DVO_CHIP_LVDS) { 556 /* For our LVDS chipsets, we should hopefully be able 557 * to dig the fixed panel mode out of the BIOS data. 558 * However, it's in a different format from the BIOS 559 * data on chipsets with integrated LVDS (stored in AIM 560 * headers, likely), so for now, just get the current 561 * mode being output through DVO. 562 */ 563 intel_dvo->panel_fixed_mode = 564 intel_dvo_get_current_mode(connector); 565 intel_dvo->panel_wants_dither = true; 566 } 567 568 drm_connector_register(connector); 569 return; 570 } 571 572 drm_encoder_cleanup(&intel_encoder->base); 573 kfree(intel_dvo); 574 kfree(intel_connector); 575 } 576