1 /* 2 * Copyright 2006 Dave Airlie <airlied@linux.ie> 3 * Copyright © 2006-2007 Intel Corporation 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: 25 * Eric Anholt <eric@anholt.net> 26 */ 27 #include <linux/i2c.h> 28 #include <drm/drmP.h> 29 #include <drm/drm_crtc.h> 30 #include "intel_drv.h" 31 #include <drm/i915_drm.h> 32 #include "i915_drv.h" 33 #include "dvo.h" 34 35 #define SIL164_ADDR 0x38 36 #define CH7xxx_ADDR 0x76 37 #define TFP410_ADDR 0x38 38 #define NS2501_ADDR 0x38 39 40 static const struct intel_dvo_device intel_dvo_devices[] = { 41 { 42 .type = INTEL_DVO_CHIP_TMDS, 43 .name = "sil164", 44 .dvo_reg = DVOC, 45 .slave_addr = SIL164_ADDR, 46 .dev_ops = &sil164_ops, 47 }, 48 { 49 .type = INTEL_DVO_CHIP_TMDS, 50 .name = "ch7xxx", 51 .dvo_reg = DVOC, 52 .slave_addr = CH7xxx_ADDR, 53 .dev_ops = &ch7xxx_ops, 54 }, 55 { 56 .type = INTEL_DVO_CHIP_TMDS, 57 .name = "ch7xxx", 58 .dvo_reg = DVOC, 59 .slave_addr = 0x75, /* For some ch7010 */ 60 .dev_ops = &ch7xxx_ops, 61 }, 62 { 63 .type = INTEL_DVO_CHIP_LVDS, 64 .name = "ivch", 65 .dvo_reg = DVOA, 66 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */ 67 .dev_ops = &ivch_ops, 68 }, 69 { 70 .type = INTEL_DVO_CHIP_TMDS, 71 .name = "tfp410", 72 .dvo_reg = DVOC, 73 .slave_addr = TFP410_ADDR, 74 .dev_ops = &tfp410_ops, 75 }, 76 { 77 .type = INTEL_DVO_CHIP_LVDS, 78 .name = "ch7017", 79 .dvo_reg = DVOC, 80 .slave_addr = 0x75, 81 .gpio = GMBUS_PORT_DPB, 82 .dev_ops = &ch7017_ops, 83 }, 84 { 85 .type = INTEL_DVO_CHIP_TMDS, 86 .name = "ns2501", 87 .dvo_reg = DVOB, 88 .slave_addr = NS2501_ADDR, 89 .dev_ops = &ns2501_ops, 90 } 91 }; 92 93 struct intel_dvo { 94 struct intel_encoder base; 95 96 struct intel_dvo_device dev; 97 98 struct drm_display_mode *panel_fixed_mode; 99 bool panel_wants_dither; 100 }; 101 102 static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder) 103 { 104 return container_of(encoder, struct intel_dvo, base); 105 } 106 107 static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector) 108 { 109 return enc_to_dvo(intel_attached_encoder(connector)); 110 } 111 112 static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector) 113 { 114 struct drm_device *dev = connector->base.dev; 115 struct drm_i915_private *dev_priv = dev->dev_private; 116 struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base); 117 u32 tmp; 118 119 tmp = I915_READ(intel_dvo->dev.dvo_reg); 120 121 if (!(tmp & DVO_ENABLE)) 122 return false; 123 124 return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev); 125 } 126 127 static bool intel_dvo_get_hw_state(struct intel_encoder *encoder, 128 enum i915_pipe *pipe) 129 { 130 struct drm_device *dev = encoder->base.dev; 131 struct drm_i915_private *dev_priv = dev->dev_private; 132 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 133 u32 tmp; 134 135 tmp = I915_READ(intel_dvo->dev.dvo_reg); 136 137 if (!(tmp & DVO_ENABLE)) 138 return false; 139 140 *pipe = PORT_TO_PIPE(tmp); 141 142 return true; 143 } 144 145 static void intel_dvo_get_config(struct intel_encoder *encoder, 146 struct intel_crtc_config *pipe_config) 147 { 148 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; 149 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 150 u32 tmp, flags = 0; 151 152 tmp = I915_READ(intel_dvo->dev.dvo_reg); 153 if (tmp & DVO_HSYNC_ACTIVE_HIGH) 154 flags |= DRM_MODE_FLAG_PHSYNC; 155 else 156 flags |= DRM_MODE_FLAG_NHSYNC; 157 if (tmp & DVO_VSYNC_ACTIVE_HIGH) 158 flags |= DRM_MODE_FLAG_PVSYNC; 159 else 160 flags |= DRM_MODE_FLAG_NVSYNC; 161 162 pipe_config->adjusted_mode.flags |= flags; 163 164 pipe_config->adjusted_mode.crtc_clock = pipe_config->port_clock; 165 } 166 167 static void intel_disable_dvo(struct intel_encoder *encoder) 168 { 169 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; 170 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 171 u32 dvo_reg = intel_dvo->dev.dvo_reg; 172 u32 temp = I915_READ(dvo_reg); 173 174 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false); 175 I915_WRITE(dvo_reg, temp & ~DVO_ENABLE); 176 I915_READ(dvo_reg); 177 } 178 179 static void intel_enable_dvo(struct intel_encoder *encoder) 180 { 181 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; 182 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 183 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); 184 u32 dvo_reg = intel_dvo->dev.dvo_reg; 185 u32 temp = I915_READ(dvo_reg); 186 187 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, 188 &crtc->config.requested_mode, 189 &crtc->config.adjusted_mode); 190 191 I915_WRITE(dvo_reg, temp | DVO_ENABLE); 192 I915_READ(dvo_reg); 193 194 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true); 195 } 196 197 /* Special dpms function to support cloning between dvo/sdvo/crt. */ 198 static void intel_dvo_dpms(struct drm_connector *connector, int mode) 199 { 200 struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 201 struct drm_crtc *crtc; 202 struct intel_crtc_config *config; 203 204 /* dvo supports only 2 dpms states. */ 205 if (mode != DRM_MODE_DPMS_ON) 206 mode = DRM_MODE_DPMS_OFF; 207 208 if (mode == connector->dpms) 209 return; 210 211 connector->dpms = mode; 212 213 /* Only need to change hw state when actually enabled */ 214 crtc = intel_dvo->base.base.crtc; 215 if (!crtc) { 216 intel_dvo->base.connectors_active = false; 217 return; 218 } 219 220 /* We call connector dpms manually below in case pipe dpms doesn't 221 * change due to cloning. */ 222 if (mode == DRM_MODE_DPMS_ON) { 223 config = &to_intel_crtc(crtc)->config; 224 225 intel_dvo->base.connectors_active = true; 226 227 intel_crtc_update_dpms(crtc); 228 229 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true); 230 } else { 231 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false); 232 233 intel_dvo->base.connectors_active = false; 234 235 intel_crtc_update_dpms(crtc); 236 } 237 238 intel_modeset_check_state(connector->dev); 239 } 240 241 static enum drm_mode_status 242 intel_dvo_mode_valid(struct drm_connector *connector, 243 struct drm_display_mode *mode) 244 { 245 struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 246 247 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 248 return MODE_NO_DBLESCAN; 249 250 /* XXX: Validate clock range */ 251 252 if (intel_dvo->panel_fixed_mode) { 253 if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay) 254 return MODE_PANEL; 255 if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay) 256 return MODE_PANEL; 257 } 258 259 return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode); 260 } 261 262 static bool intel_dvo_compute_config(struct intel_encoder *encoder, 263 struct intel_crtc_config *pipe_config) 264 { 265 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 266 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode; 267 268 /* If we have timings from the BIOS for the panel, put them in 269 * to the adjusted mode. The CRTC will be set up for this mode, 270 * with the panel scaling set up to source from the H/VDisplay 271 * of the original mode. 272 */ 273 if (intel_dvo->panel_fixed_mode != NULL) { 274 #define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x 275 C(hdisplay); 276 C(hsync_start); 277 C(hsync_end); 278 C(htotal); 279 C(vdisplay); 280 C(vsync_start); 281 C(vsync_end); 282 C(vtotal); 283 C(clock); 284 #undef C 285 286 drm_mode_set_crtcinfo(adjusted_mode, 0); 287 } 288 289 return true; 290 } 291 292 static void intel_dvo_pre_enable(struct intel_encoder *encoder) 293 { 294 struct drm_device *dev = encoder->base.dev; 295 struct drm_i915_private *dev_priv = dev->dev_private; 296 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); 297 struct drm_display_mode *adjusted_mode = &crtc->config.adjusted_mode; 298 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 299 int pipe = crtc->pipe; 300 u32 dvo_val; 301 u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg; 302 303 switch (dvo_reg) { 304 case DVOA: 305 default: 306 dvo_srcdim_reg = DVOA_SRCDIM; 307 break; 308 case DVOB: 309 dvo_srcdim_reg = DVOB_SRCDIM; 310 break; 311 case DVOC: 312 dvo_srcdim_reg = DVOC_SRCDIM; 313 break; 314 } 315 316 /* Save the data order, since I don't know what it should be set to. */ 317 dvo_val = I915_READ(dvo_reg) & 318 (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG); 319 dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE | 320 DVO_BLANK_ACTIVE_HIGH; 321 322 if (pipe == 1) 323 dvo_val |= DVO_PIPE_B_SELECT; 324 dvo_val |= DVO_PIPE_STALL; 325 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) 326 dvo_val |= DVO_HSYNC_ACTIVE_HIGH; 327 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) 328 dvo_val |= DVO_VSYNC_ACTIVE_HIGH; 329 330 /*I915_WRITE(DVOB_SRCDIM, 331 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) | 332 (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/ 333 I915_WRITE(dvo_srcdim_reg, 334 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) | 335 (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT)); 336 /*I915_WRITE(DVOB, dvo_val);*/ 337 I915_WRITE(dvo_reg, dvo_val); 338 } 339 340 /** 341 * Detect the output connection on our DVO device. 342 * 343 * Unimplemented. 344 */ 345 static enum drm_connector_status 346 intel_dvo_detect(struct drm_connector *connector, bool force) 347 { 348 struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 349 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", 350 connector->base.id, connector->name); 351 return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev); 352 } 353 354 static int intel_dvo_get_modes(struct drm_connector *connector) 355 { 356 struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 357 struct drm_i915_private *dev_priv = connector->dev->dev_private; 358 359 /* We should probably have an i2c driver get_modes function for those 360 * devices which will have a fixed set of modes determined by the chip 361 * (TV-out, for example), but for now with just TMDS and LVDS, 362 * that's not the case. 363 */ 364 intel_ddc_get_modes(connector, 365 intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPC)); 366 if (!list_empty(&connector->probed_modes)) 367 return 1; 368 369 if (intel_dvo->panel_fixed_mode != NULL) { 370 struct drm_display_mode *mode; 371 mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode); 372 if (mode) { 373 drm_mode_probed_add(connector, mode); 374 return 1; 375 } 376 } 377 378 return 0; 379 } 380 381 static void intel_dvo_destroy(struct drm_connector *connector) 382 { 383 drm_connector_cleanup(connector); 384 kfree(connector); 385 } 386 387 static const struct drm_connector_funcs intel_dvo_connector_funcs = { 388 .dpms = intel_dvo_dpms, 389 .detect = intel_dvo_detect, 390 .destroy = intel_dvo_destroy, 391 .fill_modes = drm_helper_probe_single_connector_modes, 392 }; 393 394 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = { 395 .mode_valid = intel_dvo_mode_valid, 396 .get_modes = intel_dvo_get_modes, 397 .best_encoder = intel_best_encoder, 398 }; 399 400 static void intel_dvo_enc_destroy(struct drm_encoder *encoder) 401 { 402 struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder)); 403 404 if (intel_dvo->dev.dev_ops->destroy) 405 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev); 406 407 kfree(intel_dvo->panel_fixed_mode); 408 409 intel_encoder_destroy(encoder); 410 } 411 412 static const struct drm_encoder_funcs intel_dvo_enc_funcs = { 413 .destroy = intel_dvo_enc_destroy, 414 }; 415 416 /** 417 * Attempts to get a fixed panel timing for LVDS (currently only the i830). 418 * 419 * Other chips with DVO LVDS will need to extend this to deal with the LVDS 420 * chip being on DVOB/C and having multiple pipes. 421 */ 422 static struct drm_display_mode * 423 intel_dvo_get_current_mode(struct drm_connector *connector) 424 { 425 struct drm_device *dev = connector->dev; 426 struct drm_i915_private *dev_priv = dev->dev_private; 427 struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 428 uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg); 429 struct drm_display_mode *mode = NULL; 430 431 /* If the DVO port is active, that'll be the LVDS, so we can pull out 432 * its timings to get how the BIOS set up the panel. 433 */ 434 if (dvo_val & DVO_ENABLE) { 435 struct drm_crtc *crtc; 436 int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0; 437 438 crtc = intel_get_crtc_for_pipe(dev, pipe); 439 if (crtc) { 440 mode = intel_crtc_mode_get(dev, crtc); 441 if (mode) { 442 mode->type |= DRM_MODE_TYPE_PREFERRED; 443 if (dvo_val & DVO_HSYNC_ACTIVE_HIGH) 444 mode->flags |= DRM_MODE_FLAG_PHSYNC; 445 if (dvo_val & DVO_VSYNC_ACTIVE_HIGH) 446 mode->flags |= DRM_MODE_FLAG_PVSYNC; 447 } 448 } 449 } 450 451 return mode; 452 } 453 454 void intel_dvo_init(struct drm_device *dev) 455 { 456 struct drm_i915_private *dev_priv = dev->dev_private; 457 struct intel_encoder *intel_encoder; 458 struct intel_dvo *intel_dvo; 459 struct intel_connector *intel_connector; 460 int i; 461 int encoder_type = DRM_MODE_ENCODER_NONE; 462 463 intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL); 464 if (!intel_dvo) 465 return; 466 467 intel_connector = kzalloc(sizeof(*intel_connector), GFP_KERNEL); 468 if (!intel_connector) { 469 kfree(intel_dvo); 470 return; 471 } 472 473 intel_encoder = &intel_dvo->base; 474 drm_encoder_init(dev, &intel_encoder->base, 475 &intel_dvo_enc_funcs, encoder_type); 476 477 intel_encoder->disable = intel_disable_dvo; 478 intel_encoder->enable = intel_enable_dvo; 479 intel_encoder->get_hw_state = intel_dvo_get_hw_state; 480 intel_encoder->get_config = intel_dvo_get_config; 481 intel_encoder->compute_config = intel_dvo_compute_config; 482 intel_encoder->pre_enable = intel_dvo_pre_enable; 483 intel_connector->get_hw_state = intel_dvo_connector_get_hw_state; 484 intel_connector->unregister = intel_connector_unregister; 485 486 /* Now, try to find a controller */ 487 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) { 488 struct drm_connector *connector = &intel_connector->base; 489 const struct intel_dvo_device *dvo = &intel_dvo_devices[i]; 490 struct device *i2c; 491 int gpio; 492 bool dvoinit; 493 494 /* Allow the I2C driver info to specify the GPIO to be used in 495 * special cases, but otherwise default to what's defined 496 * in the spec. 497 */ 498 if (intel_gmbus_is_port_valid(dvo->gpio)) 499 gpio = dvo->gpio; 500 else if (dvo->type == INTEL_DVO_CHIP_LVDS) 501 gpio = GMBUS_PORT_SSC; 502 else 503 gpio = GMBUS_PORT_DPB; 504 505 /* Set up the I2C bus necessary for the chip we're probing. 506 * It appears that everything is on GPIOE except for panels 507 * on i830 laptops, which are on GPIOB (DVOA). 508 */ 509 i2c = intel_gmbus_get_adapter(dev_priv, gpio); 510 511 intel_dvo->dev = *dvo; 512 513 /* GMBUS NAK handling seems to be unstable, hence let the 514 * transmitter detection run in bit banging mode for now. 515 */ 516 intel_gmbus_force_bit(i2c, true); 517 518 dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c); 519 520 intel_gmbus_force_bit(i2c, false); 521 522 if (!dvoinit) 523 continue; 524 525 intel_encoder->type = INTEL_OUTPUT_DVO; 526 intel_encoder->crtc_mask = (1 << 0) | (1 << 1); 527 switch (dvo->type) { 528 case INTEL_DVO_CHIP_TMDS: 529 intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) | 530 (1 << INTEL_OUTPUT_DVO); 531 drm_connector_init(dev, connector, 532 &intel_dvo_connector_funcs, 533 DRM_MODE_CONNECTOR_DVII); 534 encoder_type = DRM_MODE_ENCODER_TMDS; 535 break; 536 case INTEL_DVO_CHIP_LVDS: 537 intel_encoder->cloneable = 0; 538 drm_connector_init(dev, connector, 539 &intel_dvo_connector_funcs, 540 DRM_MODE_CONNECTOR_LVDS); 541 encoder_type = DRM_MODE_ENCODER_LVDS; 542 break; 543 } 544 545 drm_connector_helper_add(connector, 546 &intel_dvo_connector_helper_funcs); 547 connector->display_info.subpixel_order = SubPixelHorizontalRGB; 548 connector->interlace_allowed = false; 549 connector->doublescan_allowed = false; 550 551 intel_connector_attach_encoder(intel_connector, intel_encoder); 552 if (dvo->type == INTEL_DVO_CHIP_LVDS) { 553 /* For our LVDS chipsets, we should hopefully be able 554 * to dig the fixed panel mode out of the BIOS data. 555 * However, it's in a different format from the BIOS 556 * data on chipsets with integrated LVDS (stored in AIM 557 * headers, likely), so for now, just get the current 558 * mode being output through DVO. 559 */ 560 intel_dvo->panel_fixed_mode = 561 intel_dvo_get_current_mode(connector); 562 intel_dvo->panel_wants_dither = true; 563 } 564 565 drm_connector_register(connector); 566 return; 567 } 568 569 drm_encoder_cleanup(&intel_encoder->base); 570 kfree(intel_dvo); 571 kfree(intel_connector); 572 } 573