xref: /dragonfly/sys/dev/drm/i915/intel_lvds.c (revision 3cc0afc6)
1 /*
2  * Copyright © 2006-2007 Intel Corporation
3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the next
13  * paragraph) shall be included in all copies or substantial portions of the
14  * Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22  * DEALINGS IN THE SOFTWARE.
23  *
24  * Authors:
25  *	Eric Anholt <eric@anholt.net>
26  *      Dave Airlie <airlied@linux.ie>
27  *      Jesse Barnes <jesse.barnes@intel.com>
28  */
29 
30 #include <linux/dmi.h>
31 #include <linux/i2c.h>
32 #include <drm/drmP.h>
33 #include <drm/drm_crtc.h>
34 #include <drm/drm_edid.h>
35 #include "intel_drv.h"
36 #include <drm/i915_drm.h>
37 #include "i915_drv.h"
38 
39 /* Private structure for the integrated LVDS support */
40 struct intel_lvds_connector {
41 	struct intel_connector base;
42 
43 #if 0
44 	struct notifier_block lid_notifier;
45 #endif
46 };
47 
48 struct intel_lvds_encoder {
49 	struct intel_encoder base;
50 
51 	bool is_dual_link;
52 	u32 reg;
53 
54 	struct intel_lvds_connector *attached_connector;
55 };
56 
57 static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
58 {
59 	return container_of(encoder, struct intel_lvds_encoder, base.base);
60 }
61 
62 static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
63 {
64 	return container_of(connector, struct intel_lvds_connector, base.base);
65 }
66 
67 static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
68 				    enum i915_pipe *pipe)
69 {
70 	struct drm_device *dev = encoder->base.dev;
71 	struct drm_i915_private *dev_priv = dev->dev_private;
72 	struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
73 	u32 tmp;
74 
75 	tmp = I915_READ(lvds_encoder->reg);
76 
77 	if (!(tmp & LVDS_PORT_EN))
78 		return false;
79 
80 	if (HAS_PCH_CPT(dev))
81 		*pipe = PORT_TO_PIPE_CPT(tmp);
82 	else
83 		*pipe = PORT_TO_PIPE(tmp);
84 
85 	return true;
86 }
87 
88 static void intel_lvds_get_config(struct intel_encoder *encoder,
89 				  struct intel_crtc_config *pipe_config)
90 {
91 	struct drm_device *dev = encoder->base.dev;
92 	struct drm_i915_private *dev_priv = dev->dev_private;
93 	u32 lvds_reg, tmp, flags = 0;
94 	int dotclock;
95 
96 	if (HAS_PCH_SPLIT(dev))
97 		lvds_reg = PCH_LVDS;
98 	else
99 		lvds_reg = LVDS;
100 
101 	tmp = I915_READ(lvds_reg);
102 	if (tmp & LVDS_HSYNC_POLARITY)
103 		flags |= DRM_MODE_FLAG_NHSYNC;
104 	else
105 		flags |= DRM_MODE_FLAG_PHSYNC;
106 	if (tmp & LVDS_VSYNC_POLARITY)
107 		flags |= DRM_MODE_FLAG_NVSYNC;
108 	else
109 		flags |= DRM_MODE_FLAG_PVSYNC;
110 
111 	pipe_config->adjusted_mode.flags |= flags;
112 
113 	/* gen2/3 store dither state in pfit control, needs to match */
114 	if (INTEL_INFO(dev)->gen < 4) {
115 		tmp = I915_READ(PFIT_CONTROL);
116 
117 		pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;
118 	}
119 
120 	dotclock = pipe_config->port_clock;
121 
122 	if (HAS_PCH_SPLIT(dev_priv->dev))
123 		ironlake_check_encoder_dotclock(pipe_config, dotclock);
124 
125 	pipe_config->adjusted_mode.crtc_clock = dotclock;
126 }
127 
128 static void intel_pre_enable_lvds(struct intel_encoder *encoder)
129 {
130 	struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
131 	struct drm_device *dev = encoder->base.dev;
132 	struct drm_i915_private *dev_priv = dev->dev_private;
133 	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
134 	const struct drm_display_mode *adjusted_mode =
135 		&crtc->config.adjusted_mode;
136 	int pipe = crtc->pipe;
137 	u32 temp;
138 
139 	if (HAS_PCH_SPLIT(dev)) {
140 		assert_fdi_rx_pll_disabled(dev_priv, pipe);
141 		assert_shared_dpll_disabled(dev_priv,
142 					    intel_crtc_to_shared_dpll(crtc));
143 	} else {
144 		assert_pll_disabled(dev_priv, pipe);
145 	}
146 
147 	temp = I915_READ(lvds_encoder->reg);
148 	temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
149 
150 	if (HAS_PCH_CPT(dev)) {
151 		temp &= ~PORT_TRANS_SEL_MASK;
152 		temp |= PORT_TRANS_SEL_CPT(pipe);
153 	} else {
154 		if (pipe == 1) {
155 			temp |= LVDS_PIPEB_SELECT;
156 		} else {
157 			temp &= ~LVDS_PIPEB_SELECT;
158 		}
159 	}
160 
161 	/* set the corresponsding LVDS_BORDER bit */
162 	temp &= ~LVDS_BORDER_ENABLE;
163 	temp |= crtc->config.gmch_pfit.lvds_border_bits;
164 	/* Set the B0-B3 data pairs corresponding to whether we're going to
165 	 * set the DPLLs for dual-channel mode or not.
166 	 */
167 	if (lvds_encoder->is_dual_link)
168 		temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
169 	else
170 		temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
171 
172 	/* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
173 	 * appropriately here, but we need to look more thoroughly into how
174 	 * panels behave in the two modes.
175 	 */
176 
177 	/* Set the dithering flag on LVDS as needed, note that there is no
178 	 * special lvds dither control bit on pch-split platforms, dithering is
179 	 * only controlled through the PIPECONF reg. */
180 	if (INTEL_INFO(dev)->gen == 4) {
181 		/* Bspec wording suggests that LVDS port dithering only exists
182 		 * for 18bpp panels. */
183 		if (crtc->config.dither && crtc->config.pipe_bpp == 18)
184 			temp |= LVDS_ENABLE_DITHER;
185 		else
186 			temp &= ~LVDS_ENABLE_DITHER;
187 	}
188 	temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
189 	if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
190 		temp |= LVDS_HSYNC_POLARITY;
191 	if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
192 		temp |= LVDS_VSYNC_POLARITY;
193 
194 	I915_WRITE(lvds_encoder->reg, temp);
195 }
196 
197 /**
198  * Sets the power state for the panel.
199  */
200 static void intel_enable_lvds(struct intel_encoder *encoder)
201 {
202 	struct drm_device *dev = encoder->base.dev;
203 	struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
204 	struct intel_connector *intel_connector =
205 		&lvds_encoder->attached_connector->base;
206 	struct drm_i915_private *dev_priv = dev->dev_private;
207 	u32 ctl_reg, stat_reg;
208 
209 	if (HAS_PCH_SPLIT(dev)) {
210 		ctl_reg = PCH_PP_CONTROL;
211 		stat_reg = PCH_PP_STATUS;
212 	} else {
213 		ctl_reg = PP_CONTROL;
214 		stat_reg = PP_STATUS;
215 	}
216 
217 	I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
218 
219 	I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
220 	POSTING_READ(lvds_encoder->reg);
221 	if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
222 		DRM_ERROR("timed out waiting for panel to power on\n");
223 
224 	intel_panel_enable_backlight(intel_connector);
225 }
226 
227 static void intel_disable_lvds(struct intel_encoder *encoder)
228 {
229 	struct drm_device *dev = encoder->base.dev;
230 	struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
231 	struct intel_connector *intel_connector =
232 		&lvds_encoder->attached_connector->base;
233 	struct drm_i915_private *dev_priv = dev->dev_private;
234 	u32 ctl_reg, stat_reg;
235 
236 	if (HAS_PCH_SPLIT(dev)) {
237 		ctl_reg = PCH_PP_CONTROL;
238 		stat_reg = PCH_PP_STATUS;
239 	} else {
240 		ctl_reg = PP_CONTROL;
241 		stat_reg = PP_STATUS;
242 	}
243 
244 	intel_panel_disable_backlight(intel_connector);
245 
246 	I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
247 	if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
248 		DRM_ERROR("timed out waiting for panel to power off\n");
249 
250 	I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
251 	POSTING_READ(lvds_encoder->reg);
252 }
253 
254 static enum drm_mode_status
255 intel_lvds_mode_valid(struct drm_connector *connector,
256 		      struct drm_display_mode *mode)
257 {
258 	struct intel_connector *intel_connector = to_intel_connector(connector);
259 	struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
260 
261 	if (mode->hdisplay > fixed_mode->hdisplay)
262 		return MODE_PANEL;
263 	if (mode->vdisplay > fixed_mode->vdisplay)
264 		return MODE_PANEL;
265 
266 	return MODE_OK;
267 }
268 
269 static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
270 				      struct intel_crtc_config *pipe_config)
271 {
272 	struct drm_device *dev = intel_encoder->base.dev;
273 	struct drm_i915_private *dev_priv = dev->dev_private;
274 	struct intel_lvds_encoder *lvds_encoder =
275 		to_lvds_encoder(&intel_encoder->base);
276 	struct intel_connector *intel_connector =
277 		&lvds_encoder->attached_connector->base;
278 	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
279 	struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
280 	unsigned int lvds_bpp;
281 
282 	/* Should never happen!! */
283 	if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
284 		DRM_ERROR("Can't support LVDS on pipe A\n");
285 		return false;
286 	}
287 
288 	if ((I915_READ(lvds_encoder->reg) & LVDS_A3_POWER_MASK) ==
289 	    LVDS_A3_POWER_UP)
290 		lvds_bpp = 8*3;
291 	else
292 		lvds_bpp = 6*3;
293 
294 	if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
295 		DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
296 			      pipe_config->pipe_bpp, lvds_bpp);
297 		pipe_config->pipe_bpp = lvds_bpp;
298 	}
299 
300 	/*
301 	 * We have timings from the BIOS for the panel, put them in
302 	 * to the adjusted mode.  The CRTC will be set up for this mode,
303 	 * with the panel scaling set up to source from the H/VDisplay
304 	 * of the original mode.
305 	 */
306 	intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
307 			       adjusted_mode);
308 
309 	if (HAS_PCH_SPLIT(dev)) {
310 		pipe_config->has_pch_encoder = true;
311 
312 		intel_pch_panel_fitting(intel_crtc, pipe_config,
313 					intel_connector->panel.fitting_mode);
314 	} else {
315 		intel_gmch_panel_fitting(intel_crtc, pipe_config,
316 					 intel_connector->panel.fitting_mode);
317 
318 	}
319 
320 	/*
321 	 * XXX: It would be nice to support lower refresh rates on the
322 	 * panels to reduce power consumption, and perhaps match the
323 	 * user's requested refresh rate.
324 	 */
325 
326 	return true;
327 }
328 
329 /**
330  * Detect the LVDS connection.
331  *
332  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
333  * connected and closed means disconnected.  We also send hotplug events as
334  * needed, using lid status notification from the input layer.
335  */
336 static enum drm_connector_status
337 intel_lvds_detect(struct drm_connector *connector, bool force)
338 {
339 	struct drm_device *dev = connector->dev;
340 	enum drm_connector_status status;
341 
342 	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
343 		      connector->base.id, connector->name);
344 
345 	status = intel_panel_detect(dev);
346 	if (status != connector_status_unknown)
347 		return status;
348 
349 	return connector_status_connected;
350 }
351 
352 /**
353  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
354  */
355 static int intel_lvds_get_modes(struct drm_connector *connector)
356 {
357 	struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
358 	struct drm_device *dev = connector->dev;
359 	struct drm_display_mode *mode;
360 
361 	/* use cached edid if we have one */
362 	if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
363 		return drm_add_edid_modes(connector, lvds_connector->base.edid);
364 
365 	mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
366 	if (mode == NULL)
367 		return 0;
368 
369 	drm_mode_probed_add(connector, mode);
370 	return 1;
371 }
372 
373 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
374 {
375 	DRM_INFO("Skipping forced modeset for %s\n", id->ident);
376 	return 1;
377 }
378 
379 /* The GPU hangs up on these systems if modeset is performed on LID open */
380 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
381 	{
382 		.callback = intel_no_modeset_on_lid_dmi_callback,
383 		.ident = "Toshiba Tecra A11",
384 		.matches = {
385 			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
386 			DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
387 		},
388 	},
389 
390 	{ }	/* terminating entry */
391 };
392 
393 #if 0
394 /*
395  * Lid events. Note the use of 'modeset':
396  *  - we set it to MODESET_ON_LID_OPEN on lid close,
397  *    and set it to MODESET_DONE on open
398  *  - we use it as a "only once" bit (ie we ignore
399  *    duplicate events where it was already properly set)
400  *  - the suspend/resume paths will set it to
401  *    MODESET_SUSPENDED and ignore the lid open event,
402  *    because they restore the mode ("lid open").
403  */
404 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
405 			    void *unused)
406 {
407 	struct intel_lvds_connector *lvds_connector =
408 		container_of(nb, struct intel_lvds_connector, lid_notifier);
409 	struct drm_connector *connector = &lvds_connector->base.base;
410 	struct drm_device *dev = connector->dev;
411 	struct drm_i915_private *dev_priv = dev->dev_private;
412 
413 	if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
414 		return NOTIFY_OK;
415 
416 	mutex_lock(&dev_priv->modeset_restore_lock);
417 	if (dev_priv->modeset_restore == MODESET_SUSPENDED)
418 		goto exit;
419 	/*
420 	 * check and update the status of LVDS connector after receiving
421 	 * the LID nofication event.
422 	 */
423 	connector->status = connector->funcs->detect(connector, false);
424 
425 	/* Don't force modeset on machines where it causes a GPU lockup */
426 	if (dmi_check_system(intel_no_modeset_on_lid))
427 		goto exit;
428 	if (!acpi_lid_open()) {
429 		/* do modeset on next lid open event */
430 		dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
431 		goto exit;
432 	}
433 
434 	if (dev_priv->modeset_restore == MODESET_DONE)
435 		goto exit;
436 
437 	/*
438 	 * Some old platform's BIOS love to wreak havoc while the lid is closed.
439 	 * We try to detect this here and undo any damage. The split for PCH
440 	 * platforms is rather conservative and a bit arbitrary expect that on
441 	 * those platforms VGA disabling requires actual legacy VGA I/O access,
442 	 * and as part of the cleanup in the hw state restore we also redisable
443 	 * the vga plane.
444 	 */
445 	if (!HAS_PCH_SPLIT(dev)) {
446 		drm_modeset_lock_all(dev);
447 		intel_modeset_setup_hw_state(dev, true);
448 		drm_modeset_unlock_all(dev);
449 	}
450 
451 	dev_priv->modeset_restore = MODESET_DONE;
452 
453 exit:
454 	mutex_unlock(&dev_priv->modeset_restore_lock);
455 	return NOTIFY_OK;
456 }
457 #endif
458 
459 /**
460  * intel_lvds_destroy - unregister and free LVDS structures
461  * @connector: connector to free
462  *
463  * Unregister the DDC bus for this connector then free the driver private
464  * structure.
465  */
466 static void intel_lvds_destroy(struct drm_connector *connector)
467 {
468 	struct intel_lvds_connector *lvds_connector =
469 		to_lvds_connector(connector);
470 
471 #if 0
472 	if (lvds_connector->lid_notifier.notifier_call)
473 		acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
474 #endif
475 
476 	if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
477 		kfree(lvds_connector->base.edid);
478 
479 	intel_panel_fini(&lvds_connector->base.panel);
480 
481 	drm_connector_cleanup(connector);
482 	kfree(connector);
483 }
484 
485 static int intel_lvds_set_property(struct drm_connector *connector,
486 				   struct drm_property *property,
487 				   uint64_t value)
488 {
489 	struct intel_connector *intel_connector = to_intel_connector(connector);
490 	struct drm_device *dev = connector->dev;
491 
492 	if (property == dev->mode_config.scaling_mode_property) {
493 		struct drm_crtc *crtc;
494 
495 		if (value == DRM_MODE_SCALE_NONE) {
496 			DRM_DEBUG_KMS("no scaling not supported\n");
497 			return -EINVAL;
498 		}
499 
500 		if (intel_connector->panel.fitting_mode == value) {
501 			/* the LVDS scaling property is not changed */
502 			return 0;
503 		}
504 		intel_connector->panel.fitting_mode = value;
505 
506 		crtc = intel_attached_encoder(connector)->base.crtc;
507 		if (crtc && crtc->enabled) {
508 			/*
509 			 * If the CRTC is enabled, the display will be changed
510 			 * according to the new panel fitting mode.
511 			 */
512 			intel_crtc_restore_mode(crtc);
513 		}
514 	}
515 
516 	return 0;
517 }
518 
519 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
520 	.get_modes = intel_lvds_get_modes,
521 	.mode_valid = intel_lvds_mode_valid,
522 	.best_encoder = intel_best_encoder,
523 };
524 
525 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
526 	.dpms = intel_connector_dpms,
527 	.detect = intel_lvds_detect,
528 	.fill_modes = drm_helper_probe_single_connector_modes,
529 	.set_property = intel_lvds_set_property,
530 	.destroy = intel_lvds_destroy,
531 };
532 
533 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
534 	.destroy = intel_encoder_destroy,
535 };
536 
537 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
538 {
539 	DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
540 	return 1;
541 }
542 
543 /* These systems claim to have LVDS, but really don't */
544 static const struct dmi_system_id intel_no_lvds[] = {
545 	{
546 		.callback = intel_no_lvds_dmi_callback,
547 		.ident = "Apple Mac Mini (Core series)",
548 		.matches = {
549 			DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
550 			DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
551 		},
552 	},
553 	{
554 		.callback = intel_no_lvds_dmi_callback,
555 		.ident = "Apple Mac Mini (Core 2 series)",
556 		.matches = {
557 			DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
558 			DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
559 		},
560 	},
561 	{
562 		.callback = intel_no_lvds_dmi_callback,
563 		.ident = "MSI IM-945GSE-A",
564 		.matches = {
565 			DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
566 			DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
567 		},
568 	},
569 	{
570 		.callback = intel_no_lvds_dmi_callback,
571 		.ident = "Dell Studio Hybrid",
572 		.matches = {
573 			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
574 			DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
575 		},
576 	},
577 	{
578 		.callback = intel_no_lvds_dmi_callback,
579 		.ident = "Dell OptiPlex FX170",
580 		.matches = {
581 			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
582 			DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
583 		},
584 	},
585 	{
586 		.callback = intel_no_lvds_dmi_callback,
587 		.ident = "AOpen Mini PC",
588 		.matches = {
589 			DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
590 			DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
591 		},
592 	},
593 	{
594 		.callback = intel_no_lvds_dmi_callback,
595 		.ident = "AOpen Mini PC MP915",
596 		.matches = {
597 			DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
598 			DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
599 		},
600 	},
601 	{
602 		.callback = intel_no_lvds_dmi_callback,
603 		.ident = "AOpen i915GMm-HFS",
604 		.matches = {
605 			DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
606 			DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
607 		},
608 	},
609 	{
610 		.callback = intel_no_lvds_dmi_callback,
611                 .ident = "AOpen i45GMx-I",
612                 .matches = {
613                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
614                         DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
615                 },
616         },
617 	{
618 		.callback = intel_no_lvds_dmi_callback,
619 		.ident = "Aopen i945GTt-VFA",
620 		.matches = {
621 			DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
622 		},
623 	},
624 	{
625 		.callback = intel_no_lvds_dmi_callback,
626 		.ident = "Clientron U800",
627 		.matches = {
628 			DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
629 			DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
630 		},
631 	},
632 	{
633                 .callback = intel_no_lvds_dmi_callback,
634                 .ident = "Clientron E830",
635                 .matches = {
636                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
637                         DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
638                 },
639         },
640         {
641 		.callback = intel_no_lvds_dmi_callback,
642 		.ident = "Asus EeeBox PC EB1007",
643 		.matches = {
644 			DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
645 			DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
646 		},
647 	},
648 	{
649 		.callback = intel_no_lvds_dmi_callback,
650 		.ident = "Asus AT5NM10T-I",
651 		.matches = {
652 			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
653 			DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
654 		},
655 	},
656 	{
657 		.callback = intel_no_lvds_dmi_callback,
658 		.ident = "Hewlett-Packard HP t5740",
659 		.matches = {
660 			DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
661 			DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
662 		},
663 	},
664 	{
665 		.callback = intel_no_lvds_dmi_callback,
666 		.ident = "Hewlett-Packard t5745",
667 		.matches = {
668 			DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
669 			DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
670 		},
671 	},
672 	{
673 		.callback = intel_no_lvds_dmi_callback,
674 		.ident = "Hewlett-Packard st5747",
675 		.matches = {
676 			DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
677 			DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
678 		},
679 	},
680 	{
681 		.callback = intel_no_lvds_dmi_callback,
682 		.ident = "MSI Wind Box DC500",
683 		.matches = {
684 			DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
685 			DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
686 		},
687 	},
688 	{
689 		.callback = intel_no_lvds_dmi_callback,
690 		.ident = "Gigabyte GA-D525TUD",
691 		.matches = {
692 			DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
693 			DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
694 		},
695 	},
696 	{
697 		.callback = intel_no_lvds_dmi_callback,
698 		.ident = "Supermicro X7SPA-H",
699 		.matches = {
700 			DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
701 			DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
702 		},
703 	},
704 	{
705 		.callback = intel_no_lvds_dmi_callback,
706 		.ident = "Fujitsu Esprimo Q900",
707 		.matches = {
708 			DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
709 			DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
710 		},
711 	},
712 	{
713 		.callback = intel_no_lvds_dmi_callback,
714 		.ident = "Intel D410PT",
715 		.matches = {
716 			DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
717 			DMI_MATCH(DMI_BOARD_NAME, "D410PT"),
718 		},
719 	},
720 	{
721 		.callback = intel_no_lvds_dmi_callback,
722 		.ident = "Intel D425KT",
723 		.matches = {
724 			DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
725 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "D425KT"),
726 		},
727 	},
728 	{
729 		.callback = intel_no_lvds_dmi_callback,
730 		.ident = "Intel D510MO",
731 		.matches = {
732 			DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
733 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"),
734 		},
735 	},
736 	{
737 		.callback = intel_no_lvds_dmi_callback,
738 		.ident = "Intel D525MW",
739 		.matches = {
740 			DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
741 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
742 		},
743 	},
744 
745 	{ }	/* terminating entry */
746 };
747 
748 /*
749  * Enumerate the child dev array parsed from VBT to check whether
750  * the LVDS is present.
751  * If it is present, return 1.
752  * If it is not present, return false.
753  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
754  */
755 static bool lvds_is_present_in_vbt(struct drm_device *dev,
756 				   u8 *i2c_pin)
757 {
758 	struct drm_i915_private *dev_priv = dev->dev_private;
759 	int i;
760 
761 	if (!dev_priv->vbt.child_dev_num)
762 		return true;
763 
764 	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
765 		union child_device_config *uchild = dev_priv->vbt.child_dev + i;
766 		struct old_child_dev_config *child = &uchild->old;
767 
768 		/* If the device type is not LFP, continue.
769 		 * We have to check both the new identifiers as well as the
770 		 * old for compatibility with some BIOSes.
771 		 */
772 		if (child->device_type != DEVICE_TYPE_INT_LFP &&
773 		    child->device_type != DEVICE_TYPE_LFP)
774 			continue;
775 
776 		if (intel_gmbus_is_port_valid(child->i2c_pin))
777 			*i2c_pin = child->i2c_pin;
778 
779 		/* However, we cannot trust the BIOS writers to populate
780 		 * the VBT correctly.  Since LVDS requires additional
781 		 * information from AIM blocks, a non-zero addin offset is
782 		 * a good indicator that the LVDS is actually present.
783 		 */
784 		if (child->addin_offset)
785 			return true;
786 
787 		/* But even then some BIOS writers perform some black magic
788 		 * and instantiate the device without reference to any
789 		 * additional data.  Trust that if the VBT was written into
790 		 * the OpRegion then they have validated the LVDS's existence.
791 		 */
792 		if (dev_priv->opregion.vbt)
793 			return true;
794 	}
795 
796 	return false;
797 }
798 
799 static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
800 {
801 	DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
802 	return 1;
803 }
804 
805 static const struct dmi_system_id intel_dual_link_lvds[] = {
806 	{
807 		.callback = intel_dual_link_lvds_callback,
808 		.ident = "Apple MacBook Pro (Core i5/i7 Series)",
809 		.matches = {
810 			DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
811 			DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
812 		},
813 	},
814 	{ }	/* terminating entry */
815 };
816 
817 bool intel_is_dual_link_lvds(struct drm_device *dev)
818 {
819 	struct intel_encoder *encoder;
820 	struct intel_lvds_encoder *lvds_encoder;
821 
822 	list_for_each_entry(encoder, &dev->mode_config.encoder_list,
823 			    base.head) {
824 		if (encoder->type == INTEL_OUTPUT_LVDS) {
825 			lvds_encoder = to_lvds_encoder(&encoder->base);
826 
827 			return lvds_encoder->is_dual_link;
828 		}
829 	}
830 
831 	return false;
832 }
833 
834 static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
835 {
836 	struct drm_device *dev = lvds_encoder->base.base.dev;
837 	unsigned int val;
838 	struct drm_i915_private *dev_priv = dev->dev_private;
839 
840 	/* use the module option value if specified */
841 	if (i915.lvds_channel_mode > 0)
842 		return i915.lvds_channel_mode == 2;
843 
844 	if (dmi_check_system(intel_dual_link_lvds))
845 		return true;
846 
847 	/* BIOS should set the proper LVDS register value at boot, but
848 	 * in reality, it doesn't set the value when the lid is closed;
849 	 * we need to check "the value to be set" in VBT when LVDS
850 	 * register is uninitialized.
851 	 */
852 	val = I915_READ(lvds_encoder->reg);
853 	if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
854 		val = dev_priv->vbt.bios_lvds_val;
855 
856 	return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
857 }
858 
859 static bool intel_lvds_supported(struct drm_device *dev)
860 {
861 	/* With the introduction of the PCH we gained a dedicated
862 	 * LVDS presence pin, use it. */
863 	if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
864 		return true;
865 
866 	/* Otherwise LVDS was only attached to mobile products,
867 	 * except for the inglorious 830gm */
868 	if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
869 		return true;
870 
871 	return false;
872 }
873 
874 /**
875  * intel_lvds_init - setup LVDS connectors on this device
876  * @dev: drm device
877  *
878  * Create the connector, register the LVDS DDC bus, and try to figure out what
879  * modes we can display on the LVDS panel (if present).
880  */
881 void intel_lvds_init(struct drm_device *dev)
882 {
883 	struct drm_i915_private *dev_priv = dev->dev_private;
884 	struct intel_lvds_encoder *lvds_encoder;
885 	struct intel_encoder *intel_encoder;
886 	struct intel_lvds_connector *lvds_connector;
887 	struct intel_connector *intel_connector;
888 	struct drm_connector *connector;
889 	struct drm_encoder *encoder;
890 	struct drm_display_mode *scan; /* *modes, *bios_mode; */
891 	struct drm_display_mode *fixed_mode = NULL;
892 	struct drm_display_mode *downclock_mode = NULL;
893 	struct edid *edid;
894 	struct drm_crtc *crtc;
895 	u32 lvds;
896 	int pipe;
897 	u8 pin;
898 
899 	if (!intel_lvds_supported(dev))
900 		return;
901 
902 	/* Skip init on machines we know falsely report LVDS */
903 	if (dmi_check_system(intel_no_lvds))
904 		return;
905 
906 	pin = GMBUS_PORT_PANEL;
907 	if (!lvds_is_present_in_vbt(dev, &pin)) {
908 		DRM_DEBUG_KMS("LVDS is not present in VBT\n");
909 		return;
910 	}
911 
912 	if (HAS_PCH_SPLIT(dev)) {
913 		if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
914 			return;
915 		if (dev_priv->vbt.edp_support) {
916 			DRM_DEBUG_KMS("disable LVDS for eDP support\n");
917 			return;
918 		}
919 	}
920 
921 	lvds_encoder = kzalloc(sizeof(*lvds_encoder), GFP_KERNEL);
922 	if (!lvds_encoder)
923 		return;
924 
925 	lvds_connector = kzalloc(sizeof(*lvds_connector), GFP_KERNEL);
926 	if (!lvds_connector) {
927 		kfree(lvds_encoder);
928 		return;
929 	}
930 
931 	lvds_encoder->attached_connector = lvds_connector;
932 
933 	intel_encoder = &lvds_encoder->base;
934 	encoder = &intel_encoder->base;
935 	intel_connector = &lvds_connector->base;
936 	connector = &intel_connector->base;
937 	drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
938 			   DRM_MODE_CONNECTOR_LVDS);
939 
940 	drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
941 			 DRM_MODE_ENCODER_LVDS);
942 
943 	intel_encoder->enable = intel_enable_lvds;
944 	intel_encoder->pre_enable = intel_pre_enable_lvds;
945 	intel_encoder->compute_config = intel_lvds_compute_config;
946 	intel_encoder->disable = intel_disable_lvds;
947 	intel_encoder->get_hw_state = intel_lvds_get_hw_state;
948 	intel_encoder->get_config = intel_lvds_get_config;
949 	intel_connector->get_hw_state = intel_connector_get_hw_state;
950 	intel_connector->unregister = intel_connector_unregister;
951 
952 	intel_connector_attach_encoder(intel_connector, intel_encoder);
953 	intel_encoder->type = INTEL_OUTPUT_LVDS;
954 
955 	intel_encoder->cloneable = 0;
956 	if (HAS_PCH_SPLIT(dev))
957 		intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
958 	else if (IS_GEN4(dev))
959 		intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
960 	else
961 		intel_encoder->crtc_mask = (1 << 1);
962 
963 	drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
964 	connector->display_info.subpixel_order = SubPixelHorizontalRGB;
965 	connector->interlace_allowed = false;
966 	connector->doublescan_allowed = false;
967 
968 	if (HAS_PCH_SPLIT(dev)) {
969 		lvds_encoder->reg = PCH_LVDS;
970 	} else {
971 		lvds_encoder->reg = LVDS;
972 	}
973 
974 	/* create the scaling mode property */
975 	drm_mode_create_scaling_mode_property(dev);
976 	drm_object_attach_property(&connector->base,
977 				      dev->mode_config.scaling_mode_property,
978 				      DRM_MODE_SCALE_ASPECT);
979 	intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
980 	/*
981 	 * LVDS discovery:
982 	 * 1) check for EDID on DDC
983 	 * 2) check for VBT data
984 	 * 3) check to see if LVDS is already on
985 	 *    if none of the above, no panel
986 	 * 4) make sure lid is open
987 	 *    if closed, act like it's not there for now
988 	 */
989 
990 	/*
991 	 * Attempt to get the fixed panel mode from DDC.  Assume that the
992 	 * preferred mode is the right one.
993 	 */
994 	mutex_lock(&dev->mode_config.mutex);
995 	edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
996 	if (edid) {
997 		if (drm_add_edid_modes(connector, edid)) {
998 			drm_mode_connector_update_edid_property(connector,
999 								edid);
1000 		} else {
1001 			kfree(edid);
1002 			edid = ERR_PTR(-EINVAL);
1003 		}
1004 	} else {
1005 		edid = ERR_PTR(-ENOENT);
1006 	}
1007 	lvds_connector->base.edid = edid;
1008 
1009 	if (IS_ERR_OR_NULL(edid)) {
1010 		/* Didn't get an EDID, so
1011 		 * Set wide sync ranges so we get all modes
1012 		 * handed to valid_mode for checking
1013 		 */
1014 		connector->display_info.min_vfreq = 0;
1015 		connector->display_info.max_vfreq = 200;
1016 		connector->display_info.min_hfreq = 0;
1017 		connector->display_info.max_hfreq = 200;
1018 	}
1019 
1020 	list_for_each_entry(scan, &connector->probed_modes, head) {
1021 		if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1022 			DRM_DEBUG_KMS("using preferred mode from EDID: ");
1023 			drm_mode_debug_printmodeline(scan);
1024 
1025 			fixed_mode = drm_mode_duplicate(dev, scan);
1026 			if (fixed_mode) {
1027 				downclock_mode =
1028 					intel_find_panel_downclock(dev,
1029 					fixed_mode, connector);
1030 				if (downclock_mode != NULL &&
1031 					i915.lvds_downclock) {
1032 					/* We found the downclock for LVDS. */
1033 					dev_priv->lvds_downclock_avail = true;
1034 					dev_priv->lvds_downclock =
1035 						downclock_mode->clock;
1036 					DRM_DEBUG_KMS("LVDS downclock is found"
1037 					" in EDID. Normal clock %dKhz, "
1038 					"downclock %dKhz\n",
1039 					fixed_mode->clock,
1040 					dev_priv->lvds_downclock);
1041 				}
1042 				goto out;
1043 			}
1044 		}
1045 	}
1046 
1047 	/* Failed to get EDID, what about VBT? */
1048 	if (dev_priv->vbt.lfp_lvds_vbt_mode) {
1049 		DRM_DEBUG_KMS("using mode from VBT: ");
1050 		drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
1051 
1052 		fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
1053 		if (fixed_mode) {
1054 			fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1055 			goto out;
1056 		}
1057 	}
1058 
1059 	/*
1060 	 * If we didn't get EDID, try checking if the panel is already turned
1061 	 * on.  If so, assume that whatever is currently programmed is the
1062 	 * correct mode.
1063 	 */
1064 
1065 	/* Ironlake: FIXME if still fail, not try pipe mode now */
1066 	if (HAS_PCH_SPLIT(dev))
1067 		goto failed;
1068 
1069 	lvds = I915_READ(LVDS);
1070 	pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1071 	crtc = intel_get_crtc_for_pipe(dev, pipe);
1072 
1073 	if (crtc && (lvds & LVDS_PORT_EN)) {
1074 		fixed_mode = intel_crtc_mode_get(dev, crtc);
1075 		if (fixed_mode) {
1076 			DRM_DEBUG_KMS("using current (BIOS) mode: ");
1077 			drm_mode_debug_printmodeline(fixed_mode);
1078 			fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1079 			goto out;
1080 		}
1081 	}
1082 
1083 	/* If we still don't have a mode after all that, give up. */
1084 	if (!fixed_mode)
1085 		goto failed;
1086 
1087 out:
1088 	mutex_unlock(&dev->mode_config.mutex);
1089 
1090 	lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
1091 	DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
1092 		      lvds_encoder->is_dual_link ? "dual" : "single");
1093 
1094 	/*
1095 	 * Unlock registers and just
1096 	 * leave them unlocked
1097 	 */
1098 	if (HAS_PCH_SPLIT(dev)) {
1099 		I915_WRITE(PCH_PP_CONTROL,
1100 			   I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
1101 	} else {
1102 		I915_WRITE(PP_CONTROL,
1103 			   I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
1104 	}
1105 #if 0
1106 	lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
1107 	if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
1108 		DRM_DEBUG_KMS("lid notifier registration failed\n");
1109 		lvds_connector->lid_notifier.notifier_call = NULL;
1110 	}
1111 	drm_sysfs_connector_add(connector);
1112 #endif
1113 
1114 	intel_panel_init(&intel_connector->panel, fixed_mode, downclock_mode);
1115 	intel_panel_setup_backlight(connector);
1116 
1117 	return;
1118 
1119 failed:
1120 	mutex_unlock(&dev->mode_config.mutex);
1121 
1122 	DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1123 	drm_connector_cleanup(connector);
1124 	drm_encoder_cleanup(encoder);
1125 	kfree(lvds_encoder);
1126 	kfree(lvds_connector);
1127 	return;
1128 }
1129