1 /* 2 * Copyright © 2006-2007 Intel Corporation 3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: 25 * Eric Anholt <eric@anholt.net> 26 * Dave Airlie <airlied@linux.ie> 27 * Jesse Barnes <jesse.barnes@intel.com> 28 */ 29 30 #include <linux/dmi.h> 31 #include <linux/i2c.h> 32 #include <drm/drmP.h> 33 #include <drm/drm_crtc.h> 34 #include <drm/drm_edid.h> 35 #include "intel_drv.h" 36 #include <drm/i915_drm.h> 37 #include "i915_drv.h" 38 39 /* Private structure for the integrated LVDS support */ 40 struct intel_lvds_connector { 41 struct intel_connector base; 42 43 #if 0 44 struct notifier_block lid_notifier; 45 #endif 46 }; 47 48 struct intel_lvds_encoder { 49 struct intel_encoder base; 50 51 bool is_dual_link; 52 u32 reg; 53 54 struct intel_lvds_connector *attached_connector; 55 }; 56 57 static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder) 58 { 59 return container_of(encoder, struct intel_lvds_encoder, base.base); 60 } 61 62 static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector) 63 { 64 return container_of(connector, struct intel_lvds_connector, base.base); 65 } 66 67 static bool intel_lvds_get_hw_state(struct intel_encoder *encoder, 68 enum i915_pipe *pipe) 69 { 70 struct drm_device *dev = encoder->base.dev; 71 struct drm_i915_private *dev_priv = dev->dev_private; 72 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base); 73 u32 tmp; 74 75 tmp = I915_READ(lvds_encoder->reg); 76 77 if (!(tmp & LVDS_PORT_EN)) 78 return false; 79 80 if (HAS_PCH_CPT(dev)) 81 *pipe = PORT_TO_PIPE_CPT(tmp); 82 else 83 *pipe = PORT_TO_PIPE(tmp); 84 85 return true; 86 } 87 88 static void intel_lvds_get_config(struct intel_encoder *encoder, 89 struct intel_crtc_config *pipe_config) 90 { 91 struct drm_device *dev = encoder->base.dev; 92 struct drm_i915_private *dev_priv = dev->dev_private; 93 u32 lvds_reg, tmp, flags = 0; 94 int dotclock; 95 96 if (HAS_PCH_SPLIT(dev)) 97 lvds_reg = PCH_LVDS; 98 else 99 lvds_reg = LVDS; 100 101 tmp = I915_READ(lvds_reg); 102 if (tmp & LVDS_HSYNC_POLARITY) 103 flags |= DRM_MODE_FLAG_NHSYNC; 104 else 105 flags |= DRM_MODE_FLAG_PHSYNC; 106 if (tmp & LVDS_VSYNC_POLARITY) 107 flags |= DRM_MODE_FLAG_NVSYNC; 108 else 109 flags |= DRM_MODE_FLAG_PVSYNC; 110 111 pipe_config->adjusted_mode.flags |= flags; 112 113 /* gen2/3 store dither state in pfit control, needs to match */ 114 if (INTEL_INFO(dev)->gen < 4) { 115 tmp = I915_READ(PFIT_CONTROL); 116 117 pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE; 118 } 119 120 dotclock = pipe_config->port_clock; 121 122 if (HAS_PCH_SPLIT(dev_priv->dev)) 123 ironlake_check_encoder_dotclock(pipe_config, dotclock); 124 125 pipe_config->adjusted_mode.crtc_clock = dotclock; 126 } 127 128 /* The LVDS pin pair needs to be on before the DPLLs are enabled. 129 * This is an exception to the general rule that mode_set doesn't turn 130 * things on. 131 */ 132 static void intel_pre_enable_lvds(struct intel_encoder *encoder) 133 { 134 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base); 135 struct drm_device *dev = encoder->base.dev; 136 struct drm_i915_private *dev_priv = dev->dev_private; 137 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); 138 const struct drm_display_mode *adjusted_mode = 139 &crtc->config.adjusted_mode; 140 int pipe = crtc->pipe; 141 u32 temp; 142 143 if (HAS_PCH_SPLIT(dev)) { 144 assert_fdi_rx_pll_disabled(dev_priv, pipe); 145 assert_shared_dpll_disabled(dev_priv, 146 intel_crtc_to_shared_dpll(crtc)); 147 } else { 148 assert_pll_disabled(dev_priv, pipe); 149 } 150 151 temp = I915_READ(lvds_encoder->reg); 152 temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP; 153 154 if (HAS_PCH_CPT(dev)) { 155 temp &= ~PORT_TRANS_SEL_MASK; 156 temp |= PORT_TRANS_SEL_CPT(pipe); 157 } else { 158 if (pipe == 1) { 159 temp |= LVDS_PIPEB_SELECT; 160 } else { 161 temp &= ~LVDS_PIPEB_SELECT; 162 } 163 } 164 165 /* set the corresponsding LVDS_BORDER bit */ 166 temp &= ~LVDS_BORDER_ENABLE; 167 temp |= crtc->config.gmch_pfit.lvds_border_bits; 168 /* Set the B0-B3 data pairs corresponding to whether we're going to 169 * set the DPLLs for dual-channel mode or not. 170 */ 171 if (lvds_encoder->is_dual_link) 172 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP; 173 else 174 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP); 175 176 /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP) 177 * appropriately here, but we need to look more thoroughly into how 178 * panels behave in the two modes. 179 */ 180 181 /* Set the dithering flag on LVDS as needed, note that there is no 182 * special lvds dither control bit on pch-split platforms, dithering is 183 * only controlled through the PIPECONF reg. */ 184 if (INTEL_INFO(dev)->gen == 4) { 185 /* Bspec wording suggests that LVDS port dithering only exists 186 * for 18bpp panels. */ 187 if (crtc->config.dither && crtc->config.pipe_bpp == 18) 188 temp |= LVDS_ENABLE_DITHER; 189 else 190 temp &= ~LVDS_ENABLE_DITHER; 191 } 192 temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY); 193 if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC) 194 temp |= LVDS_HSYNC_POLARITY; 195 if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC) 196 temp |= LVDS_VSYNC_POLARITY; 197 198 I915_WRITE(lvds_encoder->reg, temp); 199 } 200 201 /** 202 * Sets the power state for the panel. 203 */ 204 static void intel_enable_lvds(struct intel_encoder *encoder) 205 { 206 struct drm_device *dev = encoder->base.dev; 207 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base); 208 struct intel_connector *intel_connector = 209 &lvds_encoder->attached_connector->base; 210 struct drm_i915_private *dev_priv = dev->dev_private; 211 u32 ctl_reg, stat_reg; 212 213 if (HAS_PCH_SPLIT(dev)) { 214 ctl_reg = PCH_PP_CONTROL; 215 stat_reg = PCH_PP_STATUS; 216 } else { 217 ctl_reg = PP_CONTROL; 218 stat_reg = PP_STATUS; 219 } 220 221 I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN); 222 223 I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON); 224 POSTING_READ(lvds_encoder->reg); 225 if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000)) 226 DRM_ERROR("timed out waiting for panel to power on\n"); 227 228 intel_panel_enable_backlight(intel_connector); 229 } 230 231 static void intel_disable_lvds(struct intel_encoder *encoder) 232 { 233 struct drm_device *dev = encoder->base.dev; 234 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base); 235 struct intel_connector *intel_connector = 236 &lvds_encoder->attached_connector->base; 237 struct drm_i915_private *dev_priv = dev->dev_private; 238 u32 ctl_reg, stat_reg; 239 240 if (HAS_PCH_SPLIT(dev)) { 241 ctl_reg = PCH_PP_CONTROL; 242 stat_reg = PCH_PP_STATUS; 243 } else { 244 ctl_reg = PP_CONTROL; 245 stat_reg = PP_STATUS; 246 } 247 248 intel_panel_disable_backlight(intel_connector); 249 250 I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON); 251 if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000)) 252 DRM_ERROR("timed out waiting for panel to power off\n"); 253 254 I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN); 255 POSTING_READ(lvds_encoder->reg); 256 } 257 258 static enum drm_mode_status 259 intel_lvds_mode_valid(struct drm_connector *connector, 260 struct drm_display_mode *mode) 261 { 262 struct intel_connector *intel_connector = to_intel_connector(connector); 263 struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode; 264 265 if (mode->hdisplay > fixed_mode->hdisplay) 266 return MODE_PANEL; 267 if (mode->vdisplay > fixed_mode->vdisplay) 268 return MODE_PANEL; 269 270 return MODE_OK; 271 } 272 273 static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder, 274 struct intel_crtc_config *pipe_config) 275 { 276 struct drm_device *dev = intel_encoder->base.dev; 277 struct drm_i915_private *dev_priv = dev->dev_private; 278 struct intel_lvds_encoder *lvds_encoder = 279 to_lvds_encoder(&intel_encoder->base); 280 struct intel_connector *intel_connector = 281 &lvds_encoder->attached_connector->base; 282 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode; 283 struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc; 284 unsigned int lvds_bpp; 285 286 /* Should never happen!! */ 287 if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) { 288 DRM_ERROR("Can't support LVDS on pipe A\n"); 289 return false; 290 } 291 292 if ((I915_READ(lvds_encoder->reg) & LVDS_A3_POWER_MASK) == 293 LVDS_A3_POWER_UP) 294 lvds_bpp = 8*3; 295 else 296 lvds_bpp = 6*3; 297 298 if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) { 299 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n", 300 pipe_config->pipe_bpp, lvds_bpp); 301 pipe_config->pipe_bpp = lvds_bpp; 302 } 303 304 /* 305 * We have timings from the BIOS for the panel, put them in 306 * to the adjusted mode. The CRTC will be set up for this mode, 307 * with the panel scaling set up to source from the H/VDisplay 308 * of the original mode. 309 */ 310 intel_fixed_panel_mode(intel_connector->panel.fixed_mode, 311 adjusted_mode); 312 313 if (HAS_PCH_SPLIT(dev)) { 314 pipe_config->has_pch_encoder = true; 315 316 intel_pch_panel_fitting(intel_crtc, pipe_config, 317 intel_connector->panel.fitting_mode); 318 } else { 319 intel_gmch_panel_fitting(intel_crtc, pipe_config, 320 intel_connector->panel.fitting_mode); 321 322 } 323 324 /* 325 * XXX: It would be nice to support lower refresh rates on the 326 * panels to reduce power consumption, and perhaps match the 327 * user's requested refresh rate. 328 */ 329 330 return true; 331 } 332 333 static void intel_lvds_mode_set(struct intel_encoder *encoder) 334 { 335 /* 336 * We don't do anything here, the LVDS port is fully set up in the pre 337 * enable hook - the ordering constraints for enabling the lvds port vs. 338 * enabling the display pll are too strict. 339 */ 340 } 341 342 /** 343 * Detect the LVDS connection. 344 * 345 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means 346 * connected and closed means disconnected. We also send hotplug events as 347 * needed, using lid status notification from the input layer. 348 */ 349 static enum drm_connector_status 350 intel_lvds_detect(struct drm_connector *connector, bool force) 351 { 352 struct drm_device *dev = connector->dev; 353 enum drm_connector_status status; 354 355 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", 356 connector->base.id, drm_get_connector_name(connector)); 357 358 status = intel_panel_detect(dev); 359 if (status != connector_status_unknown) 360 return status; 361 362 return connector_status_connected; 363 } 364 365 /** 366 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise. 367 */ 368 static int intel_lvds_get_modes(struct drm_connector *connector) 369 { 370 struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector); 371 struct drm_device *dev = connector->dev; 372 struct drm_display_mode *mode; 373 374 /* use cached edid if we have one */ 375 if (!IS_ERR_OR_NULL(lvds_connector->base.edid)) 376 return drm_add_edid_modes(connector, lvds_connector->base.edid); 377 378 mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode); 379 if (mode == NULL) 380 return 0; 381 382 drm_mode_probed_add(connector, mode); 383 return 1; 384 } 385 386 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id) 387 { 388 DRM_INFO("Skipping forced modeset for %s\n", id->ident); 389 return 1; 390 } 391 392 /* The GPU hangs up on these systems if modeset is performed on LID open */ 393 static const struct dmi_system_id intel_no_modeset_on_lid[] = { 394 { 395 .callback = intel_no_modeset_on_lid_dmi_callback, 396 .ident = "Toshiba Tecra A11", 397 .matches = { 398 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), 399 DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"), 400 }, 401 }, 402 403 { } /* terminating entry */ 404 }; 405 406 #if 0 407 /* 408 * Lid events. Note the use of 'modeset': 409 * - we set it to MODESET_ON_LID_OPEN on lid close, 410 * and set it to MODESET_DONE on open 411 * - we use it as a "only once" bit (ie we ignore 412 * duplicate events where it was already properly set) 413 * - the suspend/resume paths will set it to 414 * MODESET_SUSPENDED and ignore the lid open event, 415 * because they restore the mode ("lid open"). 416 */ 417 static int intel_lid_notify(struct notifier_block *nb, unsigned long val, 418 void *unused) 419 { 420 struct intel_lvds_connector *lvds_connector = 421 container_of(nb, struct intel_lvds_connector, lid_notifier); 422 struct drm_connector *connector = &lvds_connector->base.base; 423 struct drm_device *dev = connector->dev; 424 struct drm_i915_private *dev_priv = dev->dev_private; 425 426 if (dev->switch_power_state != DRM_SWITCH_POWER_ON) 427 return NOTIFY_OK; 428 429 mutex_lock(&dev_priv->modeset_restore_lock); 430 if (dev_priv->modeset_restore == MODESET_SUSPENDED) 431 goto exit; 432 /* 433 * check and update the status of LVDS connector after receiving 434 * the LID nofication event. 435 */ 436 connector->status = connector->funcs->detect(connector, false); 437 438 /* Don't force modeset on machines where it causes a GPU lockup */ 439 if (dmi_check_system(intel_no_modeset_on_lid)) 440 goto exit; 441 if (!acpi_lid_open()) { 442 /* do modeset on next lid open event */ 443 dev_priv->modeset_restore = MODESET_ON_LID_OPEN; 444 goto exit; 445 } 446 447 if (dev_priv->modeset_restore == MODESET_DONE) 448 goto exit; 449 450 /* 451 * Some old platform's BIOS love to wreak havoc while the lid is closed. 452 * We try to detect this here and undo any damage. The split for PCH 453 * platforms is rather conservative and a bit arbitrary expect that on 454 * those platforms VGA disabling requires actual legacy VGA I/O access, 455 * and as part of the cleanup in the hw state restore we also redisable 456 * the vga plane. 457 */ 458 if (!HAS_PCH_SPLIT(dev)) { 459 drm_modeset_lock_all(dev); 460 intel_modeset_setup_hw_state(dev, true); 461 drm_modeset_unlock_all(dev); 462 } 463 464 dev_priv->modeset_restore = MODESET_DONE; 465 466 exit: 467 mutex_unlock(&dev_priv->modeset_restore_lock); 468 return NOTIFY_OK; 469 } 470 #endif 471 472 /** 473 * intel_lvds_destroy - unregister and free LVDS structures 474 * @connector: connector to free 475 * 476 * Unregister the DDC bus for this connector then free the driver private 477 * structure. 478 */ 479 static void intel_lvds_destroy(struct drm_connector *connector) 480 { 481 struct intel_lvds_connector *lvds_connector = 482 to_lvds_connector(connector); 483 484 #if 0 485 if (lvds_connector->lid_notifier.notifier_call) 486 acpi_lid_notifier_unregister(&lvds_connector->lid_notifier); 487 #endif 488 489 if (!IS_ERR_OR_NULL(lvds_connector->base.edid)) 490 kfree(lvds_connector->base.edid); 491 492 intel_panel_fini(&lvds_connector->base.panel); 493 494 drm_connector_cleanup(connector); 495 kfree(connector); 496 } 497 498 static int intel_lvds_set_property(struct drm_connector *connector, 499 struct drm_property *property, 500 uint64_t value) 501 { 502 struct intel_connector *intel_connector = to_intel_connector(connector); 503 struct drm_device *dev = connector->dev; 504 505 if (property == dev->mode_config.scaling_mode_property) { 506 struct drm_crtc *crtc; 507 508 if (value == DRM_MODE_SCALE_NONE) { 509 DRM_DEBUG_KMS("no scaling not supported\n"); 510 return -EINVAL; 511 } 512 513 if (intel_connector->panel.fitting_mode == value) { 514 /* the LVDS scaling property is not changed */ 515 return 0; 516 } 517 intel_connector->panel.fitting_mode = value; 518 519 crtc = intel_attached_encoder(connector)->base.crtc; 520 if (crtc && crtc->enabled) { 521 /* 522 * If the CRTC is enabled, the display will be changed 523 * according to the new panel fitting mode. 524 */ 525 intel_crtc_restore_mode(crtc); 526 } 527 } 528 529 return 0; 530 } 531 532 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = { 533 .get_modes = intel_lvds_get_modes, 534 .mode_valid = intel_lvds_mode_valid, 535 .best_encoder = intel_best_encoder, 536 }; 537 538 static const struct drm_connector_funcs intel_lvds_connector_funcs = { 539 .dpms = intel_connector_dpms, 540 .detect = intel_lvds_detect, 541 .fill_modes = drm_helper_probe_single_connector_modes, 542 .set_property = intel_lvds_set_property, 543 .destroy = intel_lvds_destroy, 544 }; 545 546 static const struct drm_encoder_funcs intel_lvds_enc_funcs = { 547 .destroy = intel_encoder_destroy, 548 }; 549 550 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id) 551 { 552 DRM_INFO("Skipping LVDS initialization for %s\n", id->ident); 553 return 1; 554 } 555 556 /* These systems claim to have LVDS, but really don't */ 557 static const struct dmi_system_id intel_no_lvds[] = { 558 { 559 .callback = intel_no_lvds_dmi_callback, 560 .ident = "Apple Mac Mini (Core series)", 561 .matches = { 562 DMI_MATCH(DMI_SYS_VENDOR, "Apple"), 563 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"), 564 }, 565 }, 566 { 567 .callback = intel_no_lvds_dmi_callback, 568 .ident = "Apple Mac Mini (Core 2 series)", 569 .matches = { 570 DMI_MATCH(DMI_SYS_VENDOR, "Apple"), 571 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"), 572 }, 573 }, 574 { 575 .callback = intel_no_lvds_dmi_callback, 576 .ident = "MSI IM-945GSE-A", 577 .matches = { 578 DMI_MATCH(DMI_SYS_VENDOR, "MSI"), 579 DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"), 580 }, 581 }, 582 { 583 .callback = intel_no_lvds_dmi_callback, 584 .ident = "Dell Studio Hybrid", 585 .matches = { 586 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 587 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"), 588 }, 589 }, 590 { 591 .callback = intel_no_lvds_dmi_callback, 592 .ident = "Dell OptiPlex FX170", 593 .matches = { 594 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 595 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"), 596 }, 597 }, 598 { 599 .callback = intel_no_lvds_dmi_callback, 600 .ident = "AOpen Mini PC", 601 .matches = { 602 DMI_MATCH(DMI_SYS_VENDOR, "AOpen"), 603 DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"), 604 }, 605 }, 606 { 607 .callback = intel_no_lvds_dmi_callback, 608 .ident = "AOpen Mini PC MP915", 609 .matches = { 610 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"), 611 DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"), 612 }, 613 }, 614 { 615 .callback = intel_no_lvds_dmi_callback, 616 .ident = "AOpen i915GMm-HFS", 617 .matches = { 618 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"), 619 DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"), 620 }, 621 }, 622 { 623 .callback = intel_no_lvds_dmi_callback, 624 .ident = "AOpen i45GMx-I", 625 .matches = { 626 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"), 627 DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"), 628 }, 629 }, 630 { 631 .callback = intel_no_lvds_dmi_callback, 632 .ident = "Aopen i945GTt-VFA", 633 .matches = { 634 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"), 635 }, 636 }, 637 { 638 .callback = intel_no_lvds_dmi_callback, 639 .ident = "Clientron U800", 640 .matches = { 641 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"), 642 DMI_MATCH(DMI_PRODUCT_NAME, "U800"), 643 }, 644 }, 645 { 646 .callback = intel_no_lvds_dmi_callback, 647 .ident = "Clientron E830", 648 .matches = { 649 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"), 650 DMI_MATCH(DMI_PRODUCT_NAME, "E830"), 651 }, 652 }, 653 { 654 .callback = intel_no_lvds_dmi_callback, 655 .ident = "Asus EeeBox PC EB1007", 656 .matches = { 657 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."), 658 DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"), 659 }, 660 }, 661 { 662 .callback = intel_no_lvds_dmi_callback, 663 .ident = "Asus AT5NM10T-I", 664 .matches = { 665 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), 666 DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"), 667 }, 668 }, 669 { 670 .callback = intel_no_lvds_dmi_callback, 671 .ident = "Hewlett-Packard HP t5740", 672 .matches = { 673 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), 674 DMI_MATCH(DMI_PRODUCT_NAME, " t5740"), 675 }, 676 }, 677 { 678 .callback = intel_no_lvds_dmi_callback, 679 .ident = "Hewlett-Packard t5745", 680 .matches = { 681 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), 682 DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"), 683 }, 684 }, 685 { 686 .callback = intel_no_lvds_dmi_callback, 687 .ident = "Hewlett-Packard st5747", 688 .matches = { 689 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), 690 DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"), 691 }, 692 }, 693 { 694 .callback = intel_no_lvds_dmi_callback, 695 .ident = "MSI Wind Box DC500", 696 .matches = { 697 DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"), 698 DMI_MATCH(DMI_BOARD_NAME, "MS-7469"), 699 }, 700 }, 701 { 702 .callback = intel_no_lvds_dmi_callback, 703 .ident = "Gigabyte GA-D525TUD", 704 .matches = { 705 DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."), 706 DMI_MATCH(DMI_BOARD_NAME, "D525TUD"), 707 }, 708 }, 709 { 710 .callback = intel_no_lvds_dmi_callback, 711 .ident = "Supermicro X7SPA-H", 712 .matches = { 713 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"), 714 DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"), 715 }, 716 }, 717 { 718 .callback = intel_no_lvds_dmi_callback, 719 .ident = "Fujitsu Esprimo Q900", 720 .matches = { 721 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"), 722 DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"), 723 }, 724 }, 725 { 726 .callback = intel_no_lvds_dmi_callback, 727 .ident = "Intel D410PT", 728 .matches = { 729 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"), 730 DMI_MATCH(DMI_BOARD_NAME, "D410PT"), 731 }, 732 }, 733 { 734 .callback = intel_no_lvds_dmi_callback, 735 .ident = "Intel D425KT", 736 .matches = { 737 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"), 738 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D425KT"), 739 }, 740 }, 741 { 742 .callback = intel_no_lvds_dmi_callback, 743 .ident = "Intel D510MO", 744 .matches = { 745 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"), 746 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"), 747 }, 748 }, 749 { 750 .callback = intel_no_lvds_dmi_callback, 751 .ident = "Intel D525MW", 752 .matches = { 753 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"), 754 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"), 755 }, 756 }, 757 758 { } /* terminating entry */ 759 }; 760 761 /* 762 * Enumerate the child dev array parsed from VBT to check whether 763 * the LVDS is present. 764 * If it is present, return 1. 765 * If it is not present, return false. 766 * If no child dev is parsed from VBT, it assumes that the LVDS is present. 767 */ 768 static bool lvds_is_present_in_vbt(struct drm_device *dev, 769 u8 *i2c_pin) 770 { 771 struct drm_i915_private *dev_priv = dev->dev_private; 772 int i; 773 774 if (!dev_priv->vbt.child_dev_num) 775 return true; 776 777 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) { 778 union child_device_config *uchild = dev_priv->vbt.child_dev + i; 779 struct old_child_dev_config *child = &uchild->old; 780 781 /* If the device type is not LFP, continue. 782 * We have to check both the new identifiers as well as the 783 * old for compatibility with some BIOSes. 784 */ 785 if (child->device_type != DEVICE_TYPE_INT_LFP && 786 child->device_type != DEVICE_TYPE_LFP) 787 continue; 788 789 if (intel_gmbus_is_port_valid(child->i2c_pin)) 790 *i2c_pin = child->i2c_pin; 791 792 /* However, we cannot trust the BIOS writers to populate 793 * the VBT correctly. Since LVDS requires additional 794 * information from AIM blocks, a non-zero addin offset is 795 * a good indicator that the LVDS is actually present. 796 */ 797 if (child->addin_offset) 798 return true; 799 800 /* But even then some BIOS writers perform some black magic 801 * and instantiate the device without reference to any 802 * additional data. Trust that if the VBT was written into 803 * the OpRegion then they have validated the LVDS's existence. 804 */ 805 if (dev_priv->opregion.vbt) 806 return true; 807 } 808 809 return false; 810 } 811 812 static int intel_dual_link_lvds_callback(const struct dmi_system_id *id) 813 { 814 DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident); 815 return 1; 816 } 817 818 static const struct dmi_system_id intel_dual_link_lvds[] = { 819 { 820 .callback = intel_dual_link_lvds_callback, 821 .ident = "Apple MacBook Pro (Core i5/i7 Series)", 822 .matches = { 823 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), 824 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"), 825 }, 826 }, 827 { } /* terminating entry */ 828 }; 829 830 bool intel_is_dual_link_lvds(struct drm_device *dev) 831 { 832 struct intel_encoder *encoder; 833 struct intel_lvds_encoder *lvds_encoder; 834 835 list_for_each_entry(encoder, &dev->mode_config.encoder_list, 836 base.head) { 837 if (encoder->type == INTEL_OUTPUT_LVDS) { 838 lvds_encoder = to_lvds_encoder(&encoder->base); 839 840 return lvds_encoder->is_dual_link; 841 } 842 } 843 844 return false; 845 } 846 847 static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder) 848 { 849 struct drm_device *dev = lvds_encoder->base.base.dev; 850 unsigned int val; 851 struct drm_i915_private *dev_priv = dev->dev_private; 852 853 /* use the module option value if specified */ 854 if (i915_lvds_channel_mode > 0) 855 return i915_lvds_channel_mode == 2; 856 857 if (dmi_check_system(intel_dual_link_lvds)) 858 return true; 859 860 /* BIOS should set the proper LVDS register value at boot, but 861 * in reality, it doesn't set the value when the lid is closed; 862 * we need to check "the value to be set" in VBT when LVDS 863 * register is uninitialized. 864 */ 865 val = I915_READ(lvds_encoder->reg); 866 if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED))) 867 val = dev_priv->vbt.bios_lvds_val; 868 869 return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP; 870 } 871 872 static bool intel_lvds_supported(struct drm_device *dev) 873 { 874 /* With the introduction of the PCH we gained a dedicated 875 * LVDS presence pin, use it. */ 876 if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev)) 877 return true; 878 879 /* Otherwise LVDS was only attached to mobile products, 880 * except for the inglorious 830gm */ 881 if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev)) 882 return true; 883 884 return false; 885 } 886 887 /** 888 * intel_lvds_init - setup LVDS connectors on this device 889 * @dev: drm device 890 * 891 * Create the connector, register the LVDS DDC bus, and try to figure out what 892 * modes we can display on the LVDS panel (if present). 893 */ 894 void intel_lvds_init(struct drm_device *dev) 895 { 896 struct drm_i915_private *dev_priv = dev->dev_private; 897 struct intel_lvds_encoder *lvds_encoder; 898 struct intel_encoder *intel_encoder; 899 struct intel_lvds_connector *lvds_connector; 900 struct intel_connector *intel_connector; 901 struct drm_connector *connector; 902 struct drm_encoder *encoder; 903 struct drm_display_mode *scan; /* *modes, *bios_mode; */ 904 struct drm_display_mode *fixed_mode = NULL; 905 struct edid *edid; 906 struct drm_crtc *crtc; 907 u32 lvds; 908 int pipe; 909 u8 pin; 910 911 if (!intel_lvds_supported(dev)) 912 return; 913 914 /* Skip init on machines we know falsely report LVDS */ 915 if (dmi_check_system(intel_no_lvds)) 916 return; 917 918 pin = GMBUS_PORT_PANEL; 919 if (!lvds_is_present_in_vbt(dev, &pin)) { 920 DRM_DEBUG_KMS("LVDS is not present in VBT\n"); 921 return; 922 } 923 924 if (HAS_PCH_SPLIT(dev)) { 925 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0) 926 return; 927 if (dev_priv->vbt.edp_support) { 928 DRM_DEBUG_KMS("disable LVDS for eDP support\n"); 929 return; 930 } 931 } 932 933 lvds_encoder = kzalloc(sizeof(*lvds_encoder), GFP_KERNEL); 934 if (!lvds_encoder) 935 return; 936 937 lvds_connector = kzalloc(sizeof(*lvds_connector), GFP_KERNEL); 938 if (!lvds_connector) { 939 kfree(lvds_encoder); 940 return; 941 } 942 943 lvds_encoder->attached_connector = lvds_connector; 944 945 intel_encoder = &lvds_encoder->base; 946 encoder = &intel_encoder->base; 947 intel_connector = &lvds_connector->base; 948 connector = &intel_connector->base; 949 drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs, 950 DRM_MODE_CONNECTOR_LVDS); 951 952 drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs, 953 DRM_MODE_ENCODER_LVDS); 954 955 intel_encoder->enable = intel_enable_lvds; 956 intel_encoder->pre_enable = intel_pre_enable_lvds; 957 intel_encoder->compute_config = intel_lvds_compute_config; 958 intel_encoder->mode_set = intel_lvds_mode_set; 959 intel_encoder->disable = intel_disable_lvds; 960 intel_encoder->get_hw_state = intel_lvds_get_hw_state; 961 intel_encoder->get_config = intel_lvds_get_config; 962 intel_connector->get_hw_state = intel_connector_get_hw_state; 963 964 intel_connector_attach_encoder(intel_connector, intel_encoder); 965 intel_encoder->type = INTEL_OUTPUT_LVDS; 966 967 intel_encoder->cloneable = false; 968 if (HAS_PCH_SPLIT(dev)) 969 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); 970 else if (IS_GEN4(dev)) 971 intel_encoder->crtc_mask = (1 << 0) | (1 << 1); 972 else 973 intel_encoder->crtc_mask = (1 << 1); 974 975 drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs); 976 connector->display_info.subpixel_order = SubPixelHorizontalRGB; 977 connector->interlace_allowed = false; 978 connector->doublescan_allowed = false; 979 980 if (HAS_PCH_SPLIT(dev)) { 981 lvds_encoder->reg = PCH_LVDS; 982 } else { 983 lvds_encoder->reg = LVDS; 984 } 985 986 /* create the scaling mode property */ 987 drm_mode_create_scaling_mode_property(dev); 988 drm_object_attach_property(&connector->base, 989 dev->mode_config.scaling_mode_property, 990 DRM_MODE_SCALE_ASPECT); 991 intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT; 992 /* 993 * LVDS discovery: 994 * 1) check for EDID on DDC 995 * 2) check for VBT data 996 * 3) check to see if LVDS is already on 997 * if none of the above, no panel 998 * 4) make sure lid is open 999 * if closed, act like it's not there for now 1000 */ 1001 1002 /* 1003 * Attempt to get the fixed panel mode from DDC. Assume that the 1004 * preferred mode is the right one. 1005 */ 1006 edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin)); 1007 if (edid) { 1008 if (drm_add_edid_modes(connector, edid)) { 1009 drm_mode_connector_update_edid_property(connector, 1010 edid); 1011 } else { 1012 kfree(edid); 1013 edid = ERR_PTR(-EINVAL); 1014 } 1015 } else { 1016 edid = ERR_PTR(-ENOENT); 1017 } 1018 lvds_connector->base.edid = edid; 1019 1020 if (IS_ERR_OR_NULL(edid)) { 1021 /* Didn't get an EDID, so 1022 * Set wide sync ranges so we get all modes 1023 * handed to valid_mode for checking 1024 */ 1025 connector->display_info.min_vfreq = 0; 1026 connector->display_info.max_vfreq = 200; 1027 connector->display_info.min_hfreq = 0; 1028 connector->display_info.max_hfreq = 200; 1029 } 1030 1031 list_for_each_entry(scan, &connector->probed_modes, head) { 1032 if (scan->type & DRM_MODE_TYPE_PREFERRED) { 1033 DRM_DEBUG_KMS("using preferred mode from EDID: "); 1034 drm_mode_debug_printmodeline(scan); 1035 1036 fixed_mode = drm_mode_duplicate(dev, scan); 1037 if (fixed_mode) { 1038 intel_connector->panel.downclock_mode = 1039 intel_find_panel_downclock(dev, 1040 fixed_mode, connector); 1041 if (intel_connector->panel.downclock_mode != 1042 NULL && i915_lvds_downclock) { 1043 /* We found the downclock for LVDS. */ 1044 dev_priv->lvds_downclock_avail = true; 1045 dev_priv->lvds_downclock = 1046 intel_connector->panel. 1047 downclock_mode->clock; 1048 DRM_DEBUG_KMS("LVDS downclock is found" 1049 " in EDID. Normal clock %dKhz, " 1050 "downclock %dKhz\n", 1051 fixed_mode->clock, 1052 dev_priv->lvds_downclock); 1053 } 1054 goto out; 1055 } 1056 } 1057 } 1058 1059 /* Failed to get EDID, what about VBT? */ 1060 if (dev_priv->vbt.lfp_lvds_vbt_mode) { 1061 DRM_DEBUG_KMS("using mode from VBT: "); 1062 drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode); 1063 1064 fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode); 1065 if (fixed_mode) { 1066 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED; 1067 goto out; 1068 } 1069 } 1070 1071 /* 1072 * If we didn't get EDID, try checking if the panel is already turned 1073 * on. If so, assume that whatever is currently programmed is the 1074 * correct mode. 1075 */ 1076 1077 /* Ironlake: FIXME if still fail, not try pipe mode now */ 1078 if (HAS_PCH_SPLIT(dev)) 1079 goto failed; 1080 1081 lvds = I915_READ(LVDS); 1082 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0; 1083 crtc = intel_get_crtc_for_pipe(dev, pipe); 1084 1085 if (crtc && (lvds & LVDS_PORT_EN)) { 1086 fixed_mode = intel_crtc_mode_get(dev, crtc); 1087 if (fixed_mode) { 1088 DRM_DEBUG_KMS("using current (BIOS) mode: "); 1089 drm_mode_debug_printmodeline(fixed_mode); 1090 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED; 1091 goto out; 1092 } 1093 } 1094 1095 /* If we still don't have a mode after all that, give up. */ 1096 if (!fixed_mode) 1097 goto failed; 1098 1099 out: 1100 lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder); 1101 DRM_DEBUG_KMS("detected %s-link lvds configuration\n", 1102 lvds_encoder->is_dual_link ? "dual" : "single"); 1103 1104 /* 1105 * Unlock registers and just 1106 * leave them unlocked 1107 */ 1108 if (HAS_PCH_SPLIT(dev)) { 1109 I915_WRITE(PCH_PP_CONTROL, 1110 I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS); 1111 } else { 1112 I915_WRITE(PP_CONTROL, 1113 I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS); 1114 } 1115 #if 0 1116 lvds_connector->lid_notifier.notifier_call = intel_lid_notify; 1117 if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) { 1118 DRM_DEBUG_KMS("lid notifier registration failed\n"); 1119 lvds_connector->lid_notifier.notifier_call = NULL; 1120 } 1121 drm_sysfs_connector_add(connector); 1122 #endif 1123 1124 intel_panel_init(&intel_connector->panel, fixed_mode); 1125 intel_panel_setup_backlight(connector); 1126 1127 return; 1128 1129 failed: 1130 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n"); 1131 drm_connector_cleanup(connector); 1132 drm_encoder_cleanup(encoder); 1133 if (fixed_mode) 1134 drm_mode_destroy(dev, fixed_mode); 1135 kfree(lvds_encoder); 1136 kfree(lvds_connector); 1137 return; 1138 } 1139