1 /* 2 * Copyright © 2006-2007 Intel Corporation 3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: 25 * Eric Anholt <eric@anholt.net> 26 * Dave Airlie <airlied@linux.ie> 27 * Jesse Barnes <jesse.barnes@intel.com> 28 */ 29 30 #include <drm/drmP.h> 31 #include <drm/drm_crtc.h> 32 #include <drm/drm_edid.h> 33 #include "intel_drv.h" 34 #include <drm/i915_drm.h> 35 #include "i915_drv.h" 36 #include <linux/err.h> 37 38 /* Private structure for the integrated LVDS support */ 39 struct intel_lvds_connector { 40 struct intel_connector base; 41 42 #if 0 43 struct notifier_block lid_notifier; 44 #endif 45 }; 46 47 struct intel_lvds_encoder { 48 struct intel_encoder base; 49 50 u32 pfit_control; 51 u32 pfit_pgm_ratios; 52 bool pfit_dirty; 53 54 struct intel_lvds_connector *attached_connector; 55 }; 56 57 static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder) 58 { 59 return container_of(encoder, struct intel_lvds_encoder, base.base); 60 } 61 62 static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector) 63 { 64 return container_of(connector, struct intel_lvds_connector, base.base); 65 } 66 67 static bool intel_lvds_get_hw_state(struct intel_encoder *encoder, 68 enum i915_pipe *pipe) 69 { 70 struct drm_device *dev = encoder->base.dev; 71 struct drm_i915_private *dev_priv = dev->dev_private; 72 u32 lvds_reg, tmp; 73 74 if (HAS_PCH_SPLIT(dev)) { 75 lvds_reg = PCH_LVDS; 76 } else { 77 lvds_reg = LVDS; 78 } 79 80 tmp = I915_READ(lvds_reg); 81 82 if (!(tmp & LVDS_PORT_EN)) 83 return false; 84 85 if (HAS_PCH_CPT(dev)) 86 *pipe = PORT_TO_PIPE_CPT(tmp); 87 else 88 *pipe = PORT_TO_PIPE(tmp); 89 90 return true; 91 } 92 93 /** 94 * Sets the power state for the panel. 95 */ 96 static void intel_enable_lvds(struct intel_encoder *encoder) 97 { 98 struct drm_device *dev = encoder->base.dev; 99 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base); 100 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); 101 struct drm_i915_private *dev_priv = dev->dev_private; 102 u32 ctl_reg, lvds_reg, stat_reg; 103 104 if (HAS_PCH_SPLIT(dev)) { 105 ctl_reg = PCH_PP_CONTROL; 106 lvds_reg = PCH_LVDS; 107 stat_reg = PCH_PP_STATUS; 108 } else { 109 ctl_reg = PP_CONTROL; 110 lvds_reg = LVDS; 111 stat_reg = PP_STATUS; 112 } 113 114 I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN); 115 116 if (lvds_encoder->pfit_dirty) { 117 /* 118 * Enable automatic panel scaling so that non-native modes 119 * fill the screen. The panel fitter should only be 120 * adjusted whilst the pipe is disabled, according to 121 * register description and PRM. 122 */ 123 DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n", 124 lvds_encoder->pfit_control, 125 lvds_encoder->pfit_pgm_ratios); 126 127 I915_WRITE(PFIT_PGM_RATIOS, lvds_encoder->pfit_pgm_ratios); 128 I915_WRITE(PFIT_CONTROL, lvds_encoder->pfit_control); 129 lvds_encoder->pfit_dirty = false; 130 } 131 132 I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON); 133 POSTING_READ(lvds_reg); 134 if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000)) 135 DRM_ERROR("timed out waiting for panel to power on\n"); 136 137 intel_panel_enable_backlight(dev, intel_crtc->pipe); 138 } 139 140 static void intel_disable_lvds(struct intel_encoder *encoder) 141 { 142 struct drm_device *dev = encoder->base.dev; 143 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base); 144 struct drm_i915_private *dev_priv = dev->dev_private; 145 u32 ctl_reg, lvds_reg, stat_reg; 146 147 if (HAS_PCH_SPLIT(dev)) { 148 ctl_reg = PCH_PP_CONTROL; 149 lvds_reg = PCH_LVDS; 150 stat_reg = PCH_PP_STATUS; 151 } else { 152 ctl_reg = PP_CONTROL; 153 lvds_reg = LVDS; 154 stat_reg = PP_STATUS; 155 } 156 157 intel_panel_disable_backlight(dev); 158 159 I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON); 160 if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000)) 161 DRM_ERROR("timed out waiting for panel to power off\n"); 162 163 if (lvds_encoder->pfit_control) { 164 I915_WRITE(PFIT_CONTROL, 0); 165 lvds_encoder->pfit_dirty = true; 166 } 167 168 I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN); 169 POSTING_READ(lvds_reg); 170 } 171 172 static int intel_lvds_mode_valid(struct drm_connector *connector, 173 struct drm_display_mode *mode) 174 { 175 struct intel_connector *intel_connector = to_intel_connector(connector); 176 struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode; 177 178 if (mode->hdisplay > fixed_mode->hdisplay) 179 return MODE_PANEL; 180 if (mode->vdisplay > fixed_mode->vdisplay) 181 return MODE_PANEL; 182 183 return MODE_OK; 184 } 185 186 static void 187 centre_horizontally(struct drm_display_mode *mode, 188 int width) 189 { 190 u32 border, sync_pos, blank_width, sync_width; 191 192 /* keep the hsync and hblank widths constant */ 193 sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start; 194 blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start; 195 sync_pos = (blank_width - sync_width + 1) / 2; 196 197 border = (mode->hdisplay - width + 1) / 2; 198 border += border & 1; /* make the border even */ 199 200 mode->crtc_hdisplay = width; 201 mode->crtc_hblank_start = width + border; 202 mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width; 203 204 mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos; 205 mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width; 206 207 mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET; 208 } 209 210 static void 211 centre_vertically(struct drm_display_mode *mode, 212 int height) 213 { 214 u32 border, sync_pos, blank_width, sync_width; 215 216 /* keep the vsync and vblank widths constant */ 217 sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start; 218 blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start; 219 sync_pos = (blank_width - sync_width + 1) / 2; 220 221 border = (mode->vdisplay - height + 1) / 2; 222 223 mode->crtc_vdisplay = height; 224 mode->crtc_vblank_start = height + border; 225 mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width; 226 227 mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos; 228 mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width; 229 230 mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET; 231 } 232 233 static inline u32 panel_fitter_scaling(u32 source, u32 target) 234 { 235 /* 236 * Floating point operation is not supported. So the FACTOR 237 * is defined, which can avoid the floating point computation 238 * when calculating the panel ratio. 239 */ 240 #define ACCURACY 12 241 #define FACTOR (1 << ACCURACY) 242 u32 ratio = source * FACTOR / target; 243 return (FACTOR * ratio + FACTOR/2) / FACTOR; 244 } 245 246 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder, 247 const struct drm_display_mode *mode, 248 struct drm_display_mode *adjusted_mode) 249 { 250 struct drm_device *dev = encoder->dev; 251 struct drm_i915_private *dev_priv = dev->dev_private; 252 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(encoder); 253 struct intel_connector *intel_connector = 254 &lvds_encoder->attached_connector->base; 255 struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc; 256 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0; 257 int pipe; 258 259 /* Should never happen!! */ 260 if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) { 261 DRM_ERROR("Can't support LVDS on pipe A\n"); 262 return false; 263 } 264 265 if (intel_encoder_check_is_cloned(&lvds_encoder->base)) 266 return false; 267 268 /* 269 * We have timings from the BIOS for the panel, put them in 270 * to the adjusted mode. The CRTC will be set up for this mode, 271 * with the panel scaling set up to source from the H/VDisplay 272 * of the original mode. 273 */ 274 intel_fixed_panel_mode(intel_connector->panel.fixed_mode, 275 adjusted_mode); 276 277 if (HAS_PCH_SPLIT(dev)) { 278 intel_pch_panel_fitting(dev, 279 intel_connector->panel.fitting_mode, 280 mode, adjusted_mode); 281 return true; 282 } 283 284 /* Native modes don't need fitting */ 285 if (adjusted_mode->hdisplay == mode->hdisplay && 286 adjusted_mode->vdisplay == mode->vdisplay) 287 goto out; 288 289 /* 965+ wants fuzzy fitting */ 290 if (INTEL_INFO(dev)->gen >= 4) 291 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) | 292 PFIT_FILTER_FUZZY); 293 294 /* 295 * Enable automatic panel scaling for non-native modes so that they fill 296 * the screen. Should be enabled before the pipe is enabled, according 297 * to register description and PRM. 298 * Change the value here to see the borders for debugging 299 */ 300 for_each_pipe(pipe) 301 I915_WRITE(BCLRPAT(pipe), 0); 302 303 drm_mode_set_crtcinfo(adjusted_mode, 0); 304 305 switch (intel_connector->panel.fitting_mode) { 306 case DRM_MODE_SCALE_CENTER: 307 /* 308 * For centered modes, we have to calculate border widths & 309 * heights and modify the values programmed into the CRTC. 310 */ 311 centre_horizontally(adjusted_mode, mode->hdisplay); 312 centre_vertically(adjusted_mode, mode->vdisplay); 313 border = LVDS_BORDER_ENABLE; 314 break; 315 316 case DRM_MODE_SCALE_ASPECT: 317 /* Scale but preserve the aspect ratio */ 318 if (INTEL_INFO(dev)->gen >= 4) { 319 u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay; 320 u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay; 321 322 /* 965+ is easy, it does everything in hw */ 323 if (scaled_width > scaled_height) 324 pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR; 325 else if (scaled_width < scaled_height) 326 pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER; 327 else if (adjusted_mode->hdisplay != mode->hdisplay) 328 pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO; 329 } else { 330 u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay; 331 u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay; 332 /* 333 * For earlier chips we have to calculate the scaling 334 * ratio by hand and program it into the 335 * PFIT_PGM_RATIO register 336 */ 337 if (scaled_width > scaled_height) { /* pillar */ 338 centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay); 339 340 border = LVDS_BORDER_ENABLE; 341 if (mode->vdisplay != adjusted_mode->vdisplay) { 342 u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay); 343 pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | 344 bits << PFIT_VERT_SCALE_SHIFT); 345 pfit_control |= (PFIT_ENABLE | 346 VERT_INTERP_BILINEAR | 347 HORIZ_INTERP_BILINEAR); 348 } 349 } else if (scaled_width < scaled_height) { /* letter */ 350 centre_vertically(adjusted_mode, scaled_width / mode->hdisplay); 351 352 border = LVDS_BORDER_ENABLE; 353 if (mode->hdisplay != adjusted_mode->hdisplay) { 354 u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay); 355 pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | 356 bits << PFIT_VERT_SCALE_SHIFT); 357 pfit_control |= (PFIT_ENABLE | 358 VERT_INTERP_BILINEAR | 359 HORIZ_INTERP_BILINEAR); 360 } 361 } else 362 /* Aspects match, Let hw scale both directions */ 363 pfit_control |= (PFIT_ENABLE | 364 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE | 365 VERT_INTERP_BILINEAR | 366 HORIZ_INTERP_BILINEAR); 367 } 368 break; 369 370 case DRM_MODE_SCALE_FULLSCREEN: 371 /* 372 * Full scaling, even if it changes the aspect ratio. 373 * Fortunately this is all done for us in hw. 374 */ 375 if (mode->vdisplay != adjusted_mode->vdisplay || 376 mode->hdisplay != adjusted_mode->hdisplay) { 377 pfit_control |= PFIT_ENABLE; 378 if (INTEL_INFO(dev)->gen >= 4) 379 pfit_control |= PFIT_SCALING_AUTO; 380 else 381 pfit_control |= (VERT_AUTO_SCALE | 382 VERT_INTERP_BILINEAR | 383 HORIZ_AUTO_SCALE | 384 HORIZ_INTERP_BILINEAR); 385 } 386 break; 387 388 default: 389 break; 390 } 391 392 out: 393 /* If not enabling scaling, be consistent and always use 0. */ 394 if ((pfit_control & PFIT_ENABLE) == 0) { 395 pfit_control = 0; 396 pfit_pgm_ratios = 0; 397 } 398 399 /* Make sure pre-965 set dither correctly */ 400 if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither) 401 pfit_control |= PANEL_8TO6_DITHER_ENABLE; 402 403 if (pfit_control != lvds_encoder->pfit_control || 404 pfit_pgm_ratios != lvds_encoder->pfit_pgm_ratios) { 405 lvds_encoder->pfit_control = pfit_control; 406 lvds_encoder->pfit_pgm_ratios = pfit_pgm_ratios; 407 lvds_encoder->pfit_dirty = true; 408 } 409 dev_priv->lvds_border_bits = border; 410 411 /* 412 * XXX: It would be nice to support lower refresh rates on the 413 * panels to reduce power consumption, and perhaps match the 414 * user's requested refresh rate. 415 */ 416 417 return true; 418 } 419 420 static void intel_lvds_mode_set(struct drm_encoder *encoder, 421 struct drm_display_mode *mode, 422 struct drm_display_mode *adjusted_mode) 423 { 424 /* 425 * The LVDS pin pair will already have been turned on in the 426 * intel_crtc_mode_set since it has a large impact on the DPLL 427 * settings. 428 */ 429 } 430 431 /** 432 * Detect the LVDS connection. 433 * 434 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means 435 * connected and closed means disconnected. We also send hotplug events as 436 * needed, using lid status notification from the input layer. 437 */ 438 static enum drm_connector_status 439 intel_lvds_detect(struct drm_connector *connector, bool force) 440 { 441 struct drm_device *dev = connector->dev; 442 enum drm_connector_status status; 443 444 status = intel_panel_detect(dev); 445 if (status != connector_status_unknown) 446 return status; 447 448 return connector_status_connected; 449 } 450 451 /** 452 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise. 453 */ 454 static int intel_lvds_get_modes(struct drm_connector *connector) 455 { 456 struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector); 457 struct drm_device *dev = connector->dev; 458 struct drm_display_mode *mode; 459 460 /* use cached edid if we have one */ 461 if (!IS_ERR_OR_NULL(lvds_connector->base.edid)) 462 return drm_add_edid_modes(connector, lvds_connector->base.edid); 463 464 mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode); 465 if (mode == NULL) 466 return 0; 467 468 drm_mode_probed_add(connector, mode); 469 return 1; 470 } 471 472 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id) 473 { 474 DRM_INFO("Skipping forced modeset for %s\n", id->ident); 475 return 1; 476 } 477 478 /* The GPU hangs up on these systems if modeset is performed on LID open */ 479 static const struct dmi_system_id intel_no_modeset_on_lid[] = { 480 { 481 .callback = intel_no_modeset_on_lid_dmi_callback, 482 .ident = "Toshiba Tecra A11", 483 .matches = { 484 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), 485 DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"), 486 }, 487 }, 488 489 { } /* terminating entry */ 490 }; 491 492 #if 0 493 /* 494 * Lid events. Note the use of 'modeset_on_lid': 495 * - we set it on lid close, and reset it on open 496 * - we use it as a "only once" bit (ie we ignore 497 * duplicate events where it was already properly 498 * set/reset) 499 * - the suspend/resume paths will also set it to 500 * zero, since they restore the mode ("lid open"). 501 */ 502 static int intel_lid_notify(struct notifier_block *nb, unsigned long val, 503 void *unused) 504 { 505 struct intel_lvds_connector *lvds_connector = 506 container_of(nb, struct intel_lvds_connector, lid_notifier); 507 struct drm_connector *connector = &lvds_connector->base.base; 508 struct drm_device *dev = connector->dev; 509 struct drm_i915_private *dev_priv = dev->dev_private; 510 511 if (dev->switch_power_state != DRM_SWITCH_POWER_ON) 512 return NOTIFY_OK; 513 514 /* 515 * check and update the status of LVDS connector after receiving 516 * the LID nofication event. 517 */ 518 connector->status = connector->funcs->detect(connector, false); 519 520 /* Don't force modeset on machines where it causes a GPU lockup */ 521 if (dmi_check_system(intel_no_modeset_on_lid)) 522 return NOTIFY_OK; 523 if (!acpi_lid_open()) { 524 dev_priv->modeset_on_lid = 1; 525 return NOTIFY_OK; 526 } 527 528 if (!dev_priv->modeset_on_lid) 529 return NOTIFY_OK; 530 531 dev_priv->modeset_on_lid = 0; 532 533 mutex_lock(&dev->mode_config.mutex); 534 intel_modeset_setup_hw_state(dev, true); 535 mutex_unlock(&dev->mode_config.mutex); 536 537 return NOTIFY_OK; 538 } 539 #endif 540 541 /** 542 * intel_lvds_destroy - unregister and free LVDS structures 543 * @connector: connector to free 544 * 545 * Unregister the DDC bus for this connector then free the driver private 546 * structure. 547 */ 548 static void intel_lvds_destroy(struct drm_connector *connector) 549 { 550 struct intel_lvds_connector *lvds_connector = 551 to_lvds_connector(connector); 552 553 #if 0 554 if (lvds_connector->lid_notifier.notifier_call) 555 acpi_lid_notifier_unregister(&lvds_connector->lid_notifier); 556 #endif 557 558 if (!IS_ERR_OR_NULL(lvds_connector->base.edid)) 559 kfree(lvds_connector->base.edid, M_DRM); 560 561 intel_panel_fini(&lvds_connector->base.panel); 562 563 #if 0 564 drm_sysfs_connector_remove(connector); 565 #endif 566 drm_connector_cleanup(connector); 567 kfree(connector, M_DRM); 568 } 569 570 static int intel_lvds_set_property(struct drm_connector *connector, 571 struct drm_property *property, 572 uint64_t value) 573 { 574 struct intel_connector *intel_connector = to_intel_connector(connector); 575 struct drm_device *dev = connector->dev; 576 577 if (property == dev->mode_config.scaling_mode_property) { 578 struct drm_crtc *crtc; 579 580 if (value == DRM_MODE_SCALE_NONE) { 581 DRM_DEBUG_KMS("no scaling not supported\n"); 582 return -EINVAL; 583 } 584 585 if (intel_connector->panel.fitting_mode == value) { 586 /* the LVDS scaling property is not changed */ 587 return 0; 588 } 589 intel_connector->panel.fitting_mode = value; 590 591 crtc = intel_attached_encoder(connector)->base.crtc; 592 if (crtc && crtc->enabled) { 593 /* 594 * If the CRTC is enabled, the display will be changed 595 * according to the new panel fitting mode. 596 */ 597 intel_set_mode(crtc, &crtc->mode, 598 crtc->x, crtc->y, crtc->fb); 599 } 600 } 601 602 return 0; 603 } 604 605 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = { 606 .mode_fixup = intel_lvds_mode_fixup, 607 .mode_set = intel_lvds_mode_set, 608 .disable = intel_encoder_noop, 609 }; 610 611 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = { 612 .get_modes = intel_lvds_get_modes, 613 .mode_valid = intel_lvds_mode_valid, 614 .best_encoder = intel_best_encoder, 615 }; 616 617 static const struct drm_connector_funcs intel_lvds_connector_funcs = { 618 .dpms = intel_connector_dpms, 619 .detect = intel_lvds_detect, 620 .fill_modes = drm_helper_probe_single_connector_modes, 621 .set_property = intel_lvds_set_property, 622 .destroy = intel_lvds_destroy, 623 }; 624 625 static const struct drm_encoder_funcs intel_lvds_enc_funcs = { 626 .destroy = intel_encoder_destroy, 627 }; 628 629 static int intel_no_lvds_dmi_callback(const struct dmi_system_id *id) 630 { 631 DRM_INFO("Skipping LVDS initialization for %s\n", id->ident); 632 return 1; 633 } 634 635 /* These systems claim to have LVDS, but really don't */ 636 static const struct dmi_system_id intel_no_lvds[] = { 637 { 638 .callback = intel_no_lvds_dmi_callback, 639 .ident = "Apple Mac Mini (Core series)", 640 .matches = { 641 DMI_MATCH(DMI_SYS_VENDOR, "Apple"), 642 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"), 643 }, 644 }, 645 { 646 .callback = intel_no_lvds_dmi_callback, 647 .ident = "Apple Mac Mini (Core 2 series)", 648 .matches = { 649 DMI_MATCH(DMI_SYS_VENDOR, "Apple"), 650 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"), 651 }, 652 }, 653 { 654 .callback = intel_no_lvds_dmi_callback, 655 .ident = "MSI IM-945GSE-A", 656 .matches = { 657 DMI_MATCH(DMI_SYS_VENDOR, "MSI"), 658 DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"), 659 }, 660 }, 661 { 662 .callback = intel_no_lvds_dmi_callback, 663 .ident = "Dell Studio Hybrid", 664 .matches = { 665 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 666 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"), 667 }, 668 }, 669 { 670 .callback = intel_no_lvds_dmi_callback, 671 .ident = "Dell OptiPlex FX170", 672 .matches = { 673 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 674 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"), 675 }, 676 }, 677 { 678 .callback = intel_no_lvds_dmi_callback, 679 .ident = "AOpen Mini PC", 680 .matches = { 681 DMI_MATCH(DMI_SYS_VENDOR, "AOpen"), 682 DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"), 683 }, 684 }, 685 { 686 .callback = intel_no_lvds_dmi_callback, 687 .ident = "AOpen Mini PC MP915", 688 .matches = { 689 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"), 690 DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"), 691 }, 692 }, 693 { 694 .callback = intel_no_lvds_dmi_callback, 695 .ident = "AOpen i915GMm-HFS", 696 .matches = { 697 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"), 698 DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"), 699 }, 700 }, 701 { 702 .callback = intel_no_lvds_dmi_callback, 703 .ident = "AOpen i45GMx-I", 704 .matches = { 705 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"), 706 DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"), 707 }, 708 }, 709 { 710 .callback = intel_no_lvds_dmi_callback, 711 .ident = "Aopen i945GTt-VFA", 712 .matches = { 713 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"), 714 }, 715 }, 716 { 717 .callback = intel_no_lvds_dmi_callback, 718 .ident = "Clientron U800", 719 .matches = { 720 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"), 721 DMI_MATCH(DMI_PRODUCT_NAME, "U800"), 722 }, 723 }, 724 { 725 .callback = intel_no_lvds_dmi_callback, 726 .ident = "Clientron E830", 727 .matches = { 728 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"), 729 DMI_MATCH(DMI_PRODUCT_NAME, "E830"), 730 }, 731 }, 732 { 733 .callback = intel_no_lvds_dmi_callback, 734 .ident = "Asus EeeBox PC EB1007", 735 .matches = { 736 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."), 737 DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"), 738 }, 739 }, 740 { 741 .callback = intel_no_lvds_dmi_callback, 742 .ident = "Asus AT5NM10T-I", 743 .matches = { 744 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), 745 DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"), 746 }, 747 }, 748 { 749 .callback = intel_no_lvds_dmi_callback, 750 .ident = "Hewlett-Packard HP t5740e Thin Client", 751 .matches = { 752 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), 753 DMI_MATCH(DMI_PRODUCT_NAME, "HP t5740e Thin Client"), 754 }, 755 }, 756 { 757 .callback = intel_no_lvds_dmi_callback, 758 .ident = "Hewlett-Packard t5745", 759 .matches = { 760 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), 761 DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"), 762 }, 763 }, 764 { 765 .callback = intel_no_lvds_dmi_callback, 766 .ident = "Hewlett-Packard st5747", 767 .matches = { 768 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), 769 DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"), 770 }, 771 }, 772 { 773 .callback = intel_no_lvds_dmi_callback, 774 .ident = "MSI Wind Box DC500", 775 .matches = { 776 DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"), 777 DMI_MATCH(DMI_BOARD_NAME, "MS-7469"), 778 }, 779 }, 780 { 781 .callback = intel_no_lvds_dmi_callback, 782 .ident = "Gigabyte GA-D525TUD", 783 .matches = { 784 DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."), 785 DMI_MATCH(DMI_BOARD_NAME, "D525TUD"), 786 }, 787 }, 788 { 789 .callback = intel_no_lvds_dmi_callback, 790 .ident = "Supermicro X7SPA-H", 791 .matches = { 792 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"), 793 DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"), 794 }, 795 }, 796 { 797 .callback = intel_no_lvds_dmi_callback, 798 .ident = "Fujitsu Esprimo Q900", 799 .matches = { 800 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"), 801 DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"), 802 }, 803 }, 804 805 { } /* terminating entry */ 806 }; 807 808 /** 809 * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID 810 * @dev: drm device 811 * @connector: LVDS connector 812 * 813 * Find the reduced downclock for LVDS in EDID. 814 */ 815 static void intel_find_lvds_downclock(struct drm_device *dev, 816 struct drm_display_mode *fixed_mode, 817 struct drm_connector *connector) 818 { 819 struct drm_i915_private *dev_priv = dev->dev_private; 820 struct drm_display_mode *scan; 821 int temp_downclock; 822 823 temp_downclock = fixed_mode->clock; 824 list_for_each_entry(scan, &connector->probed_modes, head) { 825 /* 826 * If one mode has the same resolution with the fixed_panel 827 * mode while they have the different refresh rate, it means 828 * that the reduced downclock is found for the LVDS. In such 829 * case we can set the different FPx0/1 to dynamically select 830 * between low and high frequency. 831 */ 832 if (scan->hdisplay == fixed_mode->hdisplay && 833 scan->hsync_start == fixed_mode->hsync_start && 834 scan->hsync_end == fixed_mode->hsync_end && 835 scan->htotal == fixed_mode->htotal && 836 scan->vdisplay == fixed_mode->vdisplay && 837 scan->vsync_start == fixed_mode->vsync_start && 838 scan->vsync_end == fixed_mode->vsync_end && 839 scan->vtotal == fixed_mode->vtotal) { 840 if (scan->clock < temp_downclock) { 841 /* 842 * The downclock is already found. But we 843 * expect to find the lower downclock. 844 */ 845 temp_downclock = scan->clock; 846 } 847 } 848 } 849 if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) { 850 /* We found the downclock for LVDS. */ 851 dev_priv->lvds_downclock_avail = 1; 852 dev_priv->lvds_downclock = temp_downclock; 853 DRM_DEBUG_KMS("LVDS downclock is found in EDID. " 854 "Normal clock %dKhz, downclock %dKhz\n", 855 fixed_mode->clock, temp_downclock); 856 } 857 } 858 859 /* 860 * Enumerate the child dev array parsed from VBT to check whether 861 * the LVDS is present. 862 * If it is present, return 1. 863 * If it is not present, return false. 864 * If no child dev is parsed from VBT, it assumes that the LVDS is present. 865 */ 866 static bool lvds_is_present_in_vbt(struct drm_device *dev, 867 u8 *i2c_pin) 868 { 869 struct drm_i915_private *dev_priv = dev->dev_private; 870 int i; 871 872 if (!dev_priv->child_dev_num) 873 return true; 874 875 for (i = 0; i < dev_priv->child_dev_num; i++) { 876 struct child_device_config *child = dev_priv->child_dev + i; 877 878 /* If the device type is not LFP, continue. 879 * We have to check both the new identifiers as well as the 880 * old for compatibility with some BIOSes. 881 */ 882 if (child->device_type != DEVICE_TYPE_INT_LFP && 883 child->device_type != DEVICE_TYPE_LFP) 884 continue; 885 886 if (intel_gmbus_is_port_valid(child->i2c_pin)) 887 *i2c_pin = child->i2c_pin; 888 889 /* However, we cannot trust the BIOS writers to populate 890 * the VBT correctly. Since LVDS requires additional 891 * information from AIM blocks, a non-zero addin offset is 892 * a good indicator that the LVDS is actually present. 893 */ 894 if (child->addin_offset) 895 return true; 896 897 /* But even then some BIOS writers perform some black magic 898 * and instantiate the device without reference to any 899 * additional data. Trust that if the VBT was written into 900 * the OpRegion then they have validated the LVDS's existence. 901 */ 902 if (dev_priv->opregion.vbt) 903 return true; 904 } 905 906 return false; 907 } 908 909 static bool intel_lvds_supported(struct drm_device *dev) 910 { 911 /* With the introduction of the PCH we gained a dedicated 912 * LVDS presence pin, use it. */ 913 if (HAS_PCH_SPLIT(dev)) 914 return true; 915 916 /* Otherwise LVDS was only attached to mobile products, 917 * except for the inglorious 830gm */ 918 return IS_MOBILE(dev) && !IS_I830(dev); 919 } 920 921 /** 922 * intel_lvds_init - setup LVDS connectors on this device 923 * @dev: drm device 924 * 925 * Create the connector, register the LVDS DDC bus, and try to figure out what 926 * modes we can display on the LVDS panel (if present). 927 */ 928 bool intel_lvds_init(struct drm_device *dev) 929 { 930 struct drm_i915_private *dev_priv = dev->dev_private; 931 struct intel_lvds_encoder *lvds_encoder; 932 struct intel_encoder *intel_encoder; 933 struct intel_lvds_connector *lvds_connector; 934 struct intel_connector *intel_connector; 935 struct drm_connector *connector; 936 struct drm_encoder *encoder; 937 struct drm_display_mode *scan; /* *modes, *bios_mode; */ 938 struct drm_display_mode *fixed_mode = NULL; 939 struct edid *edid; 940 struct drm_crtc *crtc; 941 u32 lvds; 942 int pipe; 943 u8 pin; 944 945 if (!intel_lvds_supported(dev)) 946 return false; 947 948 /* Skip init on machines we know falsely report LVDS */ 949 if (dmi_check_system(intel_no_lvds)) 950 return false; 951 952 pin = GMBUS_PORT_PANEL; 953 if (!lvds_is_present_in_vbt(dev, &pin)) { 954 DRM_DEBUG_KMS("LVDS is not present in VBT\n"); 955 return false; 956 } 957 958 if (HAS_PCH_SPLIT(dev)) { 959 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0) 960 return false; 961 if (dev_priv->edp.support) { 962 DRM_DEBUG_KMS("disable LVDS for eDP support\n"); 963 return false; 964 } 965 } 966 967 lvds_encoder = kmalloc(sizeof(struct intel_lvds_encoder), M_DRM, 968 M_WAITOK | M_ZERO); 969 if (!lvds_encoder) 970 return false; 971 972 lvds_connector = kmalloc(sizeof(struct intel_lvds_connector), M_DRM, 973 M_WAITOK | M_ZERO); 974 if (!lvds_connector) { 975 kfree(lvds_encoder, M_DRM); 976 return false; 977 } 978 979 lvds_encoder->attached_connector = lvds_connector; 980 981 if (!HAS_PCH_SPLIT(dev)) { 982 lvds_encoder->pfit_control = I915_READ(PFIT_CONTROL); 983 } 984 985 intel_encoder = &lvds_encoder->base; 986 encoder = &intel_encoder->base; 987 intel_connector = &lvds_connector->base; 988 connector = &intel_connector->base; 989 drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs, 990 DRM_MODE_CONNECTOR_LVDS); 991 992 drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs, 993 DRM_MODE_ENCODER_LVDS); 994 995 intel_encoder->enable = intel_enable_lvds; 996 intel_encoder->disable = intel_disable_lvds; 997 intel_encoder->get_hw_state = intel_lvds_get_hw_state; 998 intel_connector->get_hw_state = intel_connector_get_hw_state; 999 1000 intel_connector_attach_encoder(intel_connector, intel_encoder); 1001 intel_encoder->type = INTEL_OUTPUT_LVDS; 1002 1003 intel_encoder->cloneable = false; 1004 if (HAS_PCH_SPLIT(dev)) 1005 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); 1006 else if (IS_GEN4(dev)) 1007 intel_encoder->crtc_mask = (1 << 0) | (1 << 1); 1008 else 1009 intel_encoder->crtc_mask = (1 << 1); 1010 1011 drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs); 1012 drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs); 1013 connector->display_info.subpixel_order = SubPixelHorizontalRGB; 1014 connector->interlace_allowed = false; 1015 connector->doublescan_allowed = false; 1016 1017 /* create the scaling mode property */ 1018 drm_mode_create_scaling_mode_property(dev); 1019 1020 drm_object_attach_property(&connector->base, 1021 dev->mode_config.scaling_mode_property, 1022 DRM_MODE_SCALE_ASPECT); 1023 intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT; 1024 /* 1025 * LVDS discovery: 1026 * 1) check for EDID on DDC 1027 * 2) check for VBT data 1028 * 3) check to see if LVDS is already on 1029 * if none of the above, no panel 1030 * 4) make sure lid is open 1031 * if closed, act like it's not there for now 1032 */ 1033 1034 /* 1035 * Attempt to get the fixed panel mode from DDC. Assume that the 1036 * preferred mode is the right one. 1037 */ 1038 edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin)); 1039 if (edid) { 1040 if (drm_add_edid_modes(connector, edid)) { 1041 drm_mode_connector_update_edid_property(connector, 1042 edid); 1043 } else { 1044 kfree(edid, M_DRM); 1045 edid = ERR_PTR(-EINVAL); 1046 } 1047 } else { 1048 edid = ERR_PTR(-ENOENT); 1049 } 1050 lvds_connector->base.edid = edid; 1051 1052 if (IS_ERR_OR_NULL(edid)) { 1053 /* Didn't get an EDID, so 1054 * Set wide sync ranges so we get all modes 1055 * handed to valid_mode for checking 1056 */ 1057 connector->display_info.min_vfreq = 0; 1058 connector->display_info.max_vfreq = 200; 1059 connector->display_info.min_hfreq = 0; 1060 connector->display_info.max_hfreq = 200; 1061 } 1062 1063 list_for_each_entry(scan, &connector->probed_modes, head) { 1064 if (scan->type & DRM_MODE_TYPE_PREFERRED) { 1065 DRM_DEBUG_KMS("using preferred mode from EDID: "); 1066 drm_mode_debug_printmodeline(scan); 1067 1068 fixed_mode = drm_mode_duplicate(dev, scan); 1069 if (fixed_mode) { 1070 intel_find_lvds_downclock(dev, fixed_mode, 1071 connector); 1072 goto out; 1073 } 1074 } 1075 } 1076 1077 /* Failed to get EDID, what about VBT? */ 1078 if (dev_priv->lfp_lvds_vbt_mode) { 1079 DRM_DEBUG_KMS("using mode from VBT: "); 1080 drm_mode_debug_printmodeline(dev_priv->lfp_lvds_vbt_mode); 1081 1082 fixed_mode = drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode); 1083 if (fixed_mode) { 1084 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED; 1085 goto out; 1086 } 1087 } 1088 1089 /* 1090 * If we didn't get EDID, try checking if the panel is already turned 1091 * on. If so, assume that whatever is currently programmed is the 1092 * correct mode. 1093 */ 1094 1095 /* Ironlake: FIXME if still fail, not try pipe mode now */ 1096 if (HAS_PCH_SPLIT(dev)) 1097 goto failed; 1098 1099 lvds = I915_READ(LVDS); 1100 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0; 1101 crtc = intel_get_crtc_for_pipe(dev, pipe); 1102 1103 if (crtc && (lvds & LVDS_PORT_EN)) { 1104 fixed_mode = intel_crtc_mode_get(dev, crtc); 1105 if (fixed_mode) { 1106 DRM_DEBUG_KMS("using current (BIOS) mode: "); 1107 drm_mode_debug_printmodeline(fixed_mode); 1108 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED; 1109 goto out; 1110 } 1111 } 1112 1113 /* If we still don't have a mode after all that, give up. */ 1114 if (!fixed_mode) 1115 goto failed; 1116 1117 out: 1118 /* 1119 * Unlock registers and just 1120 * leave them unlocked 1121 */ 1122 if (HAS_PCH_SPLIT(dev)) { 1123 I915_WRITE(PCH_PP_CONTROL, 1124 I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS); 1125 } else { 1126 I915_WRITE(PP_CONTROL, 1127 I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS); 1128 } 1129 #if 0 1130 lvds_connector->lid_notifier.notifier_call = intel_lid_notify; 1131 if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) { 1132 DRM_DEBUG_KMS("lid notifier registration failed\n"); 1133 lvds_connector->lid_notifier.notifier_call = NULL; 1134 } 1135 drm_sysfs_connector_add(connector); 1136 #endif 1137 1138 intel_panel_init(&intel_connector->panel, fixed_mode); 1139 intel_panel_setup_backlight(connector); 1140 1141 return true; 1142 1143 failed: 1144 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n"); 1145 drm_connector_cleanup(connector); 1146 drm_encoder_cleanup(encoder); 1147 if (fixed_mode) 1148 drm_mode_destroy(dev, fixed_mode); 1149 kfree(lvds_encoder, M_DRM); 1150 kfree(lvds_connector, M_DRM); 1151 return false; 1152 } 1153