1 /* 2 * Copyright © 2006-2010 Intel Corporation 3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: 25 * Eric Anholt <eric@anholt.net> 26 * Dave Airlie <airlied@linux.ie> 27 * Jesse Barnes <jesse.barnes@intel.com> 28 * Chris Wilson <chris@chris-wilson.co.uk> 29 */ 30 31 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 32 33 #include <linux/kernel.h> 34 #include <linux/moduleparam.h> 35 #include <linux/pwm.h> 36 #include "intel_drv.h" 37 38 #define CRC_PMIC_PWM_PERIOD_NS 21333 39 40 void 41 intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode, 42 struct drm_display_mode *adjusted_mode) 43 { 44 drm_mode_copy(adjusted_mode, fixed_mode); 45 46 drm_mode_set_crtcinfo(adjusted_mode, 0); 47 } 48 49 /** 50 * intel_find_panel_downclock - find the reduced downclock for LVDS in EDID 51 * @dev_priv: i915 device instance 52 * @fixed_mode : panel native mode 53 * @connector: LVDS/eDP connector 54 * 55 * Return downclock_avail 56 * Find the reduced downclock for LVDS/eDP in EDID. 57 */ 58 struct drm_display_mode * 59 intel_find_panel_downclock(struct drm_i915_private *dev_priv, 60 struct drm_display_mode *fixed_mode, 61 struct drm_connector *connector) 62 { 63 struct drm_display_mode *scan, *tmp_mode; 64 int temp_downclock; 65 66 temp_downclock = fixed_mode->clock; 67 tmp_mode = NULL; 68 69 list_for_each_entry(scan, &connector->probed_modes, head) { 70 /* 71 * If one mode has the same resolution with the fixed_panel 72 * mode while they have the different refresh rate, it means 73 * that the reduced downclock is found. In such 74 * case we can set the different FPx0/1 to dynamically select 75 * between low and high frequency. 76 */ 77 if (scan->hdisplay == fixed_mode->hdisplay && 78 scan->hsync_start == fixed_mode->hsync_start && 79 scan->hsync_end == fixed_mode->hsync_end && 80 scan->htotal == fixed_mode->htotal && 81 scan->vdisplay == fixed_mode->vdisplay && 82 scan->vsync_start == fixed_mode->vsync_start && 83 scan->vsync_end == fixed_mode->vsync_end && 84 scan->vtotal == fixed_mode->vtotal) { 85 if (scan->clock < temp_downclock) { 86 /* 87 * The downclock is already found. But we 88 * expect to find the lower downclock. 89 */ 90 temp_downclock = scan->clock; 91 tmp_mode = scan; 92 } 93 } 94 } 95 96 if (temp_downclock < fixed_mode->clock) 97 return drm_mode_duplicate(&dev_priv->drm, tmp_mode); 98 else 99 return NULL; 100 } 101 102 /* adjusted_mode has been preset to be the panel's fixed mode */ 103 void 104 intel_pch_panel_fitting(struct intel_crtc *intel_crtc, 105 struct intel_crtc_state *pipe_config, 106 int fitting_mode) 107 { 108 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; 109 int x = 0, y = 0, width = 0, height = 0; 110 111 /* Native modes don't need fitting */ 112 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w && 113 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h && 114 !pipe_config->ycbcr420) 115 goto done; 116 117 switch (fitting_mode) { 118 case DRM_MODE_SCALE_CENTER: 119 width = pipe_config->pipe_src_w; 120 height = pipe_config->pipe_src_h; 121 x = (adjusted_mode->crtc_hdisplay - width + 1)/2; 122 y = (adjusted_mode->crtc_vdisplay - height + 1)/2; 123 break; 124 125 case DRM_MODE_SCALE_ASPECT: 126 /* Scale but preserve the aspect ratio */ 127 { 128 u32 scaled_width = adjusted_mode->crtc_hdisplay 129 * pipe_config->pipe_src_h; 130 u32 scaled_height = pipe_config->pipe_src_w 131 * adjusted_mode->crtc_vdisplay; 132 if (scaled_width > scaled_height) { /* pillar */ 133 width = scaled_height / pipe_config->pipe_src_h; 134 if (width & 1) 135 width++; 136 x = (adjusted_mode->crtc_hdisplay - width + 1) / 2; 137 y = 0; 138 height = adjusted_mode->crtc_vdisplay; 139 } else if (scaled_width < scaled_height) { /* letter */ 140 height = scaled_width / pipe_config->pipe_src_w; 141 if (height & 1) 142 height++; 143 y = (adjusted_mode->crtc_vdisplay - height + 1) / 2; 144 x = 0; 145 width = adjusted_mode->crtc_hdisplay; 146 } else { 147 x = y = 0; 148 width = adjusted_mode->crtc_hdisplay; 149 height = adjusted_mode->crtc_vdisplay; 150 } 151 } 152 break; 153 154 case DRM_MODE_SCALE_FULLSCREEN: 155 x = y = 0; 156 width = adjusted_mode->crtc_hdisplay; 157 height = adjusted_mode->crtc_vdisplay; 158 break; 159 160 default: 161 WARN(1, "bad panel fit mode: %d\n", fitting_mode); 162 return; 163 } 164 165 done: 166 pipe_config->pch_pfit.pos = (x << 16) | y; 167 pipe_config->pch_pfit.size = (width << 16) | height; 168 pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0; 169 } 170 171 static void 172 centre_horizontally(struct drm_display_mode *adjusted_mode, 173 int width) 174 { 175 u32 border, sync_pos, blank_width, sync_width; 176 177 /* keep the hsync and hblank widths constant */ 178 sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start; 179 blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start; 180 sync_pos = (blank_width - sync_width + 1) / 2; 181 182 border = (adjusted_mode->crtc_hdisplay - width + 1) / 2; 183 border += border & 1; /* make the border even */ 184 185 adjusted_mode->crtc_hdisplay = width; 186 adjusted_mode->crtc_hblank_start = width + border; 187 adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width; 188 189 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos; 190 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width; 191 } 192 193 static void 194 centre_vertically(struct drm_display_mode *adjusted_mode, 195 int height) 196 { 197 u32 border, sync_pos, blank_width, sync_width; 198 199 /* keep the vsync and vblank widths constant */ 200 sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start; 201 blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start; 202 sync_pos = (blank_width - sync_width + 1) / 2; 203 204 border = (adjusted_mode->crtc_vdisplay - height + 1) / 2; 205 206 adjusted_mode->crtc_vdisplay = height; 207 adjusted_mode->crtc_vblank_start = height + border; 208 adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width; 209 210 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos; 211 adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width; 212 } 213 214 static inline u32 panel_fitter_scaling(u32 source, u32 target) 215 { 216 /* 217 * Floating point operation is not supported. So the FACTOR 218 * is defined, which can avoid the floating point computation 219 * when calculating the panel ratio. 220 */ 221 #define ACCURACY 12 222 #define FACTOR (1 << ACCURACY) 223 u32 ratio = source * FACTOR / target; 224 return (FACTOR * ratio + FACTOR/2) / FACTOR; 225 } 226 227 static void i965_scale_aspect(struct intel_crtc_state *pipe_config, 228 u32 *pfit_control) 229 { 230 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; 231 u32 scaled_width = adjusted_mode->crtc_hdisplay * 232 pipe_config->pipe_src_h; 233 u32 scaled_height = pipe_config->pipe_src_w * 234 adjusted_mode->crtc_vdisplay; 235 236 /* 965+ is easy, it does everything in hw */ 237 if (scaled_width > scaled_height) 238 *pfit_control |= PFIT_ENABLE | 239 PFIT_SCALING_PILLAR; 240 else if (scaled_width < scaled_height) 241 *pfit_control |= PFIT_ENABLE | 242 PFIT_SCALING_LETTER; 243 else if (adjusted_mode->crtc_hdisplay != pipe_config->pipe_src_w) 244 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO; 245 } 246 247 static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config, 248 u32 *pfit_control, u32 *pfit_pgm_ratios, 249 u32 *border) 250 { 251 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; 252 u32 scaled_width = adjusted_mode->crtc_hdisplay * 253 pipe_config->pipe_src_h; 254 u32 scaled_height = pipe_config->pipe_src_w * 255 adjusted_mode->crtc_vdisplay; 256 u32 bits; 257 258 /* 259 * For earlier chips we have to calculate the scaling 260 * ratio by hand and program it into the 261 * PFIT_PGM_RATIO register 262 */ 263 if (scaled_width > scaled_height) { /* pillar */ 264 centre_horizontally(adjusted_mode, 265 scaled_height / 266 pipe_config->pipe_src_h); 267 268 *border = LVDS_BORDER_ENABLE; 269 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay) { 270 bits = panel_fitter_scaling(pipe_config->pipe_src_h, 271 adjusted_mode->crtc_vdisplay); 272 273 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | 274 bits << PFIT_VERT_SCALE_SHIFT); 275 *pfit_control |= (PFIT_ENABLE | 276 VERT_INTERP_BILINEAR | 277 HORIZ_INTERP_BILINEAR); 278 } 279 } else if (scaled_width < scaled_height) { /* letter */ 280 centre_vertically(adjusted_mode, 281 scaled_width / 282 pipe_config->pipe_src_w); 283 284 *border = LVDS_BORDER_ENABLE; 285 if (pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) { 286 bits = panel_fitter_scaling(pipe_config->pipe_src_w, 287 adjusted_mode->crtc_hdisplay); 288 289 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | 290 bits << PFIT_VERT_SCALE_SHIFT); 291 *pfit_control |= (PFIT_ENABLE | 292 VERT_INTERP_BILINEAR | 293 HORIZ_INTERP_BILINEAR); 294 } 295 } else { 296 /* Aspects match, Let hw scale both directions */ 297 *pfit_control |= (PFIT_ENABLE | 298 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE | 299 VERT_INTERP_BILINEAR | 300 HORIZ_INTERP_BILINEAR); 301 } 302 } 303 304 void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc, 305 struct intel_crtc_state *pipe_config, 306 int fitting_mode) 307 { 308 struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev); 309 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0; 310 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; 311 312 /* Native modes don't need fitting */ 313 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w && 314 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h) 315 goto out; 316 317 switch (fitting_mode) { 318 case DRM_MODE_SCALE_CENTER: 319 /* 320 * For centered modes, we have to calculate border widths & 321 * heights and modify the values programmed into the CRTC. 322 */ 323 centre_horizontally(adjusted_mode, pipe_config->pipe_src_w); 324 centre_vertically(adjusted_mode, pipe_config->pipe_src_h); 325 border = LVDS_BORDER_ENABLE; 326 break; 327 case DRM_MODE_SCALE_ASPECT: 328 /* Scale but preserve the aspect ratio */ 329 if (INTEL_GEN(dev_priv) >= 4) 330 i965_scale_aspect(pipe_config, &pfit_control); 331 else 332 i9xx_scale_aspect(pipe_config, &pfit_control, 333 &pfit_pgm_ratios, &border); 334 break; 335 case DRM_MODE_SCALE_FULLSCREEN: 336 /* 337 * Full scaling, even if it changes the aspect ratio. 338 * Fortunately this is all done for us in hw. 339 */ 340 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay || 341 pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) { 342 pfit_control |= PFIT_ENABLE; 343 if (INTEL_GEN(dev_priv) >= 4) 344 pfit_control |= PFIT_SCALING_AUTO; 345 else 346 pfit_control |= (VERT_AUTO_SCALE | 347 VERT_INTERP_BILINEAR | 348 HORIZ_AUTO_SCALE | 349 HORIZ_INTERP_BILINEAR); 350 } 351 break; 352 default: 353 WARN(1, "bad panel fit mode: %d\n", fitting_mode); 354 return; 355 } 356 357 /* 965+ wants fuzzy fitting */ 358 /* FIXME: handle multiple panels by failing gracefully */ 359 if (INTEL_GEN(dev_priv) >= 4) 360 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) | 361 PFIT_FILTER_FUZZY); 362 363 out: 364 if ((pfit_control & PFIT_ENABLE) == 0) { 365 pfit_control = 0; 366 pfit_pgm_ratios = 0; 367 } 368 369 /* Make sure pre-965 set dither correctly for 18bpp panels. */ 370 if (INTEL_GEN(dev_priv) < 4 && pipe_config->pipe_bpp == 18) 371 pfit_control |= PANEL_8TO6_DITHER_ENABLE; 372 373 pipe_config->gmch_pfit.control = pfit_control; 374 pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios; 375 pipe_config->gmch_pfit.lvds_border_bits = border; 376 } 377 378 enum drm_connector_status 379 intel_panel_detect(struct drm_i915_private *dev_priv) 380 { 381 /* Assume that the BIOS does not lie through the OpRegion... */ 382 if (!i915_modparams.panel_ignore_lid && dev_priv->opregion.lid_state) { 383 return *dev_priv->opregion.lid_state & 0x1 ? 384 connector_status_connected : 385 connector_status_disconnected; 386 } 387 388 switch (i915_modparams.panel_ignore_lid) { 389 case -2: 390 return connector_status_connected; 391 case -1: 392 return connector_status_disconnected; 393 default: 394 return connector_status_unknown; 395 } 396 } 397 398 /** 399 * scale - scale values from one range to another 400 * 401 * @source_val: value in range [@source_min..@source_max] 402 * 403 * Return @source_val in range [@source_min..@source_max] scaled to range 404 * [@target_min..@target_max]. 405 */ 406 static uint32_t scale(uint32_t source_val, 407 uint32_t source_min, uint32_t source_max, 408 uint32_t target_min, uint32_t target_max) 409 { 410 uint64_t target_val; 411 412 WARN_ON(source_min > source_max); 413 WARN_ON(target_min > target_max); 414 415 /* defensive */ 416 source_val = clamp(source_val, source_min, source_max); 417 418 /* avoid overflows */ 419 target_val = DIV_ROUND_CLOSEST_ULL((uint64_t)(source_val - source_min) * 420 (target_max - target_min), source_max - source_min); 421 target_val += target_min; 422 423 return target_val; 424 } 425 426 /* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */ 427 static inline u32 scale_user_to_hw(struct intel_connector *connector, 428 u32 user_level, u32 user_max) 429 { 430 struct intel_panel *panel = &connector->panel; 431 432 return scale(user_level, 0, user_max, 433 panel->backlight.min, panel->backlight.max); 434 } 435 436 /* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result 437 * to [hw_min..hw_max]. */ 438 static inline u32 clamp_user_to_hw(struct intel_connector *connector, 439 u32 user_level, u32 user_max) 440 { 441 struct intel_panel *panel = &connector->panel; 442 u32 hw_level; 443 444 hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max); 445 hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max); 446 447 return hw_level; 448 } 449 450 /* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */ 451 static inline u32 scale_hw_to_user(struct intel_connector *connector, 452 u32 hw_level, u32 user_max) 453 { 454 struct intel_panel *panel = &connector->panel; 455 456 return scale(hw_level, panel->backlight.min, panel->backlight.max, 457 0, user_max); 458 } 459 460 static u32 intel_panel_compute_brightness(struct intel_connector *connector, 461 u32 val) 462 { 463 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 464 struct intel_panel *panel = &connector->panel; 465 466 WARN_ON(panel->backlight.max == 0); 467 468 if (i915_modparams.invert_brightness < 0) 469 return val; 470 471 if (i915_modparams.invert_brightness > 0 || 472 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) { 473 return panel->backlight.max - val + panel->backlight.min; 474 } 475 476 return val; 477 } 478 479 static u32 lpt_get_backlight(struct intel_connector *connector) 480 { 481 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 482 483 return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK; 484 } 485 486 static u32 pch_get_backlight(struct intel_connector *connector) 487 { 488 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 489 490 return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; 491 } 492 493 static u32 i9xx_get_backlight(struct intel_connector *connector) 494 { 495 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 496 struct intel_panel *panel = &connector->panel; 497 u32 val; 498 499 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; 500 if (INTEL_INFO(dev_priv)->gen < 4) 501 val >>= 1; 502 503 if (panel->backlight.combination_mode) { 504 u8 lbpc; 505 506 pci_read_config_byte(dev_priv->drm.pdev, LBPC, &lbpc); 507 val *= lbpc; 508 } 509 510 return val; 511 } 512 513 static u32 _vlv_get_backlight(struct drm_i915_private *dev_priv, enum i915_pipe pipe) 514 { 515 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B)) 516 return 0; 517 518 return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK; 519 } 520 521 static u32 vlv_get_backlight(struct intel_connector *connector) 522 { 523 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 524 enum i915_pipe pipe = intel_get_pipe_from_connector(connector); 525 526 return _vlv_get_backlight(dev_priv, pipe); 527 } 528 529 static u32 bxt_get_backlight(struct intel_connector *connector) 530 { 531 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 532 struct intel_panel *panel = &connector->panel; 533 534 return I915_READ(BXT_BLC_PWM_DUTY(panel->backlight.controller)); 535 } 536 537 static u32 pwm_get_backlight(struct intel_connector *connector) 538 { 539 struct intel_panel *panel = &connector->panel; 540 int duty_ns; 541 542 duty_ns = pwm_get_duty_cycle(panel->backlight.pwm); 543 return DIV_ROUND_UP(duty_ns * 100, CRC_PMIC_PWM_PERIOD_NS); 544 } 545 546 #if 0 547 static u32 intel_panel_get_backlight(struct intel_connector *connector) 548 { 549 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 550 struct intel_panel *panel = &connector->panel; 551 u32 val = 0; 552 553 mutex_lock(&dev_priv->backlight_lock); 554 555 if (panel->backlight.enabled) { 556 val = panel->backlight.get(connector); 557 val = intel_panel_compute_brightness(connector, val); 558 } 559 560 mutex_unlock(&dev_priv->backlight_lock); 561 562 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val); 563 return val; 564 } 565 #endif 566 567 static void lpt_set_backlight(const struct drm_connector_state *conn_state, u32 level) 568 { 569 struct intel_connector *connector = to_intel_connector(conn_state->connector); 570 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 571 572 u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK; 573 I915_WRITE(BLC_PWM_PCH_CTL2, val | level); 574 } 575 576 static void pch_set_backlight(const struct drm_connector_state *conn_state, u32 level) 577 { 578 struct intel_connector *connector = to_intel_connector(conn_state->connector); 579 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 580 u32 tmp; 581 582 tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; 583 I915_WRITE(BLC_PWM_CPU_CTL, tmp | level); 584 } 585 586 static void i9xx_set_backlight(const struct drm_connector_state *conn_state, u32 level) 587 { 588 struct intel_connector *connector = to_intel_connector(conn_state->connector); 589 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 590 struct intel_panel *panel = &connector->panel; 591 u32 tmp, mask; 592 593 WARN_ON(panel->backlight.max == 0); 594 595 if (panel->backlight.combination_mode) { 596 u8 lbpc; 597 598 lbpc = level * 0xfe / panel->backlight.max + 1; 599 level /= lbpc; 600 pci_write_config_byte(dev_priv->drm.pdev, LBPC, lbpc); 601 } 602 603 if (IS_GEN4(dev_priv)) { 604 mask = BACKLIGHT_DUTY_CYCLE_MASK; 605 } else { 606 level <<= 1; 607 mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV; 608 } 609 610 tmp = I915_READ(BLC_PWM_CTL) & ~mask; 611 I915_WRITE(BLC_PWM_CTL, tmp | level); 612 } 613 614 static void vlv_set_backlight(const struct drm_connector_state *conn_state, u32 level) 615 { 616 struct intel_connector *connector = to_intel_connector(conn_state->connector); 617 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 618 enum i915_pipe pipe = to_intel_crtc(conn_state->crtc)->pipe; 619 u32 tmp; 620 621 tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK; 622 I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level); 623 } 624 625 static void bxt_set_backlight(const struct drm_connector_state *conn_state, u32 level) 626 { 627 struct intel_connector *connector = to_intel_connector(conn_state->connector); 628 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 629 struct intel_panel *panel = &connector->panel; 630 631 I915_WRITE(BXT_BLC_PWM_DUTY(panel->backlight.controller), level); 632 } 633 634 static void pwm_set_backlight(const struct drm_connector_state *conn_state, u32 level) 635 { 636 struct intel_panel *panel = &to_intel_connector(conn_state->connector)->panel; 637 int duty_ns = DIV_ROUND_UP(level * CRC_PMIC_PWM_PERIOD_NS, 100); 638 639 pwm_config(panel->backlight.pwm, duty_ns, CRC_PMIC_PWM_PERIOD_NS); 640 } 641 642 static void 643 intel_panel_actually_set_backlight(const struct drm_connector_state *conn_state, u32 level) 644 { 645 struct intel_connector *connector = to_intel_connector(conn_state->connector); 646 struct intel_panel *panel = &connector->panel; 647 648 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level); 649 650 level = intel_panel_compute_brightness(connector, level); 651 panel->backlight.set(conn_state, level); 652 } 653 654 /* set backlight brightness to level in range [0..max], scaling wrt hw min */ 655 static void intel_panel_set_backlight(const struct drm_connector_state *conn_state, 656 u32 user_level, u32 user_max) 657 { 658 struct intel_connector *connector = to_intel_connector(conn_state->connector); 659 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 660 struct intel_panel *panel = &connector->panel; 661 u32 hw_level; 662 663 if (!panel->backlight.present) 664 return; 665 666 mutex_lock(&dev_priv->backlight_lock); 667 668 WARN_ON(panel->backlight.max == 0); 669 670 hw_level = scale_user_to_hw(connector, user_level, user_max); 671 panel->backlight.level = hw_level; 672 673 if (panel->backlight.enabled) 674 intel_panel_actually_set_backlight(conn_state, hw_level); 675 676 mutex_unlock(&dev_priv->backlight_lock); 677 } 678 679 /* set backlight brightness to level in range [0..max], assuming hw min is 680 * respected. 681 */ 682 void intel_panel_set_backlight_acpi(const struct drm_connector_state *conn_state, 683 u32 user_level, u32 user_max) 684 { 685 struct intel_connector *connector = to_intel_connector(conn_state->connector); 686 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 687 struct intel_panel *panel = &connector->panel; 688 u32 hw_level; 689 690 /* 691 * Lack of crtc may occur during driver init because 692 * connection_mutex isn't held across the entire backlight 693 * setup + modeset readout, and the BIOS can issue the 694 * requests at any time. 695 */ 696 if (!panel->backlight.present || !conn_state->crtc) 697 return; 698 699 mutex_lock(&dev_priv->backlight_lock); 700 701 WARN_ON(panel->backlight.max == 0); 702 703 hw_level = clamp_user_to_hw(connector, user_level, user_max); 704 panel->backlight.level = hw_level; 705 706 if (panel->backlight.device) 707 panel->backlight.device->props.brightness = 708 scale_hw_to_user(connector, 709 panel->backlight.level, 710 panel->backlight.device->props.max_brightness); 711 712 if (panel->backlight.enabled) 713 intel_panel_actually_set_backlight(conn_state, hw_level); 714 715 mutex_unlock(&dev_priv->backlight_lock); 716 } 717 718 static void lpt_disable_backlight(const struct drm_connector_state *old_conn_state) 719 { 720 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 721 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 722 u32 tmp; 723 724 intel_panel_actually_set_backlight(old_conn_state, 0); 725 726 /* 727 * Although we don't support or enable CPU PWM with LPT/SPT based 728 * systems, it may have been enabled prior to loading the 729 * driver. Disable to avoid warnings on LCPLL disable. 730 * 731 * This needs rework if we need to add support for CPU PWM on PCH split 732 * platforms. 733 */ 734 tmp = I915_READ(BLC_PWM_CPU_CTL2); 735 if (tmp & BLM_PWM_ENABLE) { 736 DRM_DEBUG_KMS("cpu backlight was enabled, disabling\n"); 737 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE); 738 } 739 740 tmp = I915_READ(BLC_PWM_PCH_CTL1); 741 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE); 742 } 743 744 static void pch_disable_backlight(const struct drm_connector_state *old_conn_state) 745 { 746 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 747 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 748 u32 tmp; 749 750 intel_panel_actually_set_backlight(old_conn_state, 0); 751 752 tmp = I915_READ(BLC_PWM_CPU_CTL2); 753 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE); 754 755 tmp = I915_READ(BLC_PWM_PCH_CTL1); 756 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE); 757 } 758 759 static void i9xx_disable_backlight(const struct drm_connector_state *old_conn_state) 760 { 761 intel_panel_actually_set_backlight(old_conn_state, 0); 762 } 763 764 static void i965_disable_backlight(const struct drm_connector_state *old_conn_state) 765 { 766 struct drm_i915_private *dev_priv = to_i915(old_conn_state->connector->dev); 767 u32 tmp; 768 769 intel_panel_actually_set_backlight(old_conn_state, 0); 770 771 tmp = I915_READ(BLC_PWM_CTL2); 772 I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE); 773 } 774 775 static void vlv_disable_backlight(const struct drm_connector_state *old_conn_state) 776 { 777 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 778 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 779 enum i915_pipe pipe = to_intel_crtc(old_conn_state->crtc)->pipe; 780 u32 tmp; 781 782 intel_panel_actually_set_backlight(old_conn_state, 0); 783 784 tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe)); 785 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE); 786 } 787 788 static void bxt_disable_backlight(const struct drm_connector_state *old_conn_state) 789 { 790 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 791 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 792 struct intel_panel *panel = &connector->panel; 793 u32 tmp, val; 794 795 intel_panel_actually_set_backlight(old_conn_state, 0); 796 797 tmp = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller)); 798 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), 799 tmp & ~BXT_BLC_PWM_ENABLE); 800 801 if (panel->backlight.controller == 1) { 802 val = I915_READ(UTIL_PIN_CTL); 803 val &= ~UTIL_PIN_ENABLE; 804 I915_WRITE(UTIL_PIN_CTL, val); 805 } 806 } 807 808 static void cnp_disable_backlight(const struct drm_connector_state *old_conn_state) 809 { 810 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 811 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 812 struct intel_panel *panel = &connector->panel; 813 u32 tmp; 814 815 intel_panel_actually_set_backlight(old_conn_state, 0); 816 817 tmp = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller)); 818 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), 819 tmp & ~BXT_BLC_PWM_ENABLE); 820 } 821 822 static void pwm_disable_backlight(const struct drm_connector_state *old_conn_state) 823 { 824 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 825 struct intel_panel *panel = &connector->panel; 826 827 /* Disable the backlight */ 828 pwm_config(panel->backlight.pwm, 0, CRC_PMIC_PWM_PERIOD_NS); 829 usleep_range(2000, 3000); 830 pwm_disable(panel->backlight.pwm); 831 } 832 833 void intel_panel_disable_backlight(const struct drm_connector_state *old_conn_state) 834 { 835 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 836 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 837 struct intel_panel *panel = &connector->panel; 838 839 if (!panel->backlight.present) 840 return; 841 842 /* 843 * Do not disable backlight on the vga_switcheroo path. When switching 844 * away from i915, the other client may depend on i915 to handle the 845 * backlight. This will leave the backlight on unnecessarily when 846 * another client is not activated. 847 */ 848 if (dev_priv->drm.switch_power_state == DRM_SWITCH_POWER_CHANGING) { 849 DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n"); 850 return; 851 } 852 853 mutex_lock(&dev_priv->backlight_lock); 854 855 if (panel->backlight.device) 856 panel->backlight.device->props.power = FB_BLANK_POWERDOWN; 857 panel->backlight.enabled = false; 858 panel->backlight.disable(old_conn_state); 859 860 mutex_unlock(&dev_priv->backlight_lock); 861 } 862 863 static void lpt_enable_backlight(const struct intel_crtc_state *crtc_state, 864 const struct drm_connector_state *conn_state) 865 { 866 struct intel_connector *connector = to_intel_connector(conn_state->connector); 867 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 868 struct intel_panel *panel = &connector->panel; 869 u32 pch_ctl1, pch_ctl2, schicken; 870 871 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); 872 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { 873 DRM_DEBUG_KMS("pch backlight already enabled\n"); 874 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; 875 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); 876 } 877 878 if (HAS_PCH_LPT(dev_priv)) { 879 schicken = I915_READ(SOUTH_CHICKEN2); 880 if (panel->backlight.alternate_pwm_increment) 881 schicken |= LPT_PWM_GRANULARITY; 882 else 883 schicken &= ~LPT_PWM_GRANULARITY; 884 I915_WRITE(SOUTH_CHICKEN2, schicken); 885 } else { 886 schicken = I915_READ(SOUTH_CHICKEN1); 887 if (panel->backlight.alternate_pwm_increment) 888 schicken |= SPT_PWM_GRANULARITY; 889 else 890 schicken &= ~SPT_PWM_GRANULARITY; 891 I915_WRITE(SOUTH_CHICKEN1, schicken); 892 } 893 894 pch_ctl2 = panel->backlight.max << 16; 895 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2); 896 897 pch_ctl1 = 0; 898 if (panel->backlight.active_low_pwm) 899 pch_ctl1 |= BLM_PCH_POLARITY; 900 901 /* After LPT, override is the default. */ 902 if (HAS_PCH_LPT(dev_priv)) 903 pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE; 904 905 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); 906 POSTING_READ(BLC_PWM_PCH_CTL1); 907 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE); 908 909 /* This won't stick until the above enable. */ 910 intel_panel_actually_set_backlight(conn_state, panel->backlight.level); 911 } 912 913 static void pch_enable_backlight(const struct intel_crtc_state *crtc_state, 914 const struct drm_connector_state *conn_state) 915 { 916 struct intel_connector *connector = to_intel_connector(conn_state->connector); 917 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 918 struct intel_panel *panel = &connector->panel; 919 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; 920 u32 cpu_ctl2, pch_ctl1, pch_ctl2; 921 922 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2); 923 if (cpu_ctl2 & BLM_PWM_ENABLE) { 924 DRM_DEBUG_KMS("cpu backlight already enabled\n"); 925 cpu_ctl2 &= ~BLM_PWM_ENABLE; 926 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2); 927 } 928 929 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); 930 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { 931 DRM_DEBUG_KMS("pch backlight already enabled\n"); 932 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; 933 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); 934 } 935 936 if (cpu_transcoder == TRANSCODER_EDP) 937 cpu_ctl2 = BLM_TRANSCODER_EDP; 938 else 939 cpu_ctl2 = BLM_PIPE(cpu_transcoder); 940 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2); 941 POSTING_READ(BLC_PWM_CPU_CTL2); 942 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE); 943 944 /* This won't stick until the above enable. */ 945 intel_panel_actually_set_backlight(conn_state, panel->backlight.level); 946 947 pch_ctl2 = panel->backlight.max << 16; 948 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2); 949 950 pch_ctl1 = 0; 951 if (panel->backlight.active_low_pwm) 952 pch_ctl1 |= BLM_PCH_POLARITY; 953 954 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); 955 POSTING_READ(BLC_PWM_PCH_CTL1); 956 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE); 957 } 958 959 static void i9xx_enable_backlight(const struct intel_crtc_state *crtc_state, 960 const struct drm_connector_state *conn_state) 961 { 962 struct intel_connector *connector = to_intel_connector(conn_state->connector); 963 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 964 struct intel_panel *panel = &connector->panel; 965 u32 ctl, freq; 966 967 ctl = I915_READ(BLC_PWM_CTL); 968 if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) { 969 DRM_DEBUG_KMS("backlight already enabled\n"); 970 I915_WRITE(BLC_PWM_CTL, 0); 971 } 972 973 freq = panel->backlight.max; 974 if (panel->backlight.combination_mode) 975 freq /= 0xff; 976 977 ctl = freq << 17; 978 if (panel->backlight.combination_mode) 979 ctl |= BLM_LEGACY_MODE; 980 if (IS_PINEVIEW(dev_priv) && panel->backlight.active_low_pwm) 981 ctl |= BLM_POLARITY_PNV; 982 983 I915_WRITE(BLC_PWM_CTL, ctl); 984 POSTING_READ(BLC_PWM_CTL); 985 986 /* XXX: combine this into above write? */ 987 intel_panel_actually_set_backlight(conn_state, panel->backlight.level); 988 989 /* 990 * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is 991 * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2 992 * that has backlight. 993 */ 994 if (IS_GEN2(dev_priv)) 995 I915_WRITE(BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE); 996 } 997 998 static void i965_enable_backlight(const struct intel_crtc_state *crtc_state, 999 const struct drm_connector_state *conn_state) 1000 { 1001 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1002 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1003 struct intel_panel *panel = &connector->panel; 1004 enum i915_pipe pipe = to_intel_crtc(conn_state->crtc)->pipe; 1005 u32 ctl, ctl2, freq; 1006 1007 ctl2 = I915_READ(BLC_PWM_CTL2); 1008 if (ctl2 & BLM_PWM_ENABLE) { 1009 DRM_DEBUG_KMS("backlight already enabled\n"); 1010 ctl2 &= ~BLM_PWM_ENABLE; 1011 I915_WRITE(BLC_PWM_CTL2, ctl2); 1012 } 1013 1014 freq = panel->backlight.max; 1015 if (panel->backlight.combination_mode) 1016 freq /= 0xff; 1017 1018 ctl = freq << 16; 1019 I915_WRITE(BLC_PWM_CTL, ctl); 1020 1021 ctl2 = BLM_PIPE(pipe); 1022 if (panel->backlight.combination_mode) 1023 ctl2 |= BLM_COMBINATION_MODE; 1024 if (panel->backlight.active_low_pwm) 1025 ctl2 |= BLM_POLARITY_I965; 1026 I915_WRITE(BLC_PWM_CTL2, ctl2); 1027 POSTING_READ(BLC_PWM_CTL2); 1028 I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE); 1029 1030 intel_panel_actually_set_backlight(conn_state, panel->backlight.level); 1031 } 1032 1033 static void vlv_enable_backlight(const struct intel_crtc_state *crtc_state, 1034 const struct drm_connector_state *conn_state) 1035 { 1036 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1037 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1038 struct intel_panel *panel = &connector->panel; 1039 enum i915_pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe; 1040 u32 ctl, ctl2; 1041 1042 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe)); 1043 if (ctl2 & BLM_PWM_ENABLE) { 1044 DRM_DEBUG_KMS("backlight already enabled\n"); 1045 ctl2 &= ~BLM_PWM_ENABLE; 1046 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2); 1047 } 1048 1049 ctl = panel->backlight.max << 16; 1050 I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl); 1051 1052 /* XXX: combine this into above write? */ 1053 intel_panel_actually_set_backlight(conn_state, panel->backlight.level); 1054 1055 ctl2 = 0; 1056 if (panel->backlight.active_low_pwm) 1057 ctl2 |= BLM_POLARITY_I965; 1058 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2); 1059 POSTING_READ(VLV_BLC_PWM_CTL2(pipe)); 1060 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE); 1061 } 1062 1063 static void bxt_enable_backlight(const struct intel_crtc_state *crtc_state, 1064 const struct drm_connector_state *conn_state) 1065 { 1066 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1067 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1068 struct intel_panel *panel = &connector->panel; 1069 enum i915_pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe; 1070 u32 pwm_ctl, val; 1071 1072 /* Controller 1 uses the utility pin. */ 1073 if (panel->backlight.controller == 1) { 1074 val = I915_READ(UTIL_PIN_CTL); 1075 if (val & UTIL_PIN_ENABLE) { 1076 DRM_DEBUG_KMS("util pin already enabled\n"); 1077 val &= ~UTIL_PIN_ENABLE; 1078 I915_WRITE(UTIL_PIN_CTL, val); 1079 } 1080 1081 val = 0; 1082 if (panel->backlight.util_pin_active_low) 1083 val |= UTIL_PIN_POLARITY; 1084 I915_WRITE(UTIL_PIN_CTL, val | UTIL_PIN_PIPE(pipe) | 1085 UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE); 1086 } 1087 1088 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller)); 1089 if (pwm_ctl & BXT_BLC_PWM_ENABLE) { 1090 DRM_DEBUG_KMS("backlight already enabled\n"); 1091 pwm_ctl &= ~BXT_BLC_PWM_ENABLE; 1092 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), 1093 pwm_ctl); 1094 } 1095 1096 I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller), 1097 panel->backlight.max); 1098 1099 intel_panel_actually_set_backlight(conn_state, panel->backlight.level); 1100 1101 pwm_ctl = 0; 1102 if (panel->backlight.active_low_pwm) 1103 pwm_ctl |= BXT_BLC_PWM_POLARITY; 1104 1105 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), pwm_ctl); 1106 POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller)); 1107 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), 1108 pwm_ctl | BXT_BLC_PWM_ENABLE); 1109 } 1110 1111 static void cnp_enable_backlight(const struct intel_crtc_state *crtc_state, 1112 const struct drm_connector_state *conn_state) 1113 { 1114 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1115 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1116 struct intel_panel *panel = &connector->panel; 1117 u32 pwm_ctl; 1118 1119 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller)); 1120 if (pwm_ctl & BXT_BLC_PWM_ENABLE) { 1121 DRM_DEBUG_KMS("backlight already enabled\n"); 1122 pwm_ctl &= ~BXT_BLC_PWM_ENABLE; 1123 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), 1124 pwm_ctl); 1125 } 1126 1127 I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller), 1128 panel->backlight.max); 1129 1130 intel_panel_actually_set_backlight(conn_state, panel->backlight.level); 1131 1132 pwm_ctl = 0; 1133 if (panel->backlight.active_low_pwm) 1134 pwm_ctl |= BXT_BLC_PWM_POLARITY; 1135 1136 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), pwm_ctl); 1137 POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller)); 1138 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), 1139 pwm_ctl | BXT_BLC_PWM_ENABLE); 1140 } 1141 1142 static void pwm_enable_backlight(const struct intel_crtc_state *crtc_state, 1143 const struct drm_connector_state *conn_state) 1144 { 1145 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1146 struct intel_panel *panel = &connector->panel; 1147 1148 pwm_enable(panel->backlight.pwm); 1149 intel_panel_actually_set_backlight(conn_state, panel->backlight.level); 1150 } 1151 1152 void intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state, 1153 const struct drm_connector_state *conn_state) 1154 { 1155 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1156 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1157 struct intel_panel *panel = &connector->panel; 1158 enum i915_pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe; 1159 1160 if (!panel->backlight.present) 1161 return; 1162 1163 DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe)); 1164 1165 mutex_lock(&dev_priv->backlight_lock); 1166 1167 WARN_ON(panel->backlight.max == 0); 1168 1169 if (panel->backlight.level <= panel->backlight.min) { 1170 panel->backlight.level = panel->backlight.max; 1171 if (panel->backlight.device) 1172 panel->backlight.device->props.brightness = 1173 scale_hw_to_user(connector, 1174 panel->backlight.level, 1175 panel->backlight.device->props.max_brightness); 1176 } 1177 1178 panel->backlight.enable(crtc_state, conn_state); 1179 panel->backlight.enabled = true; 1180 if (panel->backlight.device) 1181 panel->backlight.device->props.power = FB_BLANK_UNBLANK; 1182 1183 mutex_unlock(&dev_priv->backlight_lock); 1184 } 1185 1186 #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE) 1187 #if 0 /* unused */ 1188 static int intel_backlight_device_update_status(struct backlight_device *bd) 1189 { 1190 struct intel_connector *connector = bl_get_data(bd); 1191 struct intel_panel *panel = &connector->panel; 1192 struct drm_device *dev = connector->base.dev; 1193 1194 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); 1195 DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n", 1196 bd->props.brightness, bd->props.max_brightness); 1197 intel_panel_set_backlight(connector->base.state, bd->props.brightness, 1198 bd->props.max_brightness); 1199 1200 /* 1201 * Allow flipping bl_power as a sub-state of enabled. Sadly the 1202 * backlight class device does not make it easy to to differentiate 1203 * between callbacks for brightness and bl_power, so our backlight_power 1204 * callback needs to take this into account. 1205 */ 1206 if (panel->backlight.enabled) { 1207 if (panel->backlight.power) { 1208 bool enable = bd->props.power == FB_BLANK_UNBLANK && 1209 bd->props.brightness != 0; 1210 panel->backlight.power(connector, enable); 1211 } 1212 } else { 1213 bd->props.power = FB_BLANK_POWERDOWN; 1214 } 1215 1216 drm_modeset_unlock(&dev->mode_config.connection_mutex); 1217 return 0; 1218 } 1219 1220 static int intel_backlight_device_get_brightness(struct backlight_device *bd) 1221 { 1222 struct intel_connector *connector = bl_get_data(bd); 1223 struct drm_device *dev = connector->base.dev; 1224 struct drm_i915_private *dev_priv = to_i915(dev); 1225 u32 hw_level; 1226 int ret; 1227 1228 intel_runtime_pm_get(dev_priv); 1229 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); 1230 1231 hw_level = intel_panel_get_backlight(connector); 1232 ret = scale_hw_to_user(connector, hw_level, bd->props.max_brightness); 1233 1234 drm_modeset_unlock(&dev->mode_config.connection_mutex); 1235 intel_runtime_pm_put(dev_priv); 1236 1237 return ret; 1238 } 1239 1240 static const struct backlight_ops intel_backlight_device_ops = { 1241 .update_status = intel_backlight_device_update_status, 1242 .get_brightness = intel_backlight_device_get_brightness, 1243 }; 1244 #endif 1245 1246 int intel_backlight_device_register(struct intel_connector *connector) 1247 { 1248 struct intel_panel *panel = &connector->panel; 1249 struct backlight_properties props; 1250 1251 if (WARN_ON(panel->backlight.device)) 1252 return -ENODEV; 1253 1254 if (!panel->backlight.present) 1255 return 0; 1256 1257 WARN_ON(panel->backlight.max == 0); 1258 1259 memset(&props, 0, sizeof(props)); 1260 props.type = BACKLIGHT_RAW; 1261 1262 /* 1263 * Note: Everything should work even if the backlight device max 1264 * presented to the userspace is arbitrarily chosen. 1265 */ 1266 props.max_brightness = panel->backlight.max; 1267 props.brightness = scale_hw_to_user(connector, 1268 panel->backlight.level, 1269 props.max_brightness); 1270 1271 if (panel->backlight.enabled) 1272 props.power = FB_BLANK_UNBLANK; 1273 else 1274 props.power = FB_BLANK_POWERDOWN; 1275 1276 /* 1277 * Note: using the same name independent of the connector prevents 1278 * registration of multiple backlight devices in the driver. 1279 */ 1280 #if 0 1281 panel->backlight.device = 1282 backlight_device_register("intel_backlight", 1283 connector->base.kdev, 1284 connector, 1285 &intel_backlight_device_ops, &props); 1286 1287 if (IS_ERR(panel->backlight.device)) { 1288 DRM_ERROR("Failed to register backlight: %ld\n", 1289 PTR_ERR(panel->backlight.device)); 1290 panel->backlight.device = NULL; 1291 return -ENODEV; 1292 } 1293 1294 DRM_DEBUG_KMS("Connector %s backlight sysfs interface registered\n", 1295 connector->base.name); 1296 #endif 1297 1298 return 0; 1299 } 1300 1301 void intel_backlight_device_unregister(struct intel_connector *connector) 1302 { 1303 #if 0 1304 struct intel_panel *panel = &connector->panel; 1305 1306 if (panel->backlight.device) { 1307 backlight_device_unregister(panel->backlight.device); 1308 panel->backlight.device = NULL; 1309 } 1310 #endif 1311 } 1312 #endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */ 1313 1314 /* 1315 * CNP: PWM clock frequency is 19.2 MHz or 24 MHz. 1316 * PWM increment = 1 1317 */ 1318 static u32 cnp_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1319 { 1320 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1321 1322 return DIV_ROUND_CLOSEST(KHz(dev_priv->rawclk_freq), pwm_freq_hz); 1323 } 1324 1325 /* 1326 * BXT: PWM clock frequency = 19.2 MHz. 1327 */ 1328 static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1329 { 1330 return DIV_ROUND_CLOSEST(KHz(19200), pwm_freq_hz); 1331 } 1332 1333 /* 1334 * SPT: This value represents the period of the PWM stream in clock periods 1335 * multiplied by 16 (default increment) or 128 (alternate increment selected in 1336 * SCHICKEN_1 bit 0). PWM clock is 24 MHz. 1337 */ 1338 static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1339 { 1340 struct intel_panel *panel = &connector->panel; 1341 u32 mul; 1342 1343 if (panel->backlight.alternate_pwm_increment) 1344 mul = 128; 1345 else 1346 mul = 16; 1347 1348 return DIV_ROUND_CLOSEST(MHz(24), pwm_freq_hz * mul); 1349 } 1350 1351 /* 1352 * LPT: This value represents the period of the PWM stream in clock periods 1353 * multiplied by 128 (default increment) or 16 (alternate increment, selected in 1354 * LPT SOUTH_CHICKEN2 register bit 5). 1355 */ 1356 static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1357 { 1358 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1359 struct intel_panel *panel = &connector->panel; 1360 u32 mul, clock; 1361 1362 if (panel->backlight.alternate_pwm_increment) 1363 mul = 16; 1364 else 1365 mul = 128; 1366 1367 if (HAS_PCH_LPT_H(dev_priv)) 1368 clock = MHz(135); /* LPT:H */ 1369 else 1370 clock = MHz(24); /* LPT:LP */ 1371 1372 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul); 1373 } 1374 1375 /* 1376 * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH 1377 * display raw clocks multiplied by 128. 1378 */ 1379 static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1380 { 1381 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1382 1383 return DIV_ROUND_CLOSEST(KHz(dev_priv->rawclk_freq), pwm_freq_hz * 128); 1384 } 1385 1386 /* 1387 * Gen2: This field determines the number of time base events (display core 1388 * clock frequency/32) in total for a complete cycle of modulated backlight 1389 * control. 1390 * 1391 * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock) 1392 * divided by 32. 1393 */ 1394 static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1395 { 1396 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1397 int clock; 1398 1399 if (IS_PINEVIEW(dev_priv)) 1400 clock = KHz(dev_priv->rawclk_freq); 1401 else 1402 clock = KHz(dev_priv->cdclk.hw.cdclk); 1403 1404 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 32); 1405 } 1406 1407 /* 1408 * Gen4: This value represents the period of the PWM stream in display core 1409 * clocks ([DevCTG] HRAW clocks) multiplied by 128. 1410 * 1411 */ 1412 static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1413 { 1414 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1415 int clock; 1416 1417 if (IS_G4X(dev_priv)) 1418 clock = KHz(dev_priv->rawclk_freq); 1419 else 1420 clock = KHz(dev_priv->cdclk.hw.cdclk); 1421 1422 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 128); 1423 } 1424 1425 /* 1426 * VLV: This value represents the period of the PWM stream in display core 1427 * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks 1428 * multiplied by 16. CHV uses a 19.2MHz S0IX clock. 1429 */ 1430 static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1431 { 1432 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1433 int mul, clock; 1434 1435 if ((I915_READ(CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) { 1436 if (IS_CHERRYVIEW(dev_priv)) 1437 clock = KHz(19200); 1438 else 1439 clock = MHz(25); 1440 mul = 16; 1441 } else { 1442 clock = KHz(dev_priv->rawclk_freq); 1443 mul = 128; 1444 } 1445 1446 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul); 1447 } 1448 1449 static u32 get_backlight_max_vbt(struct intel_connector *connector) 1450 { 1451 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1452 struct intel_panel *panel = &connector->panel; 1453 u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz; 1454 u32 pwm; 1455 1456 if (!panel->backlight.hz_to_pwm) { 1457 DRM_DEBUG_KMS("backlight frequency conversion not supported\n"); 1458 return 0; 1459 } 1460 1461 if (pwm_freq_hz) { 1462 DRM_DEBUG_KMS("VBT defined backlight frequency %u Hz\n", 1463 pwm_freq_hz); 1464 } else { 1465 pwm_freq_hz = 200; 1466 DRM_DEBUG_KMS("default backlight frequency %u Hz\n", 1467 pwm_freq_hz); 1468 } 1469 1470 pwm = panel->backlight.hz_to_pwm(connector, pwm_freq_hz); 1471 if (!pwm) { 1472 DRM_DEBUG_KMS("backlight frequency conversion failed\n"); 1473 return 0; 1474 } 1475 1476 return pwm; 1477 } 1478 1479 /* 1480 * Note: The setup hooks can't assume pipe is set! 1481 */ 1482 static u32 get_backlight_min_vbt(struct intel_connector *connector) 1483 { 1484 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1485 struct intel_panel *panel = &connector->panel; 1486 int min; 1487 1488 WARN_ON(panel->backlight.max == 0); 1489 1490 /* 1491 * XXX: If the vbt value is 255, it makes min equal to max, which leads 1492 * to problems. There are such machines out there. Either our 1493 * interpretation is wrong or the vbt has bogus data. Or both. Safeguard 1494 * against this by letting the minimum be at most (arbitrarily chosen) 1495 * 25% of the max. 1496 */ 1497 min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64); 1498 if (min != dev_priv->vbt.backlight.min_brightness) { 1499 DRM_DEBUG_KMS("clamping VBT min backlight %d/255 to %d/255\n", 1500 dev_priv->vbt.backlight.min_brightness, min); 1501 } 1502 1503 /* vbt value is a coefficient in range [0..255] */ 1504 return scale(min, 0, 255, 0, panel->backlight.max); 1505 } 1506 1507 static int lpt_setup_backlight(struct intel_connector *connector, enum i915_pipe unused) 1508 { 1509 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1510 struct intel_panel *panel = &connector->panel; 1511 u32 pch_ctl1, pch_ctl2, val; 1512 bool alt; 1513 1514 if (HAS_PCH_LPT(dev_priv)) 1515 alt = I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY; 1516 else 1517 alt = I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY; 1518 panel->backlight.alternate_pwm_increment = alt; 1519 1520 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); 1521 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; 1522 1523 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2); 1524 panel->backlight.max = pch_ctl2 >> 16; 1525 1526 if (!panel->backlight.max) 1527 panel->backlight.max = get_backlight_max_vbt(connector); 1528 1529 if (!panel->backlight.max) 1530 return -ENODEV; 1531 1532 panel->backlight.min = get_backlight_min_vbt(connector); 1533 1534 val = lpt_get_backlight(connector); 1535 val = intel_panel_compute_brightness(connector, val); 1536 panel->backlight.level = clamp(val, panel->backlight.min, 1537 panel->backlight.max); 1538 1539 panel->backlight.enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE; 1540 1541 return 0; 1542 } 1543 1544 static int pch_setup_backlight(struct intel_connector *connector, enum i915_pipe unused) 1545 { 1546 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1547 struct intel_panel *panel = &connector->panel; 1548 u32 cpu_ctl2, pch_ctl1, pch_ctl2, val; 1549 1550 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); 1551 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; 1552 1553 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2); 1554 panel->backlight.max = pch_ctl2 >> 16; 1555 1556 if (!panel->backlight.max) 1557 panel->backlight.max = get_backlight_max_vbt(connector); 1558 1559 if (!panel->backlight.max) 1560 return -ENODEV; 1561 1562 panel->backlight.min = get_backlight_min_vbt(connector); 1563 1564 val = pch_get_backlight(connector); 1565 val = intel_panel_compute_brightness(connector, val); 1566 panel->backlight.level = clamp(val, panel->backlight.min, 1567 panel->backlight.max); 1568 1569 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2); 1570 panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) && 1571 (pch_ctl1 & BLM_PCH_PWM_ENABLE); 1572 1573 return 0; 1574 } 1575 1576 static int i9xx_setup_backlight(struct intel_connector *connector, enum i915_pipe unused) 1577 { 1578 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1579 struct intel_panel *panel = &connector->panel; 1580 u32 ctl, val; 1581 1582 ctl = I915_READ(BLC_PWM_CTL); 1583 1584 if (IS_GEN2(dev_priv) || IS_I915GM(dev_priv) || IS_I945GM(dev_priv)) 1585 panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE; 1586 1587 if (IS_PINEVIEW(dev_priv)) 1588 panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV; 1589 1590 panel->backlight.max = ctl >> 17; 1591 1592 if (!panel->backlight.max) { 1593 panel->backlight.max = get_backlight_max_vbt(connector); 1594 panel->backlight.max >>= 1; 1595 } 1596 1597 if (!panel->backlight.max) 1598 return -ENODEV; 1599 1600 if (panel->backlight.combination_mode) 1601 panel->backlight.max *= 0xff; 1602 1603 panel->backlight.min = get_backlight_min_vbt(connector); 1604 1605 val = i9xx_get_backlight(connector); 1606 val = intel_panel_compute_brightness(connector, val); 1607 panel->backlight.level = clamp(val, panel->backlight.min, 1608 panel->backlight.max); 1609 1610 panel->backlight.enabled = val != 0; 1611 1612 return 0; 1613 } 1614 1615 static int i965_setup_backlight(struct intel_connector *connector, enum i915_pipe unused) 1616 { 1617 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1618 struct intel_panel *panel = &connector->panel; 1619 u32 ctl, ctl2, val; 1620 1621 ctl2 = I915_READ(BLC_PWM_CTL2); 1622 panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE; 1623 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965; 1624 1625 ctl = I915_READ(BLC_PWM_CTL); 1626 panel->backlight.max = ctl >> 16; 1627 1628 if (!panel->backlight.max) 1629 panel->backlight.max = get_backlight_max_vbt(connector); 1630 1631 if (!panel->backlight.max) 1632 return -ENODEV; 1633 1634 if (panel->backlight.combination_mode) 1635 panel->backlight.max *= 0xff; 1636 1637 panel->backlight.min = get_backlight_min_vbt(connector); 1638 1639 val = i9xx_get_backlight(connector); 1640 val = intel_panel_compute_brightness(connector, val); 1641 panel->backlight.level = clamp(val, panel->backlight.min, 1642 panel->backlight.max); 1643 1644 panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE; 1645 1646 return 0; 1647 } 1648 1649 static int vlv_setup_backlight(struct intel_connector *connector, enum i915_pipe pipe) 1650 { 1651 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1652 struct intel_panel *panel = &connector->panel; 1653 u32 ctl, ctl2, val; 1654 1655 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B)) 1656 return -ENODEV; 1657 1658 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe)); 1659 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965; 1660 1661 ctl = I915_READ(VLV_BLC_PWM_CTL(pipe)); 1662 panel->backlight.max = ctl >> 16; 1663 1664 if (!panel->backlight.max) 1665 panel->backlight.max = get_backlight_max_vbt(connector); 1666 1667 if (!panel->backlight.max) 1668 return -ENODEV; 1669 1670 panel->backlight.min = get_backlight_min_vbt(connector); 1671 1672 val = _vlv_get_backlight(dev_priv, pipe); 1673 val = intel_panel_compute_brightness(connector, val); 1674 panel->backlight.level = clamp(val, panel->backlight.min, 1675 panel->backlight.max); 1676 1677 panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE; 1678 1679 return 0; 1680 } 1681 1682 static int 1683 bxt_setup_backlight(struct intel_connector *connector, enum i915_pipe unused) 1684 { 1685 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1686 struct intel_panel *panel = &connector->panel; 1687 u32 pwm_ctl, val; 1688 1689 panel->backlight.controller = dev_priv->vbt.backlight.controller; 1690 1691 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller)); 1692 1693 /* Controller 1 uses the utility pin. */ 1694 if (panel->backlight.controller == 1) { 1695 val = I915_READ(UTIL_PIN_CTL); 1696 panel->backlight.util_pin_active_low = 1697 val & UTIL_PIN_POLARITY; 1698 } 1699 1700 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY; 1701 panel->backlight.max = 1702 I915_READ(BXT_BLC_PWM_FREQ(panel->backlight.controller)); 1703 1704 if (!panel->backlight.max) 1705 panel->backlight.max = get_backlight_max_vbt(connector); 1706 1707 if (!panel->backlight.max) 1708 return -ENODEV; 1709 1710 panel->backlight.min = get_backlight_min_vbt(connector); 1711 1712 panel->backlight.min = get_backlight_min_vbt(connector); 1713 1714 val = bxt_get_backlight(connector); 1715 val = intel_panel_compute_brightness(connector, val); 1716 panel->backlight.level = clamp(val, panel->backlight.min, 1717 panel->backlight.max); 1718 1719 panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE; 1720 1721 return 0; 1722 } 1723 1724 static int 1725 cnp_setup_backlight(struct intel_connector *connector, enum i915_pipe unused) 1726 { 1727 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1728 struct intel_panel *panel = &connector->panel; 1729 u32 pwm_ctl, val; 1730 1731 /* 1732 * CNP has the BXT implementation of backlight, but with only 1733 * one controller. Future platforms could have multiple controllers 1734 * so let's make this extensible and prepared for the future. 1735 */ 1736 panel->backlight.controller = 0; 1737 1738 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller)); 1739 1740 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY; 1741 panel->backlight.max = 1742 I915_READ(BXT_BLC_PWM_FREQ(panel->backlight.controller)); 1743 1744 if (!panel->backlight.max) 1745 panel->backlight.max = get_backlight_max_vbt(connector); 1746 1747 if (!panel->backlight.max) 1748 return -ENODEV; 1749 1750 panel->backlight.min = get_backlight_min_vbt(connector); 1751 1752 panel->backlight.min = get_backlight_min_vbt(connector); 1753 1754 val = bxt_get_backlight(connector); 1755 val = intel_panel_compute_brightness(connector, val); 1756 panel->backlight.level = clamp(val, panel->backlight.min, 1757 panel->backlight.max); 1758 1759 panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE; 1760 1761 return 0; 1762 } 1763 1764 static int pwm_setup_backlight(struct intel_connector *connector, 1765 enum i915_pipe pipe) 1766 { 1767 struct drm_device *dev = connector->base.dev; 1768 struct intel_panel *panel = &connector->panel; 1769 int retval; 1770 1771 /* Get the PWM chip for backlight control */ 1772 panel->backlight.pwm = pwm_get(dev->dev, "pwm_backlight"); 1773 if (IS_ERR(panel->backlight.pwm)) { 1774 DRM_ERROR("Failed to own the pwm chip\n"); 1775 panel->backlight.pwm = NULL; 1776 return -ENODEV; 1777 } 1778 1779 /* 1780 * FIXME: pwm_apply_args() should be removed when switching to 1781 * the atomic PWM API. 1782 */ 1783 #if 0 1784 pwm_apply_args(panel->backlight.pwm); 1785 #endif 1786 1787 retval = pwm_config(panel->backlight.pwm, CRC_PMIC_PWM_PERIOD_NS, 1788 CRC_PMIC_PWM_PERIOD_NS); 1789 if (retval < 0) { 1790 DRM_ERROR("Failed to configure the pwm chip\n"); 1791 pwm_put(panel->backlight.pwm); 1792 panel->backlight.pwm = NULL; 1793 return retval; 1794 } 1795 1796 panel->backlight.min = 0; /* 0% */ 1797 panel->backlight.max = 100; /* 100% */ 1798 panel->backlight.level = DIV_ROUND_UP( 1799 pwm_get_duty_cycle(panel->backlight.pwm) * 100, 1800 CRC_PMIC_PWM_PERIOD_NS); 1801 panel->backlight.enabled = panel->backlight.level != 0; 1802 1803 return 0; 1804 } 1805 1806 #ifdef __DragonFly__ 1807 /* 1808 * Read max backlight level 1809 */ 1810 static int 1811 sysctl_backlight_max(SYSCTL_HANDLER_ARGS) 1812 { 1813 int err, val; 1814 struct intel_connector *connector = arg1; 1815 struct drm_device *dev = connector->base.dev; 1816 struct drm_i915_private *dev_priv = dev->dev_private; 1817 struct intel_panel *panel = &connector->panel; 1818 1819 mutex_lock(&dev_priv->backlight_lock); 1820 val = panel->backlight.max; 1821 mutex_unlock(&dev_priv->backlight_lock); 1822 1823 err = sysctl_handle_int(oidp, &val, 0, req); 1824 return(err); 1825 } 1826 1827 /* 1828 * Read/write backlight level 1829 */ 1830 static int 1831 sysctl_backlight_handler(SYSCTL_HANDLER_ARGS) 1832 { 1833 struct intel_connector *connector = arg1; 1834 const struct drm_connector_state *conn_state = connector->base.state; 1835 struct drm_device *dev = connector->base.dev; 1836 struct drm_i915_private *dev_priv = dev->dev_private; 1837 struct intel_panel *panel = &connector->panel; 1838 int err, val; 1839 u32 user_level, max_brightness; 1840 1841 mutex_lock(&dev_priv->backlight_lock); 1842 max_brightness = panel->backlight.max; 1843 user_level = scale_hw_to_user(connector, panel->backlight.level, 1844 max_brightness); 1845 mutex_unlock(&dev_priv->backlight_lock); 1846 1847 val = user_level; 1848 err = sysctl_handle_int(oidp, &val, 0, req); 1849 if (err != 0 || req->newptr == NULL) { 1850 return(err); 1851 } 1852 1853 if (val != user_level && val >= 0 && val <= max_brightness) { 1854 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); 1855 intel_panel_set_backlight(conn_state, val, max_brightness); 1856 drm_modeset_unlock(&dev->mode_config.connection_mutex); 1857 } 1858 1859 return(err); 1860 } 1861 #endif /* __DragonFly__ */ 1862 1863 int intel_panel_setup_backlight(struct drm_connector *connector, enum i915_pipe pipe) 1864 { 1865 struct drm_i915_private *dev_priv = to_i915(connector->dev); 1866 struct intel_connector *intel_connector = to_intel_connector(connector); 1867 struct intel_panel *panel = &intel_connector->panel; 1868 int ret; 1869 1870 if (!dev_priv->vbt.backlight.present) { 1871 if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) { 1872 DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n"); 1873 } else { 1874 DRM_DEBUG_KMS("no backlight present per VBT\n"); 1875 return 0; 1876 } 1877 } 1878 1879 /* ensure intel_panel has been initialized first */ 1880 if (WARN_ON(!panel->backlight.setup)) 1881 return -ENODEV; 1882 1883 /* set level and max in panel struct */ 1884 mutex_lock(&dev_priv->backlight_lock); 1885 ret = panel->backlight.setup(intel_connector, pipe); 1886 mutex_unlock(&dev_priv->backlight_lock); 1887 1888 if (ret) { 1889 DRM_DEBUG_KMS("failed to setup backlight for connector %s\n", 1890 connector->name); 1891 return ret; 1892 } 1893 1894 panel->backlight.present = true; 1895 1896 #ifdef __DragonFly__ 1897 SYSCTL_ADD_PROC(&connector->dev->sysctl->ctx, &sysctl__hw_children, 1898 OID_AUTO, "backlight_max", 1899 CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_ANYBODY, 1900 connector, sizeof(int), 1901 sysctl_backlight_max, 1902 "I", "Max backlight level"); 1903 SYSCTL_ADD_PROC(&connector->dev->sysctl->ctx, &sysctl__hw_children, 1904 OID_AUTO, "backlight_level", 1905 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_ANYBODY, 1906 connector, sizeof(int), 1907 sysctl_backlight_handler, 1908 "I", "Backlight level"); 1909 #endif 1910 1911 DRM_DEBUG_KMS("Connector %s backlight initialized, %s, brightness %u/%u\n", 1912 connector->name, 1913 enableddisabled(panel->backlight.enabled), 1914 panel->backlight.level, panel->backlight.max); 1915 1916 return 0; 1917 } 1918 1919 void intel_panel_destroy_backlight(struct drm_connector *connector) 1920 { 1921 struct intel_connector *intel_connector = to_intel_connector(connector); 1922 struct intel_panel *panel = &intel_connector->panel; 1923 1924 /* dispose of the pwm */ 1925 if (panel->backlight.pwm) 1926 pwm_put(panel->backlight.pwm); 1927 1928 panel->backlight.present = false; 1929 } 1930 1931 /* Set up chip specific backlight functions */ 1932 static void 1933 intel_panel_init_backlight_funcs(struct intel_panel *panel) 1934 { 1935 struct intel_connector *connector = 1936 container_of(panel, struct intel_connector, panel); 1937 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1938 1939 if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP && 1940 intel_dp_aux_init_backlight_funcs(connector) == 0) 1941 return; 1942 1943 if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI && 1944 intel_dsi_dcs_init_backlight_funcs(connector) == 0) 1945 return; 1946 1947 if (IS_GEN9_LP(dev_priv)) { 1948 panel->backlight.setup = bxt_setup_backlight; 1949 panel->backlight.enable = bxt_enable_backlight; 1950 panel->backlight.disable = bxt_disable_backlight; 1951 panel->backlight.set = bxt_set_backlight; 1952 panel->backlight.get = bxt_get_backlight; 1953 panel->backlight.hz_to_pwm = bxt_hz_to_pwm; 1954 } else if (HAS_PCH_CNP(dev_priv)) { 1955 panel->backlight.setup = cnp_setup_backlight; 1956 panel->backlight.enable = cnp_enable_backlight; 1957 panel->backlight.disable = cnp_disable_backlight; 1958 panel->backlight.set = bxt_set_backlight; 1959 panel->backlight.get = bxt_get_backlight; 1960 panel->backlight.hz_to_pwm = cnp_hz_to_pwm; 1961 } else if (HAS_PCH_LPT(dev_priv) || HAS_PCH_SPT(dev_priv) || 1962 HAS_PCH_KBP(dev_priv)) { 1963 panel->backlight.setup = lpt_setup_backlight; 1964 panel->backlight.enable = lpt_enable_backlight; 1965 panel->backlight.disable = lpt_disable_backlight; 1966 panel->backlight.set = lpt_set_backlight; 1967 panel->backlight.get = lpt_get_backlight; 1968 if (HAS_PCH_LPT(dev_priv)) 1969 panel->backlight.hz_to_pwm = lpt_hz_to_pwm; 1970 else 1971 panel->backlight.hz_to_pwm = spt_hz_to_pwm; 1972 } else if (HAS_PCH_SPLIT(dev_priv)) { 1973 panel->backlight.setup = pch_setup_backlight; 1974 panel->backlight.enable = pch_enable_backlight; 1975 panel->backlight.disable = pch_disable_backlight; 1976 panel->backlight.set = pch_set_backlight; 1977 panel->backlight.get = pch_get_backlight; 1978 panel->backlight.hz_to_pwm = pch_hz_to_pwm; 1979 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { 1980 if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI) { 1981 panel->backlight.setup = pwm_setup_backlight; 1982 panel->backlight.enable = pwm_enable_backlight; 1983 panel->backlight.disable = pwm_disable_backlight; 1984 panel->backlight.set = pwm_set_backlight; 1985 panel->backlight.get = pwm_get_backlight; 1986 } else { 1987 panel->backlight.setup = vlv_setup_backlight; 1988 panel->backlight.enable = vlv_enable_backlight; 1989 panel->backlight.disable = vlv_disable_backlight; 1990 panel->backlight.set = vlv_set_backlight; 1991 panel->backlight.get = vlv_get_backlight; 1992 panel->backlight.hz_to_pwm = vlv_hz_to_pwm; 1993 } 1994 } else if (IS_GEN4(dev_priv)) { 1995 panel->backlight.setup = i965_setup_backlight; 1996 panel->backlight.enable = i965_enable_backlight; 1997 panel->backlight.disable = i965_disable_backlight; 1998 panel->backlight.set = i9xx_set_backlight; 1999 panel->backlight.get = i9xx_get_backlight; 2000 panel->backlight.hz_to_pwm = i965_hz_to_pwm; 2001 } else { 2002 panel->backlight.setup = i9xx_setup_backlight; 2003 panel->backlight.enable = i9xx_enable_backlight; 2004 panel->backlight.disable = i9xx_disable_backlight; 2005 panel->backlight.set = i9xx_set_backlight; 2006 panel->backlight.get = i9xx_get_backlight; 2007 panel->backlight.hz_to_pwm = i9xx_hz_to_pwm; 2008 } 2009 } 2010 2011 int intel_panel_init(struct intel_panel *panel, 2012 struct drm_display_mode *fixed_mode, 2013 struct drm_display_mode *alt_fixed_mode, 2014 struct drm_display_mode *downclock_mode) 2015 { 2016 intel_panel_init_backlight_funcs(panel); 2017 2018 panel->fixed_mode = fixed_mode; 2019 panel->alt_fixed_mode = alt_fixed_mode; 2020 panel->downclock_mode = downclock_mode; 2021 2022 return 0; 2023 } 2024 2025 void intel_panel_fini(struct intel_panel *panel) 2026 { 2027 struct intel_connector *intel_connector = 2028 container_of(panel, struct intel_connector, panel); 2029 2030 if (panel->fixed_mode) 2031 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode); 2032 2033 if (panel->alt_fixed_mode) 2034 drm_mode_destroy(intel_connector->base.dev, 2035 panel->alt_fixed_mode); 2036 2037 if (panel->downclock_mode) 2038 drm_mode_destroy(intel_connector->base.dev, 2039 panel->downclock_mode); 2040 } 2041