1 /* 2 * Copyright © 2006-2010 Intel Corporation 3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: 25 * Eric Anholt <eric@anholt.net> 26 * Dave Airlie <airlied@linux.ie> 27 * Jesse Barnes <jesse.barnes@intel.com> 28 * Chris Wilson <chris@chris-wilson.co.uk> 29 */ 30 31 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 32 33 #include <linux/kernel.h> 34 #include <linux/moduleparam.h> 35 #include <linux/pwm.h> 36 #include "intel_drv.h" 37 38 #define CRC_PMIC_PWM_PERIOD_NS 21333 39 40 void 41 intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode, 42 struct drm_display_mode *adjusted_mode) 43 { 44 drm_mode_copy(adjusted_mode, fixed_mode); 45 46 drm_mode_set_crtcinfo(adjusted_mode, 0); 47 } 48 49 /** 50 * intel_find_panel_downclock - find the reduced downclock for LVDS in EDID 51 * @dev_priv: i915 device instance 52 * @fixed_mode : panel native mode 53 * @connector: LVDS/eDP connector 54 * 55 * Return downclock_avail 56 * Find the reduced downclock for LVDS/eDP in EDID. 57 */ 58 struct drm_display_mode * 59 intel_find_panel_downclock(struct drm_i915_private *dev_priv, 60 struct drm_display_mode *fixed_mode, 61 struct drm_connector *connector) 62 { 63 struct drm_display_mode *scan, *tmp_mode; 64 int temp_downclock; 65 66 temp_downclock = fixed_mode->clock; 67 tmp_mode = NULL; 68 69 list_for_each_entry(scan, &connector->probed_modes, head) { 70 /* 71 * If one mode has the same resolution with the fixed_panel 72 * mode while they have the different refresh rate, it means 73 * that the reduced downclock is found. In such 74 * case we can set the different FPx0/1 to dynamically select 75 * between low and high frequency. 76 */ 77 if (scan->hdisplay == fixed_mode->hdisplay && 78 scan->hsync_start == fixed_mode->hsync_start && 79 scan->hsync_end == fixed_mode->hsync_end && 80 scan->htotal == fixed_mode->htotal && 81 scan->vdisplay == fixed_mode->vdisplay && 82 scan->vsync_start == fixed_mode->vsync_start && 83 scan->vsync_end == fixed_mode->vsync_end && 84 scan->vtotal == fixed_mode->vtotal) { 85 if (scan->clock < temp_downclock) { 86 /* 87 * The downclock is already found. But we 88 * expect to find the lower downclock. 89 */ 90 temp_downclock = scan->clock; 91 tmp_mode = scan; 92 } 93 } 94 } 95 96 if (temp_downclock < fixed_mode->clock) 97 return drm_mode_duplicate(&dev_priv->drm, tmp_mode); 98 else 99 return NULL; 100 } 101 102 /* adjusted_mode has been preset to be the panel's fixed mode */ 103 void 104 intel_pch_panel_fitting(struct intel_crtc *intel_crtc, 105 struct intel_crtc_state *pipe_config, 106 int fitting_mode) 107 { 108 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; 109 int x = 0, y = 0, width = 0, height = 0; 110 111 /* Native modes don't need fitting */ 112 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w && 113 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h) 114 goto done; 115 116 switch (fitting_mode) { 117 case DRM_MODE_SCALE_CENTER: 118 width = pipe_config->pipe_src_w; 119 height = pipe_config->pipe_src_h; 120 x = (adjusted_mode->crtc_hdisplay - width + 1)/2; 121 y = (adjusted_mode->crtc_vdisplay - height + 1)/2; 122 break; 123 124 case DRM_MODE_SCALE_ASPECT: 125 /* Scale but preserve the aspect ratio */ 126 { 127 u32 scaled_width = adjusted_mode->crtc_hdisplay 128 * pipe_config->pipe_src_h; 129 u32 scaled_height = pipe_config->pipe_src_w 130 * adjusted_mode->crtc_vdisplay; 131 if (scaled_width > scaled_height) { /* pillar */ 132 width = scaled_height / pipe_config->pipe_src_h; 133 if (width & 1) 134 width++; 135 x = (adjusted_mode->crtc_hdisplay - width + 1) / 2; 136 y = 0; 137 height = adjusted_mode->crtc_vdisplay; 138 } else if (scaled_width < scaled_height) { /* letter */ 139 height = scaled_width / pipe_config->pipe_src_w; 140 if (height & 1) 141 height++; 142 y = (adjusted_mode->crtc_vdisplay - height + 1) / 2; 143 x = 0; 144 width = adjusted_mode->crtc_hdisplay; 145 } else { 146 x = y = 0; 147 width = adjusted_mode->crtc_hdisplay; 148 height = adjusted_mode->crtc_vdisplay; 149 } 150 } 151 break; 152 153 case DRM_MODE_SCALE_FULLSCREEN: 154 x = y = 0; 155 width = adjusted_mode->crtc_hdisplay; 156 height = adjusted_mode->crtc_vdisplay; 157 break; 158 159 default: 160 WARN(1, "bad panel fit mode: %d\n", fitting_mode); 161 return; 162 } 163 164 done: 165 pipe_config->pch_pfit.pos = (x << 16) | y; 166 pipe_config->pch_pfit.size = (width << 16) | height; 167 pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0; 168 } 169 170 static void 171 centre_horizontally(struct drm_display_mode *adjusted_mode, 172 int width) 173 { 174 u32 border, sync_pos, blank_width, sync_width; 175 176 /* keep the hsync and hblank widths constant */ 177 sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start; 178 blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start; 179 sync_pos = (blank_width - sync_width + 1) / 2; 180 181 border = (adjusted_mode->crtc_hdisplay - width + 1) / 2; 182 border += border & 1; /* make the border even */ 183 184 adjusted_mode->crtc_hdisplay = width; 185 adjusted_mode->crtc_hblank_start = width + border; 186 adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width; 187 188 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos; 189 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width; 190 } 191 192 static void 193 centre_vertically(struct drm_display_mode *adjusted_mode, 194 int height) 195 { 196 u32 border, sync_pos, blank_width, sync_width; 197 198 /* keep the vsync and vblank widths constant */ 199 sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start; 200 blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start; 201 sync_pos = (blank_width - sync_width + 1) / 2; 202 203 border = (adjusted_mode->crtc_vdisplay - height + 1) / 2; 204 205 adjusted_mode->crtc_vdisplay = height; 206 adjusted_mode->crtc_vblank_start = height + border; 207 adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width; 208 209 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos; 210 adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width; 211 } 212 213 static inline u32 panel_fitter_scaling(u32 source, u32 target) 214 { 215 /* 216 * Floating point operation is not supported. So the FACTOR 217 * is defined, which can avoid the floating point computation 218 * when calculating the panel ratio. 219 */ 220 #define ACCURACY 12 221 #define FACTOR (1 << ACCURACY) 222 u32 ratio = source * FACTOR / target; 223 return (FACTOR * ratio + FACTOR/2) / FACTOR; 224 } 225 226 static void i965_scale_aspect(struct intel_crtc_state *pipe_config, 227 u32 *pfit_control) 228 { 229 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; 230 u32 scaled_width = adjusted_mode->crtc_hdisplay * 231 pipe_config->pipe_src_h; 232 u32 scaled_height = pipe_config->pipe_src_w * 233 adjusted_mode->crtc_vdisplay; 234 235 /* 965+ is easy, it does everything in hw */ 236 if (scaled_width > scaled_height) 237 *pfit_control |= PFIT_ENABLE | 238 PFIT_SCALING_PILLAR; 239 else if (scaled_width < scaled_height) 240 *pfit_control |= PFIT_ENABLE | 241 PFIT_SCALING_LETTER; 242 else if (adjusted_mode->crtc_hdisplay != pipe_config->pipe_src_w) 243 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO; 244 } 245 246 static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config, 247 u32 *pfit_control, u32 *pfit_pgm_ratios, 248 u32 *border) 249 { 250 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; 251 u32 scaled_width = adjusted_mode->crtc_hdisplay * 252 pipe_config->pipe_src_h; 253 u32 scaled_height = pipe_config->pipe_src_w * 254 adjusted_mode->crtc_vdisplay; 255 u32 bits; 256 257 /* 258 * For earlier chips we have to calculate the scaling 259 * ratio by hand and program it into the 260 * PFIT_PGM_RATIO register 261 */ 262 if (scaled_width > scaled_height) { /* pillar */ 263 centre_horizontally(adjusted_mode, 264 scaled_height / 265 pipe_config->pipe_src_h); 266 267 *border = LVDS_BORDER_ENABLE; 268 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay) { 269 bits = panel_fitter_scaling(pipe_config->pipe_src_h, 270 adjusted_mode->crtc_vdisplay); 271 272 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | 273 bits << PFIT_VERT_SCALE_SHIFT); 274 *pfit_control |= (PFIT_ENABLE | 275 VERT_INTERP_BILINEAR | 276 HORIZ_INTERP_BILINEAR); 277 } 278 } else if (scaled_width < scaled_height) { /* letter */ 279 centre_vertically(adjusted_mode, 280 scaled_width / 281 pipe_config->pipe_src_w); 282 283 *border = LVDS_BORDER_ENABLE; 284 if (pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) { 285 bits = panel_fitter_scaling(pipe_config->pipe_src_w, 286 adjusted_mode->crtc_hdisplay); 287 288 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | 289 bits << PFIT_VERT_SCALE_SHIFT); 290 *pfit_control |= (PFIT_ENABLE | 291 VERT_INTERP_BILINEAR | 292 HORIZ_INTERP_BILINEAR); 293 } 294 } else { 295 /* Aspects match, Let hw scale both directions */ 296 *pfit_control |= (PFIT_ENABLE | 297 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE | 298 VERT_INTERP_BILINEAR | 299 HORIZ_INTERP_BILINEAR); 300 } 301 } 302 303 void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc, 304 struct intel_crtc_state *pipe_config, 305 int fitting_mode) 306 { 307 struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev); 308 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0; 309 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; 310 311 /* Native modes don't need fitting */ 312 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w && 313 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h) 314 goto out; 315 316 switch (fitting_mode) { 317 case DRM_MODE_SCALE_CENTER: 318 /* 319 * For centered modes, we have to calculate border widths & 320 * heights and modify the values programmed into the CRTC. 321 */ 322 centre_horizontally(adjusted_mode, pipe_config->pipe_src_w); 323 centre_vertically(adjusted_mode, pipe_config->pipe_src_h); 324 border = LVDS_BORDER_ENABLE; 325 break; 326 case DRM_MODE_SCALE_ASPECT: 327 /* Scale but preserve the aspect ratio */ 328 if (INTEL_GEN(dev_priv) >= 4) 329 i965_scale_aspect(pipe_config, &pfit_control); 330 else 331 i9xx_scale_aspect(pipe_config, &pfit_control, 332 &pfit_pgm_ratios, &border); 333 break; 334 case DRM_MODE_SCALE_FULLSCREEN: 335 /* 336 * Full scaling, even if it changes the aspect ratio. 337 * Fortunately this is all done for us in hw. 338 */ 339 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay || 340 pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) { 341 pfit_control |= PFIT_ENABLE; 342 if (INTEL_GEN(dev_priv) >= 4) 343 pfit_control |= PFIT_SCALING_AUTO; 344 else 345 pfit_control |= (VERT_AUTO_SCALE | 346 VERT_INTERP_BILINEAR | 347 HORIZ_AUTO_SCALE | 348 HORIZ_INTERP_BILINEAR); 349 } 350 break; 351 default: 352 WARN(1, "bad panel fit mode: %d\n", fitting_mode); 353 return; 354 } 355 356 /* 965+ wants fuzzy fitting */ 357 /* FIXME: handle multiple panels by failing gracefully */ 358 if (INTEL_GEN(dev_priv) >= 4) 359 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) | 360 PFIT_FILTER_FUZZY); 361 362 out: 363 if ((pfit_control & PFIT_ENABLE) == 0) { 364 pfit_control = 0; 365 pfit_pgm_ratios = 0; 366 } 367 368 /* Make sure pre-965 set dither correctly for 18bpp panels. */ 369 if (INTEL_GEN(dev_priv) < 4 && pipe_config->pipe_bpp == 18) 370 pfit_control |= PANEL_8TO6_DITHER_ENABLE; 371 372 pipe_config->gmch_pfit.control = pfit_control; 373 pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios; 374 pipe_config->gmch_pfit.lvds_border_bits = border; 375 } 376 377 enum drm_connector_status 378 intel_panel_detect(struct drm_i915_private *dev_priv) 379 { 380 /* Assume that the BIOS does not lie through the OpRegion... */ 381 if (!i915.panel_ignore_lid && dev_priv->opregion.lid_state) { 382 return *dev_priv->opregion.lid_state & 0x1 ? 383 connector_status_connected : 384 connector_status_disconnected; 385 } 386 387 switch (i915.panel_ignore_lid) { 388 case -2: 389 return connector_status_connected; 390 case -1: 391 return connector_status_disconnected; 392 default: 393 return connector_status_unknown; 394 } 395 } 396 397 /** 398 * scale - scale values from one range to another 399 * 400 * @source_val: value in range [@source_min..@source_max] 401 * 402 * Return @source_val in range [@source_min..@source_max] scaled to range 403 * [@target_min..@target_max]. 404 */ 405 static uint32_t scale(uint32_t source_val, 406 uint32_t source_min, uint32_t source_max, 407 uint32_t target_min, uint32_t target_max) 408 { 409 uint64_t target_val; 410 411 WARN_ON(source_min > source_max); 412 WARN_ON(target_min > target_max); 413 414 /* defensive */ 415 source_val = clamp(source_val, source_min, source_max); 416 417 /* avoid overflows */ 418 target_val = DIV_ROUND_CLOSEST_ULL((uint64_t)(source_val - source_min) * 419 (target_max - target_min), source_max - source_min); 420 target_val += target_min; 421 422 return target_val; 423 } 424 425 /* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */ 426 static inline u32 scale_user_to_hw(struct intel_connector *connector, 427 u32 user_level, u32 user_max) 428 { 429 struct intel_panel *panel = &connector->panel; 430 431 return scale(user_level, 0, user_max, 432 panel->backlight.min, panel->backlight.max); 433 } 434 435 /* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result 436 * to [hw_min..hw_max]. */ 437 static inline u32 clamp_user_to_hw(struct intel_connector *connector, 438 u32 user_level, u32 user_max) 439 { 440 struct intel_panel *panel = &connector->panel; 441 u32 hw_level; 442 443 hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max); 444 hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max); 445 446 return hw_level; 447 } 448 449 /* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */ 450 static inline u32 scale_hw_to_user(struct intel_connector *connector, 451 u32 hw_level, u32 user_max) 452 { 453 struct intel_panel *panel = &connector->panel; 454 455 return scale(hw_level, panel->backlight.min, panel->backlight.max, 456 0, user_max); 457 } 458 459 static u32 intel_panel_compute_brightness(struct intel_connector *connector, 460 u32 val) 461 { 462 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 463 struct intel_panel *panel = &connector->panel; 464 465 WARN_ON(panel->backlight.max == 0); 466 467 if (i915.invert_brightness < 0) 468 return val; 469 470 if (i915.invert_brightness > 0 || 471 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) { 472 return panel->backlight.max - val; 473 } 474 475 return val; 476 } 477 478 static u32 lpt_get_backlight(struct intel_connector *connector) 479 { 480 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 481 482 return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK; 483 } 484 485 static u32 pch_get_backlight(struct intel_connector *connector) 486 { 487 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 488 489 return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; 490 } 491 492 static u32 i9xx_get_backlight(struct intel_connector *connector) 493 { 494 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 495 struct intel_panel *panel = &connector->panel; 496 u32 val; 497 498 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; 499 if (INTEL_INFO(dev_priv)->gen < 4) 500 val >>= 1; 501 502 if (panel->backlight.combination_mode) { 503 u8 lbpc; 504 505 pci_read_config_byte(dev_priv->drm.pdev, LBPC, &lbpc); 506 val *= lbpc; 507 } 508 509 return val; 510 } 511 512 static u32 _vlv_get_backlight(struct drm_i915_private *dev_priv, enum i915_pipe pipe) 513 { 514 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B)) 515 return 0; 516 517 return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK; 518 } 519 520 static u32 vlv_get_backlight(struct intel_connector *connector) 521 { 522 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 523 enum i915_pipe pipe = intel_get_pipe_from_connector(connector); 524 525 return _vlv_get_backlight(dev_priv, pipe); 526 } 527 528 static u32 bxt_get_backlight(struct intel_connector *connector) 529 { 530 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 531 struct intel_panel *panel = &connector->panel; 532 533 return I915_READ(BXT_BLC_PWM_DUTY(panel->backlight.controller)); 534 } 535 536 static u32 pwm_get_backlight(struct intel_connector *connector) 537 { 538 struct intel_panel *panel = &connector->panel; 539 int duty_ns; 540 541 duty_ns = pwm_get_duty_cycle(panel->backlight.pwm); 542 return DIV_ROUND_UP(duty_ns * 100, CRC_PMIC_PWM_PERIOD_NS); 543 } 544 545 #if 0 546 static u32 intel_panel_get_backlight(struct intel_connector *connector) 547 { 548 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 549 struct intel_panel *panel = &connector->panel; 550 u32 val = 0; 551 552 mutex_lock(&dev_priv->backlight_lock); 553 554 if (panel->backlight.enabled) { 555 val = panel->backlight.get(connector); 556 val = intel_panel_compute_brightness(connector, val); 557 } 558 559 mutex_unlock(&dev_priv->backlight_lock); 560 561 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val); 562 return val; 563 } 564 #endif 565 566 static void lpt_set_backlight(struct intel_connector *connector, u32 level) 567 { 568 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 569 u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK; 570 I915_WRITE(BLC_PWM_PCH_CTL2, val | level); 571 } 572 573 static void pch_set_backlight(struct intel_connector *connector, u32 level) 574 { 575 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 576 u32 tmp; 577 578 tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; 579 I915_WRITE(BLC_PWM_CPU_CTL, tmp | level); 580 } 581 582 static void i9xx_set_backlight(struct intel_connector *connector, u32 level) 583 { 584 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 585 struct intel_panel *panel = &connector->panel; 586 u32 tmp, mask; 587 588 WARN_ON(panel->backlight.max == 0); 589 590 if (panel->backlight.combination_mode) { 591 u8 lbpc; 592 593 lbpc = level * 0xfe / panel->backlight.max + 1; 594 level /= lbpc; 595 pci_write_config_byte(dev_priv->drm.pdev, LBPC, lbpc); 596 } 597 598 if (IS_GEN4(dev_priv)) { 599 mask = BACKLIGHT_DUTY_CYCLE_MASK; 600 } else { 601 level <<= 1; 602 mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV; 603 } 604 605 tmp = I915_READ(BLC_PWM_CTL) & ~mask; 606 I915_WRITE(BLC_PWM_CTL, tmp | level); 607 } 608 609 static void vlv_set_backlight(struct intel_connector *connector, u32 level) 610 { 611 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 612 enum i915_pipe pipe = intel_get_pipe_from_connector(connector); 613 u32 tmp; 614 615 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B)) 616 return; 617 618 tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK; 619 I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level); 620 } 621 622 static void bxt_set_backlight(struct intel_connector *connector, u32 level) 623 { 624 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 625 struct intel_panel *panel = &connector->panel; 626 627 I915_WRITE(BXT_BLC_PWM_DUTY(panel->backlight.controller), level); 628 } 629 630 static void pwm_set_backlight(struct intel_connector *connector, u32 level) 631 { 632 struct intel_panel *panel = &connector->panel; 633 int duty_ns = DIV_ROUND_UP(level * CRC_PMIC_PWM_PERIOD_NS, 100); 634 635 pwm_config(panel->backlight.pwm, duty_ns, CRC_PMIC_PWM_PERIOD_NS); 636 } 637 638 static void 639 intel_panel_actually_set_backlight(struct intel_connector *connector, u32 level) 640 { 641 struct intel_panel *panel = &connector->panel; 642 643 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level); 644 645 level = intel_panel_compute_brightness(connector, level); 646 panel->backlight.set(connector, level); 647 } 648 649 /* set backlight brightness to level in range [0..max], scaling wrt hw min */ 650 static void intel_panel_set_backlight(struct intel_connector *connector, 651 u32 user_level, u32 user_max) 652 { 653 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 654 struct intel_panel *panel = &connector->panel; 655 u32 hw_level; 656 657 if (!panel->backlight.present) 658 return; 659 660 mutex_lock(&dev_priv->backlight_lock); 661 662 WARN_ON(panel->backlight.max == 0); 663 664 hw_level = scale_user_to_hw(connector, user_level, user_max); 665 panel->backlight.level = hw_level; 666 667 if (panel->backlight.enabled) 668 intel_panel_actually_set_backlight(connector, hw_level); 669 670 mutex_unlock(&dev_priv->backlight_lock); 671 } 672 673 /* set backlight brightness to level in range [0..max], assuming hw min is 674 * respected. 675 */ 676 void intel_panel_set_backlight_acpi(struct intel_connector *connector, 677 u32 user_level, u32 user_max) 678 { 679 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 680 struct intel_panel *panel = &connector->panel; 681 enum i915_pipe pipe = intel_get_pipe_from_connector(connector); 682 u32 hw_level; 683 684 /* 685 * INVALID_PIPE may occur during driver init because 686 * connection_mutex isn't held across the entire backlight 687 * setup + modeset readout, and the BIOS can issue the 688 * requests at any time. 689 */ 690 if (!panel->backlight.present || pipe == INVALID_PIPE) 691 return; 692 693 mutex_lock(&dev_priv->backlight_lock); 694 695 WARN_ON(panel->backlight.max == 0); 696 697 hw_level = clamp_user_to_hw(connector, user_level, user_max); 698 panel->backlight.level = hw_level; 699 700 if (panel->backlight.device) 701 panel->backlight.device->props.brightness = 702 scale_hw_to_user(connector, 703 panel->backlight.level, 704 panel->backlight.device->props.max_brightness); 705 706 if (panel->backlight.enabled) 707 intel_panel_actually_set_backlight(connector, hw_level); 708 709 mutex_unlock(&dev_priv->backlight_lock); 710 } 711 712 static void lpt_disable_backlight(struct intel_connector *connector) 713 { 714 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 715 u32 tmp; 716 717 intel_panel_actually_set_backlight(connector, 0); 718 719 /* 720 * Although we don't support or enable CPU PWM with LPT/SPT based 721 * systems, it may have been enabled prior to loading the 722 * driver. Disable to avoid warnings on LCPLL disable. 723 * 724 * This needs rework if we need to add support for CPU PWM on PCH split 725 * platforms. 726 */ 727 tmp = I915_READ(BLC_PWM_CPU_CTL2); 728 if (tmp & BLM_PWM_ENABLE) { 729 DRM_DEBUG_KMS("cpu backlight was enabled, disabling\n"); 730 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE); 731 } 732 733 tmp = I915_READ(BLC_PWM_PCH_CTL1); 734 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE); 735 } 736 737 static void pch_disable_backlight(struct intel_connector *connector) 738 { 739 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 740 u32 tmp; 741 742 intel_panel_actually_set_backlight(connector, 0); 743 744 tmp = I915_READ(BLC_PWM_CPU_CTL2); 745 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE); 746 747 tmp = I915_READ(BLC_PWM_PCH_CTL1); 748 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE); 749 } 750 751 static void i9xx_disable_backlight(struct intel_connector *connector) 752 { 753 intel_panel_actually_set_backlight(connector, 0); 754 } 755 756 static void i965_disable_backlight(struct intel_connector *connector) 757 { 758 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 759 u32 tmp; 760 761 intel_panel_actually_set_backlight(connector, 0); 762 763 tmp = I915_READ(BLC_PWM_CTL2); 764 I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE); 765 } 766 767 static void vlv_disable_backlight(struct intel_connector *connector) 768 { 769 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 770 enum i915_pipe pipe = intel_get_pipe_from_connector(connector); 771 u32 tmp; 772 773 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B)) 774 return; 775 776 intel_panel_actually_set_backlight(connector, 0); 777 778 tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe)); 779 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE); 780 } 781 782 static void bxt_disable_backlight(struct intel_connector *connector) 783 { 784 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 785 struct intel_panel *panel = &connector->panel; 786 u32 tmp, val; 787 788 intel_panel_actually_set_backlight(connector, 0); 789 790 tmp = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller)); 791 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), 792 tmp & ~BXT_BLC_PWM_ENABLE); 793 794 if (panel->backlight.controller == 1) { 795 val = I915_READ(UTIL_PIN_CTL); 796 val &= ~UTIL_PIN_ENABLE; 797 I915_WRITE(UTIL_PIN_CTL, val); 798 } 799 } 800 801 static void pwm_disable_backlight(struct intel_connector *connector) 802 { 803 struct intel_panel *panel = &connector->panel; 804 805 /* Disable the backlight */ 806 pwm_config(panel->backlight.pwm, 0, CRC_PMIC_PWM_PERIOD_NS); 807 usleep_range(2000, 3000); 808 pwm_disable(panel->backlight.pwm); 809 } 810 811 void intel_panel_disable_backlight(struct intel_connector *connector) 812 { 813 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 814 struct intel_panel *panel = &connector->panel; 815 816 if (!panel->backlight.present) 817 return; 818 819 /* 820 * Do not disable backlight on the vga_switcheroo path. When switching 821 * away from i915, the other client may depend on i915 to handle the 822 * backlight. This will leave the backlight on unnecessarily when 823 * another client is not activated. 824 */ 825 if (dev_priv->drm.switch_power_state == DRM_SWITCH_POWER_CHANGING) { 826 DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n"); 827 return; 828 } 829 830 mutex_lock(&dev_priv->backlight_lock); 831 832 if (panel->backlight.device) 833 panel->backlight.device->props.power = FB_BLANK_POWERDOWN; 834 panel->backlight.enabled = false; 835 panel->backlight.disable(connector); 836 837 mutex_unlock(&dev_priv->backlight_lock); 838 } 839 840 static void lpt_enable_backlight(struct intel_connector *connector) 841 { 842 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 843 struct intel_panel *panel = &connector->panel; 844 u32 pch_ctl1, pch_ctl2, schicken; 845 846 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); 847 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { 848 DRM_DEBUG_KMS("pch backlight already enabled\n"); 849 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; 850 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); 851 } 852 853 if (HAS_PCH_LPT(dev_priv)) { 854 schicken = I915_READ(SOUTH_CHICKEN2); 855 if (panel->backlight.alternate_pwm_increment) 856 schicken |= LPT_PWM_GRANULARITY; 857 else 858 schicken &= ~LPT_PWM_GRANULARITY; 859 I915_WRITE(SOUTH_CHICKEN2, schicken); 860 } else { 861 schicken = I915_READ(SOUTH_CHICKEN1); 862 if (panel->backlight.alternate_pwm_increment) 863 schicken |= SPT_PWM_GRANULARITY; 864 else 865 schicken &= ~SPT_PWM_GRANULARITY; 866 I915_WRITE(SOUTH_CHICKEN1, schicken); 867 } 868 869 pch_ctl2 = panel->backlight.max << 16; 870 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2); 871 872 pch_ctl1 = 0; 873 if (panel->backlight.active_low_pwm) 874 pch_ctl1 |= BLM_PCH_POLARITY; 875 876 /* After LPT, override is the default. */ 877 if (HAS_PCH_LPT(dev_priv)) 878 pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE; 879 880 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); 881 POSTING_READ(BLC_PWM_PCH_CTL1); 882 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE); 883 884 /* This won't stick until the above enable. */ 885 intel_panel_actually_set_backlight(connector, panel->backlight.level); 886 } 887 888 static void pch_enable_backlight(struct intel_connector *connector) 889 { 890 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 891 struct intel_panel *panel = &connector->panel; 892 enum i915_pipe pipe = intel_get_pipe_from_connector(connector); 893 enum transcoder cpu_transcoder = 894 intel_pipe_to_cpu_transcoder(dev_priv, pipe); 895 u32 cpu_ctl2, pch_ctl1, pch_ctl2; 896 897 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2); 898 if (cpu_ctl2 & BLM_PWM_ENABLE) { 899 DRM_DEBUG_KMS("cpu backlight already enabled\n"); 900 cpu_ctl2 &= ~BLM_PWM_ENABLE; 901 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2); 902 } 903 904 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); 905 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { 906 DRM_DEBUG_KMS("pch backlight already enabled\n"); 907 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; 908 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); 909 } 910 911 if (cpu_transcoder == TRANSCODER_EDP) 912 cpu_ctl2 = BLM_TRANSCODER_EDP; 913 else 914 cpu_ctl2 = BLM_PIPE(cpu_transcoder); 915 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2); 916 POSTING_READ(BLC_PWM_CPU_CTL2); 917 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE); 918 919 /* This won't stick until the above enable. */ 920 intel_panel_actually_set_backlight(connector, panel->backlight.level); 921 922 pch_ctl2 = panel->backlight.max << 16; 923 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2); 924 925 pch_ctl1 = 0; 926 if (panel->backlight.active_low_pwm) 927 pch_ctl1 |= BLM_PCH_POLARITY; 928 929 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); 930 POSTING_READ(BLC_PWM_PCH_CTL1); 931 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE); 932 } 933 934 static void i9xx_enable_backlight(struct intel_connector *connector) 935 { 936 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 937 struct intel_panel *panel = &connector->panel; 938 u32 ctl, freq; 939 940 ctl = I915_READ(BLC_PWM_CTL); 941 if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) { 942 DRM_DEBUG_KMS("backlight already enabled\n"); 943 I915_WRITE(BLC_PWM_CTL, 0); 944 } 945 946 freq = panel->backlight.max; 947 if (panel->backlight.combination_mode) 948 freq /= 0xff; 949 950 ctl = freq << 17; 951 if (panel->backlight.combination_mode) 952 ctl |= BLM_LEGACY_MODE; 953 if (IS_PINEVIEW(dev_priv) && panel->backlight.active_low_pwm) 954 ctl |= BLM_POLARITY_PNV; 955 956 I915_WRITE(BLC_PWM_CTL, ctl); 957 POSTING_READ(BLC_PWM_CTL); 958 959 /* XXX: combine this into above write? */ 960 intel_panel_actually_set_backlight(connector, panel->backlight.level); 961 962 /* 963 * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is 964 * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2 965 * that has backlight. 966 */ 967 if (IS_GEN2(dev_priv)) 968 I915_WRITE(BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE); 969 } 970 971 static void i965_enable_backlight(struct intel_connector *connector) 972 { 973 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 974 struct intel_panel *panel = &connector->panel; 975 enum i915_pipe pipe = intel_get_pipe_from_connector(connector); 976 u32 ctl, ctl2, freq; 977 978 ctl2 = I915_READ(BLC_PWM_CTL2); 979 if (ctl2 & BLM_PWM_ENABLE) { 980 DRM_DEBUG_KMS("backlight already enabled\n"); 981 ctl2 &= ~BLM_PWM_ENABLE; 982 I915_WRITE(BLC_PWM_CTL2, ctl2); 983 } 984 985 freq = panel->backlight.max; 986 if (panel->backlight.combination_mode) 987 freq /= 0xff; 988 989 ctl = freq << 16; 990 I915_WRITE(BLC_PWM_CTL, ctl); 991 992 ctl2 = BLM_PIPE(pipe); 993 if (panel->backlight.combination_mode) 994 ctl2 |= BLM_COMBINATION_MODE; 995 if (panel->backlight.active_low_pwm) 996 ctl2 |= BLM_POLARITY_I965; 997 I915_WRITE(BLC_PWM_CTL2, ctl2); 998 POSTING_READ(BLC_PWM_CTL2); 999 I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE); 1000 1001 intel_panel_actually_set_backlight(connector, panel->backlight.level); 1002 } 1003 1004 static void vlv_enable_backlight(struct intel_connector *connector) 1005 { 1006 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1007 struct intel_panel *panel = &connector->panel; 1008 enum i915_pipe pipe = intel_get_pipe_from_connector(connector); 1009 u32 ctl, ctl2; 1010 1011 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B)) 1012 return; 1013 1014 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe)); 1015 if (ctl2 & BLM_PWM_ENABLE) { 1016 DRM_DEBUG_KMS("backlight already enabled\n"); 1017 ctl2 &= ~BLM_PWM_ENABLE; 1018 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2); 1019 } 1020 1021 ctl = panel->backlight.max << 16; 1022 I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl); 1023 1024 /* XXX: combine this into above write? */ 1025 intel_panel_actually_set_backlight(connector, panel->backlight.level); 1026 1027 ctl2 = 0; 1028 if (panel->backlight.active_low_pwm) 1029 ctl2 |= BLM_POLARITY_I965; 1030 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2); 1031 POSTING_READ(VLV_BLC_PWM_CTL2(pipe)); 1032 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE); 1033 } 1034 1035 static void bxt_enable_backlight(struct intel_connector *connector) 1036 { 1037 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1038 struct intel_panel *panel = &connector->panel; 1039 enum i915_pipe pipe = intel_get_pipe_from_connector(connector); 1040 u32 pwm_ctl, val; 1041 1042 /* Controller 1 uses the utility pin. */ 1043 if (panel->backlight.controller == 1) { 1044 val = I915_READ(UTIL_PIN_CTL); 1045 if (val & UTIL_PIN_ENABLE) { 1046 DRM_DEBUG_KMS("util pin already enabled\n"); 1047 val &= ~UTIL_PIN_ENABLE; 1048 I915_WRITE(UTIL_PIN_CTL, val); 1049 } 1050 1051 val = 0; 1052 if (panel->backlight.util_pin_active_low) 1053 val |= UTIL_PIN_POLARITY; 1054 I915_WRITE(UTIL_PIN_CTL, val | UTIL_PIN_PIPE(pipe) | 1055 UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE); 1056 } 1057 1058 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller)); 1059 if (pwm_ctl & BXT_BLC_PWM_ENABLE) { 1060 DRM_DEBUG_KMS("backlight already enabled\n"); 1061 pwm_ctl &= ~BXT_BLC_PWM_ENABLE; 1062 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), 1063 pwm_ctl); 1064 } 1065 1066 I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller), 1067 panel->backlight.max); 1068 1069 intel_panel_actually_set_backlight(connector, panel->backlight.level); 1070 1071 pwm_ctl = 0; 1072 if (panel->backlight.active_low_pwm) 1073 pwm_ctl |= BXT_BLC_PWM_POLARITY; 1074 1075 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), pwm_ctl); 1076 POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller)); 1077 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), 1078 pwm_ctl | BXT_BLC_PWM_ENABLE); 1079 } 1080 1081 static void pwm_enable_backlight(struct intel_connector *connector) 1082 { 1083 struct intel_panel *panel = &connector->panel; 1084 1085 pwm_enable(panel->backlight.pwm); 1086 intel_panel_actually_set_backlight(connector, panel->backlight.level); 1087 } 1088 1089 void intel_panel_enable_backlight(struct intel_connector *connector) 1090 { 1091 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1092 struct intel_panel *panel = &connector->panel; 1093 enum i915_pipe pipe = intel_get_pipe_from_connector(connector); 1094 1095 if (!panel->backlight.present) 1096 return; 1097 1098 DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe)); 1099 1100 mutex_lock(&dev_priv->backlight_lock); 1101 1102 WARN_ON(panel->backlight.max == 0); 1103 1104 if (panel->backlight.level <= panel->backlight.min) { 1105 panel->backlight.level = panel->backlight.max; 1106 if (panel->backlight.device) 1107 panel->backlight.device->props.brightness = 1108 scale_hw_to_user(connector, 1109 panel->backlight.level, 1110 panel->backlight.device->props.max_brightness); 1111 } 1112 1113 panel->backlight.enable(connector); 1114 panel->backlight.enabled = true; 1115 if (panel->backlight.device) 1116 panel->backlight.device->props.power = FB_BLANK_UNBLANK; 1117 1118 mutex_unlock(&dev_priv->backlight_lock); 1119 } 1120 1121 #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE) 1122 #if 0 /* unused */ 1123 static int intel_backlight_device_update_status(struct backlight_device *bd) 1124 { 1125 struct intel_connector *connector = bl_get_data(bd); 1126 struct intel_panel *panel = &connector->panel; 1127 struct drm_device *dev = connector->base.dev; 1128 1129 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); 1130 DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n", 1131 bd->props.brightness, bd->props.max_brightness); 1132 intel_panel_set_backlight(connector, bd->props.brightness, 1133 bd->props.max_brightness); 1134 1135 /* 1136 * Allow flipping bl_power as a sub-state of enabled. Sadly the 1137 * backlight class device does not make it easy to to differentiate 1138 * between callbacks for brightness and bl_power, so our backlight_power 1139 * callback needs to take this into account. 1140 */ 1141 if (panel->backlight.enabled) { 1142 if (panel->backlight.power) { 1143 bool enable = bd->props.power == FB_BLANK_UNBLANK && 1144 bd->props.brightness != 0; 1145 panel->backlight.power(connector, enable); 1146 } 1147 } else { 1148 bd->props.power = FB_BLANK_POWERDOWN; 1149 } 1150 1151 drm_modeset_unlock(&dev->mode_config.connection_mutex); 1152 return 0; 1153 } 1154 1155 static int intel_backlight_device_get_brightness(struct backlight_device *bd) 1156 { 1157 struct intel_connector *connector = bl_get_data(bd); 1158 struct drm_device *dev = connector->base.dev; 1159 struct drm_i915_private *dev_priv = to_i915(dev); 1160 u32 hw_level; 1161 int ret; 1162 1163 intel_runtime_pm_get(dev_priv); 1164 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); 1165 1166 hw_level = intel_panel_get_backlight(connector); 1167 ret = scale_hw_to_user(connector, hw_level, bd->props.max_brightness); 1168 1169 drm_modeset_unlock(&dev->mode_config.connection_mutex); 1170 intel_runtime_pm_put(dev_priv); 1171 1172 return ret; 1173 } 1174 1175 static const struct backlight_ops intel_backlight_device_ops = { 1176 .update_status = intel_backlight_device_update_status, 1177 .get_brightness = intel_backlight_device_get_brightness, 1178 }; 1179 #endif 1180 1181 int intel_backlight_device_register(struct intel_connector *connector) 1182 { 1183 struct intel_panel *panel = &connector->panel; 1184 struct backlight_properties props; 1185 1186 if (WARN_ON(panel->backlight.device)) 1187 return -ENODEV; 1188 1189 if (!panel->backlight.present) 1190 return 0; 1191 1192 WARN_ON(panel->backlight.max == 0); 1193 1194 memset(&props, 0, sizeof(props)); 1195 props.type = BACKLIGHT_RAW; 1196 1197 /* 1198 * Note: Everything should work even if the backlight device max 1199 * presented to the userspace is arbitrarily chosen. 1200 */ 1201 props.max_brightness = panel->backlight.max; 1202 props.brightness = scale_hw_to_user(connector, 1203 panel->backlight.level, 1204 props.max_brightness); 1205 1206 if (panel->backlight.enabled) 1207 props.power = FB_BLANK_UNBLANK; 1208 else 1209 props.power = FB_BLANK_POWERDOWN; 1210 1211 /* 1212 * Note: using the same name independent of the connector prevents 1213 * registration of multiple backlight devices in the driver. 1214 */ 1215 #if 0 1216 panel->backlight.device = 1217 backlight_device_register("intel_backlight", 1218 connector->base.kdev, 1219 connector, 1220 &intel_backlight_device_ops, &props); 1221 1222 if (IS_ERR(panel->backlight.device)) { 1223 DRM_ERROR("Failed to register backlight: %ld\n", 1224 PTR_ERR(panel->backlight.device)); 1225 panel->backlight.device = NULL; 1226 return -ENODEV; 1227 } 1228 1229 DRM_DEBUG_KMS("Connector %s backlight sysfs interface registered\n", 1230 connector->base.name); 1231 #endif 1232 1233 return 0; 1234 } 1235 1236 void intel_backlight_device_unregister(struct intel_connector *connector) 1237 { 1238 #if 0 1239 struct intel_panel *panel = &connector->panel; 1240 1241 if (panel->backlight.device) { 1242 backlight_device_unregister(panel->backlight.device); 1243 panel->backlight.device = NULL; 1244 } 1245 #endif 1246 } 1247 #endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */ 1248 1249 /* 1250 * BXT: PWM clock frequency = 19.2 MHz. 1251 */ 1252 static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1253 { 1254 return DIV_ROUND_CLOSEST(KHz(19200), pwm_freq_hz); 1255 } 1256 1257 /* 1258 * SPT: This value represents the period of the PWM stream in clock periods 1259 * multiplied by 16 (default increment) or 128 (alternate increment selected in 1260 * SCHICKEN_1 bit 0). PWM clock is 24 MHz. 1261 */ 1262 static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1263 { 1264 struct intel_panel *panel = &connector->panel; 1265 u32 mul; 1266 1267 if (panel->backlight.alternate_pwm_increment) 1268 mul = 128; 1269 else 1270 mul = 16; 1271 1272 return DIV_ROUND_CLOSEST(MHz(24), pwm_freq_hz * mul); 1273 } 1274 1275 /* 1276 * LPT: This value represents the period of the PWM stream in clock periods 1277 * multiplied by 128 (default increment) or 16 (alternate increment, selected in 1278 * LPT SOUTH_CHICKEN2 register bit 5). 1279 */ 1280 static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1281 { 1282 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1283 struct intel_panel *panel = &connector->panel; 1284 u32 mul, clock; 1285 1286 if (panel->backlight.alternate_pwm_increment) 1287 mul = 16; 1288 else 1289 mul = 128; 1290 1291 if (HAS_PCH_LPT_H(dev_priv)) 1292 clock = MHz(135); /* LPT:H */ 1293 else 1294 clock = MHz(24); /* LPT:LP */ 1295 1296 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul); 1297 } 1298 1299 /* 1300 * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH 1301 * display raw clocks multiplied by 128. 1302 */ 1303 static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1304 { 1305 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1306 1307 return DIV_ROUND_CLOSEST(KHz(dev_priv->rawclk_freq), pwm_freq_hz * 128); 1308 } 1309 1310 /* 1311 * Gen2: This field determines the number of time base events (display core 1312 * clock frequency/32) in total for a complete cycle of modulated backlight 1313 * control. 1314 * 1315 * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock) 1316 * divided by 32. 1317 */ 1318 static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1319 { 1320 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1321 int clock; 1322 1323 if (IS_PINEVIEW(dev_priv)) 1324 clock = KHz(dev_priv->rawclk_freq); 1325 else 1326 clock = KHz(dev_priv->cdclk.hw.cdclk); 1327 1328 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 32); 1329 } 1330 1331 /* 1332 * Gen4: This value represents the period of the PWM stream in display core 1333 * clocks ([DevCTG] HRAW clocks) multiplied by 128. 1334 * 1335 */ 1336 static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1337 { 1338 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1339 int clock; 1340 1341 if (IS_G4X(dev_priv)) 1342 clock = KHz(dev_priv->rawclk_freq); 1343 else 1344 clock = KHz(dev_priv->cdclk.hw.cdclk); 1345 1346 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 128); 1347 } 1348 1349 /* 1350 * VLV: This value represents the period of the PWM stream in display core 1351 * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks 1352 * multiplied by 16. CHV uses a 19.2MHz S0IX clock. 1353 */ 1354 static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1355 { 1356 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1357 int mul, clock; 1358 1359 if ((I915_READ(CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) { 1360 if (IS_CHERRYVIEW(dev_priv)) 1361 clock = KHz(19200); 1362 else 1363 clock = MHz(25); 1364 mul = 16; 1365 } else { 1366 clock = KHz(dev_priv->rawclk_freq); 1367 mul = 128; 1368 } 1369 1370 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul); 1371 } 1372 1373 static u32 get_backlight_max_vbt(struct intel_connector *connector) 1374 { 1375 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1376 struct intel_panel *panel = &connector->panel; 1377 u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz; 1378 u32 pwm; 1379 1380 if (!panel->backlight.hz_to_pwm) { 1381 DRM_DEBUG_KMS("backlight frequency conversion not supported\n"); 1382 return 0; 1383 } 1384 1385 if (pwm_freq_hz) { 1386 DRM_DEBUG_KMS("VBT defined backlight frequency %u Hz\n", 1387 pwm_freq_hz); 1388 } else { 1389 pwm_freq_hz = 200; 1390 DRM_DEBUG_KMS("default backlight frequency %u Hz\n", 1391 pwm_freq_hz); 1392 } 1393 1394 pwm = panel->backlight.hz_to_pwm(connector, pwm_freq_hz); 1395 if (!pwm) { 1396 DRM_DEBUG_KMS("backlight frequency conversion failed\n"); 1397 return 0; 1398 } 1399 1400 return pwm; 1401 } 1402 1403 /* 1404 * Note: The setup hooks can't assume pipe is set! 1405 */ 1406 static u32 get_backlight_min_vbt(struct intel_connector *connector) 1407 { 1408 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1409 struct intel_panel *panel = &connector->panel; 1410 int min; 1411 1412 WARN_ON(panel->backlight.max == 0); 1413 1414 /* 1415 * XXX: If the vbt value is 255, it makes min equal to max, which leads 1416 * to problems. There are such machines out there. Either our 1417 * interpretation is wrong or the vbt has bogus data. Or both. Safeguard 1418 * against this by letting the minimum be at most (arbitrarily chosen) 1419 * 25% of the max. 1420 */ 1421 min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64); 1422 if (min != dev_priv->vbt.backlight.min_brightness) { 1423 DRM_DEBUG_KMS("clamping VBT min backlight %d/255 to %d/255\n", 1424 dev_priv->vbt.backlight.min_brightness, min); 1425 } 1426 1427 /* vbt value is a coefficient in range [0..255] */ 1428 return scale(min, 0, 255, 0, panel->backlight.max); 1429 } 1430 1431 static int lpt_setup_backlight(struct intel_connector *connector, enum i915_pipe unused) 1432 { 1433 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1434 struct intel_panel *panel = &connector->panel; 1435 u32 pch_ctl1, pch_ctl2, val; 1436 bool alt; 1437 1438 if (HAS_PCH_LPT(dev_priv)) 1439 alt = I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY; 1440 else 1441 alt = I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY; 1442 panel->backlight.alternate_pwm_increment = alt; 1443 1444 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); 1445 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; 1446 1447 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2); 1448 panel->backlight.max = pch_ctl2 >> 16; 1449 1450 if (!panel->backlight.max) 1451 panel->backlight.max = get_backlight_max_vbt(connector); 1452 1453 if (!panel->backlight.max) 1454 return -ENODEV; 1455 1456 panel->backlight.min = get_backlight_min_vbt(connector); 1457 1458 val = lpt_get_backlight(connector); 1459 val = intel_panel_compute_brightness(connector, val); 1460 panel->backlight.level = clamp(val, panel->backlight.min, 1461 panel->backlight.max); 1462 1463 panel->backlight.enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE; 1464 1465 return 0; 1466 } 1467 1468 static int pch_setup_backlight(struct intel_connector *connector, enum i915_pipe unused) 1469 { 1470 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1471 struct intel_panel *panel = &connector->panel; 1472 u32 cpu_ctl2, pch_ctl1, pch_ctl2, val; 1473 1474 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); 1475 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; 1476 1477 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2); 1478 panel->backlight.max = pch_ctl2 >> 16; 1479 1480 if (!panel->backlight.max) 1481 panel->backlight.max = get_backlight_max_vbt(connector); 1482 1483 if (!panel->backlight.max) 1484 return -ENODEV; 1485 1486 panel->backlight.min = get_backlight_min_vbt(connector); 1487 1488 val = pch_get_backlight(connector); 1489 val = intel_panel_compute_brightness(connector, val); 1490 panel->backlight.level = clamp(val, panel->backlight.min, 1491 panel->backlight.max); 1492 1493 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2); 1494 panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) && 1495 (pch_ctl1 & BLM_PCH_PWM_ENABLE); 1496 1497 return 0; 1498 } 1499 1500 static int i9xx_setup_backlight(struct intel_connector *connector, enum i915_pipe unused) 1501 { 1502 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1503 struct intel_panel *panel = &connector->panel; 1504 u32 ctl, val; 1505 1506 ctl = I915_READ(BLC_PWM_CTL); 1507 1508 if (IS_GEN2(dev_priv) || IS_I915GM(dev_priv) || IS_I945GM(dev_priv)) 1509 panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE; 1510 1511 if (IS_PINEVIEW(dev_priv)) 1512 panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV; 1513 1514 panel->backlight.max = ctl >> 17; 1515 1516 if (!panel->backlight.max) { 1517 panel->backlight.max = get_backlight_max_vbt(connector); 1518 panel->backlight.max >>= 1; 1519 } 1520 1521 if (!panel->backlight.max) 1522 return -ENODEV; 1523 1524 if (panel->backlight.combination_mode) 1525 panel->backlight.max *= 0xff; 1526 1527 panel->backlight.min = get_backlight_min_vbt(connector); 1528 1529 val = i9xx_get_backlight(connector); 1530 val = intel_panel_compute_brightness(connector, val); 1531 panel->backlight.level = clamp(val, panel->backlight.min, 1532 panel->backlight.max); 1533 1534 panel->backlight.enabled = val != 0; 1535 1536 return 0; 1537 } 1538 1539 static int i965_setup_backlight(struct intel_connector *connector, enum i915_pipe unused) 1540 { 1541 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1542 struct intel_panel *panel = &connector->panel; 1543 u32 ctl, ctl2, val; 1544 1545 ctl2 = I915_READ(BLC_PWM_CTL2); 1546 panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE; 1547 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965; 1548 1549 ctl = I915_READ(BLC_PWM_CTL); 1550 panel->backlight.max = ctl >> 16; 1551 1552 if (!panel->backlight.max) 1553 panel->backlight.max = get_backlight_max_vbt(connector); 1554 1555 if (!panel->backlight.max) 1556 return -ENODEV; 1557 1558 if (panel->backlight.combination_mode) 1559 panel->backlight.max *= 0xff; 1560 1561 panel->backlight.min = get_backlight_min_vbt(connector); 1562 1563 val = i9xx_get_backlight(connector); 1564 val = intel_panel_compute_brightness(connector, val); 1565 panel->backlight.level = clamp(val, panel->backlight.min, 1566 panel->backlight.max); 1567 1568 panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE; 1569 1570 return 0; 1571 } 1572 1573 static int vlv_setup_backlight(struct intel_connector *connector, enum i915_pipe pipe) 1574 { 1575 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1576 struct intel_panel *panel = &connector->panel; 1577 u32 ctl, ctl2, val; 1578 1579 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B)) 1580 return -ENODEV; 1581 1582 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe)); 1583 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965; 1584 1585 ctl = I915_READ(VLV_BLC_PWM_CTL(pipe)); 1586 panel->backlight.max = ctl >> 16; 1587 1588 if (!panel->backlight.max) 1589 panel->backlight.max = get_backlight_max_vbt(connector); 1590 1591 if (!panel->backlight.max) 1592 return -ENODEV; 1593 1594 panel->backlight.min = get_backlight_min_vbt(connector); 1595 1596 val = _vlv_get_backlight(dev_priv, pipe); 1597 val = intel_panel_compute_brightness(connector, val); 1598 panel->backlight.level = clamp(val, panel->backlight.min, 1599 panel->backlight.max); 1600 1601 panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE; 1602 1603 return 0; 1604 } 1605 1606 static int 1607 bxt_setup_backlight(struct intel_connector *connector, enum i915_pipe unused) 1608 { 1609 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1610 struct intel_panel *panel = &connector->panel; 1611 u32 pwm_ctl, val; 1612 1613 panel->backlight.controller = dev_priv->vbt.backlight.controller; 1614 1615 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller)); 1616 1617 /* Controller 1 uses the utility pin. */ 1618 if (panel->backlight.controller == 1) { 1619 val = I915_READ(UTIL_PIN_CTL); 1620 panel->backlight.util_pin_active_low = 1621 val & UTIL_PIN_POLARITY; 1622 } 1623 1624 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY; 1625 panel->backlight.max = 1626 I915_READ(BXT_BLC_PWM_FREQ(panel->backlight.controller)); 1627 1628 if (!panel->backlight.max) 1629 panel->backlight.max = get_backlight_max_vbt(connector); 1630 1631 if (!panel->backlight.max) 1632 return -ENODEV; 1633 1634 val = bxt_get_backlight(connector); 1635 val = intel_panel_compute_brightness(connector, val); 1636 panel->backlight.level = clamp(val, panel->backlight.min, 1637 panel->backlight.max); 1638 1639 panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE; 1640 1641 return 0; 1642 } 1643 1644 static int pwm_setup_backlight(struct intel_connector *connector, 1645 enum i915_pipe pipe) 1646 { 1647 struct drm_device *dev = connector->base.dev; 1648 struct intel_panel *panel = &connector->panel; 1649 int retval; 1650 1651 /* Get the PWM chip for backlight control */ 1652 panel->backlight.pwm = pwm_get(dev->dev, "pwm_backlight"); 1653 if (IS_ERR(panel->backlight.pwm)) { 1654 DRM_ERROR("Failed to own the pwm chip\n"); 1655 panel->backlight.pwm = NULL; 1656 return -ENODEV; 1657 } 1658 1659 /* 1660 * FIXME: pwm_apply_args() should be removed when switching to 1661 * the atomic PWM API. 1662 */ 1663 #if 0 1664 pwm_apply_args(panel->backlight.pwm); 1665 #endif 1666 1667 retval = pwm_config(panel->backlight.pwm, CRC_PMIC_PWM_PERIOD_NS, 1668 CRC_PMIC_PWM_PERIOD_NS); 1669 if (retval < 0) { 1670 DRM_ERROR("Failed to configure the pwm chip\n"); 1671 pwm_put(panel->backlight.pwm); 1672 panel->backlight.pwm = NULL; 1673 return retval; 1674 } 1675 1676 panel->backlight.min = 0; /* 0% */ 1677 panel->backlight.max = 100; /* 100% */ 1678 panel->backlight.level = DIV_ROUND_UP( 1679 pwm_get_duty_cycle(panel->backlight.pwm) * 100, 1680 CRC_PMIC_PWM_PERIOD_NS); 1681 panel->backlight.enabled = panel->backlight.level != 0; 1682 1683 return 0; 1684 } 1685 1686 #ifdef __DragonFly__ 1687 /* 1688 * Read max backlight level 1689 */ 1690 static int 1691 sysctl_backlight_max(SYSCTL_HANDLER_ARGS) 1692 { 1693 int err, val; 1694 struct intel_connector *connector = arg1; 1695 struct drm_device *dev = connector->base.dev; 1696 struct drm_i915_private *dev_priv = dev->dev_private; 1697 struct intel_panel *panel = &connector->panel; 1698 1699 mutex_lock(&dev_priv->backlight_lock); 1700 val = panel->backlight.max; 1701 mutex_unlock(&dev_priv->backlight_lock); 1702 1703 err = sysctl_handle_int(oidp, &val, 0, req); 1704 return(err); 1705 } 1706 1707 /* 1708 * Read/write backlight level 1709 */ 1710 static int 1711 sysctl_backlight_handler(SYSCTL_HANDLER_ARGS) 1712 { 1713 struct intel_connector *connector = arg1; 1714 struct drm_device *dev = connector->base.dev; 1715 struct drm_i915_private *dev_priv = dev->dev_private; 1716 struct intel_panel *panel = &connector->panel; 1717 int err, val; 1718 u32 user_level, max_brightness; 1719 1720 mutex_lock(&dev_priv->backlight_lock); 1721 max_brightness = panel->backlight.max; 1722 user_level = scale_hw_to_user(connector, panel->backlight.level, 1723 max_brightness); 1724 mutex_unlock(&dev_priv->backlight_lock); 1725 1726 val = user_level; 1727 err = sysctl_handle_int(oidp, &val, 0, req); 1728 if (err != 0 || req->newptr == NULL) { 1729 return(err); 1730 } 1731 1732 if (val != user_level && val >= 0 && val <= max_brightness) { 1733 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); 1734 intel_panel_set_backlight(arg1, val, max_brightness); 1735 drm_modeset_unlock(&dev->mode_config.connection_mutex); 1736 } 1737 1738 return(err); 1739 } 1740 #endif /* __DragonFly__ */ 1741 1742 int intel_panel_setup_backlight(struct drm_connector *connector, enum i915_pipe pipe) 1743 { 1744 struct drm_i915_private *dev_priv = to_i915(connector->dev); 1745 struct intel_connector *intel_connector = to_intel_connector(connector); 1746 struct intel_panel *panel = &intel_connector->panel; 1747 int ret; 1748 1749 if (!dev_priv->vbt.backlight.present) { 1750 if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) { 1751 DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n"); 1752 } else { 1753 DRM_DEBUG_KMS("no backlight present per VBT\n"); 1754 return 0; 1755 } 1756 } 1757 1758 /* ensure intel_panel has been initialized first */ 1759 if (WARN_ON(!panel->backlight.setup)) 1760 return -ENODEV; 1761 1762 /* set level and max in panel struct */ 1763 mutex_lock(&dev_priv->backlight_lock); 1764 ret = panel->backlight.setup(intel_connector, pipe); 1765 mutex_unlock(&dev_priv->backlight_lock); 1766 1767 if (ret) { 1768 DRM_DEBUG_KMS("failed to setup backlight for connector %s\n", 1769 connector->name); 1770 return ret; 1771 } 1772 1773 panel->backlight.present = true; 1774 1775 #ifdef __DragonFly__ 1776 SYSCTL_ADD_PROC(&connector->dev->sysctl->ctx, &sysctl__hw_children, 1777 OID_AUTO, "backlight_max", 1778 CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_ANYBODY, 1779 connector, sizeof(int), 1780 sysctl_backlight_max, 1781 "I", "Max backlight level"); 1782 SYSCTL_ADD_PROC(&connector->dev->sysctl->ctx, &sysctl__hw_children, 1783 OID_AUTO, "backlight_level", 1784 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_ANYBODY, 1785 connector, sizeof(int), 1786 sysctl_backlight_handler, 1787 "I", "Backlight level"); 1788 #endif 1789 1790 DRM_DEBUG_KMS("Connector %s backlight initialized, %s, brightness %u/%u\n", 1791 connector->name, 1792 enableddisabled(panel->backlight.enabled), 1793 panel->backlight.level, panel->backlight.max); 1794 1795 return 0; 1796 } 1797 1798 void intel_panel_destroy_backlight(struct drm_connector *connector) 1799 { 1800 struct intel_connector *intel_connector = to_intel_connector(connector); 1801 struct intel_panel *panel = &intel_connector->panel; 1802 1803 /* dispose of the pwm */ 1804 if (panel->backlight.pwm) 1805 pwm_put(panel->backlight.pwm); 1806 1807 panel->backlight.present = false; 1808 } 1809 1810 /* Set up chip specific backlight functions */ 1811 static void 1812 intel_panel_init_backlight_funcs(struct intel_panel *panel) 1813 { 1814 struct intel_connector *connector = 1815 container_of(panel, struct intel_connector, panel); 1816 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1817 1818 if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP && 1819 intel_dp_aux_init_backlight_funcs(connector) == 0) 1820 return; 1821 1822 if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI && 1823 intel_dsi_dcs_init_backlight_funcs(connector) == 0) 1824 return; 1825 1826 if (IS_GEN9_LP(dev_priv)) { 1827 panel->backlight.setup = bxt_setup_backlight; 1828 panel->backlight.enable = bxt_enable_backlight; 1829 panel->backlight.disable = bxt_disable_backlight; 1830 panel->backlight.set = bxt_set_backlight; 1831 panel->backlight.get = bxt_get_backlight; 1832 panel->backlight.hz_to_pwm = bxt_hz_to_pwm; 1833 } else if (HAS_PCH_LPT(dev_priv) || HAS_PCH_SPT(dev_priv) || 1834 HAS_PCH_KBP(dev_priv)) { 1835 panel->backlight.setup = lpt_setup_backlight; 1836 panel->backlight.enable = lpt_enable_backlight; 1837 panel->backlight.disable = lpt_disable_backlight; 1838 panel->backlight.set = lpt_set_backlight; 1839 panel->backlight.get = lpt_get_backlight; 1840 if (HAS_PCH_LPT(dev_priv)) 1841 panel->backlight.hz_to_pwm = lpt_hz_to_pwm; 1842 else 1843 panel->backlight.hz_to_pwm = spt_hz_to_pwm; 1844 } else if (HAS_PCH_SPLIT(dev_priv)) { 1845 panel->backlight.setup = pch_setup_backlight; 1846 panel->backlight.enable = pch_enable_backlight; 1847 panel->backlight.disable = pch_disable_backlight; 1848 panel->backlight.set = pch_set_backlight; 1849 panel->backlight.get = pch_get_backlight; 1850 panel->backlight.hz_to_pwm = pch_hz_to_pwm; 1851 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { 1852 if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI) { 1853 panel->backlight.setup = pwm_setup_backlight; 1854 panel->backlight.enable = pwm_enable_backlight; 1855 panel->backlight.disable = pwm_disable_backlight; 1856 panel->backlight.set = pwm_set_backlight; 1857 panel->backlight.get = pwm_get_backlight; 1858 } else { 1859 panel->backlight.setup = vlv_setup_backlight; 1860 panel->backlight.enable = vlv_enable_backlight; 1861 panel->backlight.disable = vlv_disable_backlight; 1862 panel->backlight.set = vlv_set_backlight; 1863 panel->backlight.get = vlv_get_backlight; 1864 panel->backlight.hz_to_pwm = vlv_hz_to_pwm; 1865 } 1866 } else if (IS_GEN4(dev_priv)) { 1867 panel->backlight.setup = i965_setup_backlight; 1868 panel->backlight.enable = i965_enable_backlight; 1869 panel->backlight.disable = i965_disable_backlight; 1870 panel->backlight.set = i9xx_set_backlight; 1871 panel->backlight.get = i9xx_get_backlight; 1872 panel->backlight.hz_to_pwm = i965_hz_to_pwm; 1873 } else { 1874 panel->backlight.setup = i9xx_setup_backlight; 1875 panel->backlight.enable = i9xx_enable_backlight; 1876 panel->backlight.disable = i9xx_disable_backlight; 1877 panel->backlight.set = i9xx_set_backlight; 1878 panel->backlight.get = i9xx_get_backlight; 1879 panel->backlight.hz_to_pwm = i9xx_hz_to_pwm; 1880 } 1881 } 1882 1883 int intel_panel_init(struct intel_panel *panel, 1884 struct drm_display_mode *fixed_mode, 1885 struct drm_display_mode *downclock_mode) 1886 { 1887 intel_panel_init_backlight_funcs(panel); 1888 1889 panel->fixed_mode = fixed_mode; 1890 panel->downclock_mode = downclock_mode; 1891 1892 return 0; 1893 } 1894 1895 void intel_panel_fini(struct intel_panel *panel) 1896 { 1897 struct intel_connector *intel_connector = 1898 container_of(panel, struct intel_connector, panel); 1899 1900 if (panel->fixed_mode) 1901 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode); 1902 1903 if (panel->downclock_mode) 1904 drm_mode_destroy(intel_connector->base.dev, 1905 panel->downclock_mode); 1906 } 1907