1 /* 2 * Copyright 2006 Dave Airlie <airlied@linux.ie> 3 * Copyright © 2006-2007 Intel Corporation 4 * Jesse Barnes <jesse.barnes@intel.com> 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the next 14 * paragraph) shall be included in all copies or substantial portions of the 15 * Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 23 * DEALINGS IN THE SOFTWARE. 24 * 25 * Authors: 26 * Eric Anholt <eric@anholt.net> 27 */ 28 #include <linux/i2c.h> 29 #include <linux/delay.h> 30 #include <linux/export.h> 31 #include <drm/drmP.h> 32 #include <drm/drm_crtc.h> 33 #include <drm/drm_edid.h> 34 #include "intel_drv.h" 35 #include <drm/i915_drm.h> 36 #include "i915_drv.h" 37 #include "intel_sdvo_regs.h" 38 39 #include <bus/iicbus/iic.h> 40 #include <bus/iicbus/iiconf.h> 41 #include "iicbus_if.h" 42 43 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1) 44 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1) 45 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1) 46 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0) 47 48 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\ 49 SDVO_TV_MASK) 50 51 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK) 52 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK) 53 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK) 54 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK)) 55 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK)) 56 57 58 static const char *tv_format_names[] = { 59 "NTSC_M" , "NTSC_J" , "NTSC_443", 60 "PAL_B" , "PAL_D" , "PAL_G" , 61 "PAL_H" , "PAL_I" , "PAL_M" , 62 "PAL_N" , "PAL_NC" , "PAL_60" , 63 "SECAM_B" , "SECAM_D" , "SECAM_G" , 64 "SECAM_K" , "SECAM_K1", "SECAM_L" , 65 "SECAM_60" 66 }; 67 68 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names)) 69 70 struct intel_sdvo { 71 struct intel_encoder base; 72 73 struct device *i2c; 74 u8 slave_addr; 75 76 device_t ddc_iic_bus, ddc; 77 78 /* Register for the SDVO device: SDVOB or SDVOC */ 79 uint32_t sdvo_reg; 80 81 /* Active outputs controlled by this SDVO output */ 82 uint16_t controlled_output; 83 84 /* 85 * Capabilities of the SDVO device returned by 86 * i830_sdvo_get_capabilities() 87 */ 88 struct intel_sdvo_caps caps; 89 90 /* Pixel clock limitations reported by the SDVO device, in kHz */ 91 int pixel_clock_min, pixel_clock_max; 92 93 /* 94 * For multiple function SDVO device, 95 * this is for current attached outputs. 96 */ 97 uint16_t attached_output; 98 99 /* 100 * Hotplug activation bits for this device 101 */ 102 uint16_t hotplug_active; 103 104 /** 105 * This is used to select the color range of RBG outputs in HDMI mode. 106 * It is only valid when using TMDS encoding and 8 bit per color mode. 107 */ 108 uint32_t color_range; 109 bool color_range_auto; 110 111 /** 112 * This is set if we're going to treat the device as TV-out. 113 * 114 * While we have these nice friendly flags for output types that ought 115 * to decide this for us, the S-Video output on our HDMI+S-Video card 116 * shows up as RGB1 (VGA). 117 */ 118 bool is_tv; 119 120 /* On different gens SDVOB is at different places. */ 121 bool is_sdvob; 122 123 /* This is for current tv format name */ 124 int tv_format_index; 125 126 /** 127 * This is set if we treat the device as HDMI, instead of DVI. 128 */ 129 bool is_hdmi; 130 bool has_hdmi_monitor; 131 bool has_hdmi_audio; 132 bool rgb_quant_range_selectable; 133 134 /** 135 * This is set if we detect output of sdvo device as LVDS and 136 * have a valid fixed mode to use with the panel. 137 */ 138 bool is_lvds; 139 140 /** 141 * This is sdvo fixed pannel mode pointer 142 */ 143 struct drm_display_mode *sdvo_lvds_fixed_mode; 144 145 /* DDC bus used by this SDVO encoder */ 146 uint8_t ddc_bus; 147 148 /* 149 * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd 150 */ 151 uint8_t dtd_sdvo_flags; 152 }; 153 154 struct intel_sdvo_connector { 155 struct intel_connector base; 156 157 /* Mark the type of connector */ 158 uint16_t output_flag; 159 160 enum hdmi_force_audio force_audio; 161 162 /* This contains all current supported TV format */ 163 u8 tv_format_supported[TV_FORMAT_NUM]; 164 int format_supported_num; 165 struct drm_property *tv_format; 166 167 /* add the property for the SDVO-TV */ 168 struct drm_property *left; 169 struct drm_property *right; 170 struct drm_property *top; 171 struct drm_property *bottom; 172 struct drm_property *hpos; 173 struct drm_property *vpos; 174 struct drm_property *contrast; 175 struct drm_property *saturation; 176 struct drm_property *hue; 177 struct drm_property *sharpness; 178 struct drm_property *flicker_filter; 179 struct drm_property *flicker_filter_adaptive; 180 struct drm_property *flicker_filter_2d; 181 struct drm_property *tv_chroma_filter; 182 struct drm_property *tv_luma_filter; 183 struct drm_property *dot_crawl; 184 185 /* add the property for the SDVO-TV/LVDS */ 186 struct drm_property *brightness; 187 188 /* Add variable to record current setting for the above property */ 189 u32 left_margin, right_margin, top_margin, bottom_margin; 190 191 /* this is to get the range of margin.*/ 192 u32 max_hscan, max_vscan; 193 u32 max_hpos, cur_hpos; 194 u32 max_vpos, cur_vpos; 195 u32 cur_brightness, max_brightness; 196 u32 cur_contrast, max_contrast; 197 u32 cur_saturation, max_saturation; 198 u32 cur_hue, max_hue; 199 u32 cur_sharpness, max_sharpness; 200 u32 cur_flicker_filter, max_flicker_filter; 201 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive; 202 u32 cur_flicker_filter_2d, max_flicker_filter_2d; 203 u32 cur_tv_chroma_filter, max_tv_chroma_filter; 204 u32 cur_tv_luma_filter, max_tv_luma_filter; 205 u32 cur_dot_crawl, max_dot_crawl; 206 }; 207 208 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder) 209 { 210 return container_of(encoder, struct intel_sdvo, base.base); 211 } 212 213 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector) 214 { 215 return container_of(intel_attached_encoder(connector), 216 struct intel_sdvo, base); 217 } 218 219 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector) 220 { 221 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base); 222 } 223 224 static bool 225 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags); 226 static bool 227 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo, 228 struct intel_sdvo_connector *intel_sdvo_connector, 229 int type); 230 static bool 231 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo, 232 struct intel_sdvo_connector *intel_sdvo_connector); 233 234 /** 235 * Writes the SDVOB or SDVOC with the given value, but always writes both 236 * SDVOB and SDVOC to work around apparent hardware issues (according to 237 * comments in the BIOS). 238 */ 239 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val) 240 { 241 struct drm_device *dev = intel_sdvo->base.base.dev; 242 struct drm_i915_private *dev_priv = dev->dev_private; 243 u32 bval = val, cval = val; 244 int i; 245 246 if (intel_sdvo->sdvo_reg == PCH_SDVOB) { 247 I915_WRITE(intel_sdvo->sdvo_reg, val); 248 I915_READ(intel_sdvo->sdvo_reg); 249 return; 250 } 251 252 if (intel_sdvo->sdvo_reg == GEN3_SDVOB) 253 cval = I915_READ(GEN3_SDVOC); 254 else 255 bval = I915_READ(GEN3_SDVOB); 256 257 /* 258 * Write the registers twice for luck. Sometimes, 259 * writing them only once doesn't appear to 'stick'. 260 * The BIOS does this too. Yay, magic 261 */ 262 for (i = 0; i < 2; i++) 263 { 264 I915_WRITE(GEN3_SDVOB, bval); 265 I915_READ(GEN3_SDVOB); 266 I915_WRITE(GEN3_SDVOC, cval); 267 I915_READ(GEN3_SDVOC); 268 } 269 } 270 271 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch) 272 { 273 struct i2c_msg msgs[] = { 274 { 275 .slave = intel_sdvo->slave_addr << 1, 276 .flags = 0, 277 .len = 1, 278 .buf = &addr, 279 }, 280 { 281 .slave = intel_sdvo->slave_addr << 1, 282 .flags = I2C_M_RD, 283 .len = 1, 284 .buf = ch, 285 } 286 }; 287 int ret; 288 289 if ((ret = iicbus_transfer(intel_sdvo->i2c, msgs, 2)) == 0) 290 return true; 291 292 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret); 293 return false; 294 } 295 296 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd} 297 /** Mapping of command numbers to names, for debug output */ 298 static const struct _sdvo_cmd_name { 299 u8 cmd; 300 const char *name; 301 } sdvo_cmd_names[] = { 302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET), 303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS), 304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV), 305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS), 306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS), 307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS), 308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP), 309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP), 310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS), 311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT), 312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG), 313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG), 314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE), 315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT), 316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT), 317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1), 318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2), 319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), 320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2), 321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), 322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1), 323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2), 324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1), 325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2), 326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING), 327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1), 328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2), 329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE), 330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE), 331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS), 332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT), 333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT), 334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS), 335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT), 336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT), 337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES), 338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE), 339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE), 340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE), 341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH), 342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT), 343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT), 344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS), 345 346 /* Add the op code for SDVO enhancements */ 347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS), 348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS), 349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS), 350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS), 351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS), 352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS), 353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION), 354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION), 355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION), 356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE), 357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE), 358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE), 359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST), 360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST), 361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST), 362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS), 363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS), 364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS), 365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H), 366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H), 367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H), 368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V), 369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V), 370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V), 371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER), 372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER), 373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER), 374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE), 375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE), 376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE), 377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D), 378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D), 379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D), 380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS), 381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS), 382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS), 383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL), 384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL), 385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER), 386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER), 387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER), 388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER), 389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER), 390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER), 391 392 /* HDMI op code */ 393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE), 394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE), 395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE), 396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI), 397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI), 398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP), 399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY), 400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY), 401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER), 402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT), 403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT), 404 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX), 405 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX), 406 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO), 407 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT), 408 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT), 409 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE), 410 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE), 411 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA), 412 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA), 413 }; 414 415 #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC") 416 417 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd, 418 const void *args, int args_len) 419 { 420 int i; 421 422 DRM_DEBUG_KMS("%s: W: %02X ", 423 SDVO_NAME(intel_sdvo), cmd); 424 for (i = 0; i < args_len; i++) 425 kprintf("%02X ", ((const u8 *)args)[i]); 426 for (; i < 8; i++) 427 DRM_LOG_KMS(" "); 428 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) { 429 if (cmd == sdvo_cmd_names[i].cmd) { 430 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name); 431 break; 432 } 433 } 434 if (i == ARRAY_SIZE(sdvo_cmd_names)) 435 DRM_LOG_KMS("(%02X)", cmd); 436 DRM_LOG_KMS("\n"); 437 } 438 439 static const char *cmd_status_names[] = { 440 "Power on", 441 "Success", 442 "Not supported", 443 "Invalid arg", 444 "Pending", 445 "Target not specified", 446 "Scaling not supported" 447 }; 448 449 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd, 450 const void *args, int args_len) 451 { 452 u8 *buf, status; 453 struct iic_msg msgs[args_len + 3]; 454 int i, ret = true; 455 456 /* Would be simpler to allocate both in one go ? */ 457 buf = kzalloc(args_len * 2 + 2, GFP_KERNEL); 458 if (!buf) 459 return false; 460 461 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len); 462 463 for (i = 0; i < args_len; i++) { 464 msgs[i].slave = intel_sdvo->slave_addr << 1; 465 msgs[i].flags = 0; 466 msgs[i].len = 2; 467 msgs[i].buf = buf + 2 *i; 468 buf[2*i + 0] = SDVO_I2C_ARG_0 - i; 469 buf[2*i + 1] = ((const u8*)args)[i]; 470 } 471 msgs[i].slave = intel_sdvo->slave_addr << 1; 472 msgs[i].flags = 0; 473 msgs[i].len = 2; 474 msgs[i].buf = buf + 2*i; 475 buf[2*i + 0] = SDVO_I2C_OPCODE; 476 buf[2*i + 1] = cmd; 477 478 /* the following two are to read the response */ 479 status = SDVO_I2C_CMD_STATUS; 480 msgs[i+1].slave = intel_sdvo->slave_addr << 1; 481 msgs[i+1].flags = 0; 482 msgs[i+1].len = 1; 483 msgs[i+1].buf = &status; 484 485 msgs[i+2].slave = intel_sdvo->slave_addr << 1; 486 msgs[i+2].flags = I2C_M_RD; 487 msgs[i+2].len = 1; 488 msgs[i+2].buf = &status; 489 490 ret = iicbus_transfer(intel_sdvo->i2c, msgs, i+3); 491 if (ret != 0) { 492 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret); 493 ret = false; 494 goto out; 495 } 496 #if 0 497 if (ret != i+3) { 498 /* failure in I2C transfer */ 499 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3); 500 ret = false; 501 } 502 #endif 503 504 out: 505 kfree(buf); 506 return ret; 507 } 508 509 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo, 510 void *response, int response_len) 511 { 512 u8 retry = 15; /* 5 quick checks, followed by 10 long checks */ 513 u8 status; 514 int i; 515 516 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo)); 517 518 /* 519 * The documentation states that all commands will be 520 * processed within 15µs, and that we need only poll 521 * the status byte a maximum of 3 times in order for the 522 * command to be complete. 523 * 524 * Check 5 times in case the hardware failed to read the docs. 525 * 526 * Also beware that the first response by many devices is to 527 * reply PENDING and stall for time. TVs are notorious for 528 * requiring longer than specified to complete their replies. 529 * Originally (in the DDX long ago), the delay was only ever 15ms 530 * with an additional delay of 30ms applied for TVs added later after 531 * many experiments. To accommodate both sets of delays, we do a 532 * sequence of slow checks if the device is falling behind and fails 533 * to reply within 5*15µs. 534 */ 535 if (!intel_sdvo_read_byte(intel_sdvo, 536 SDVO_I2C_CMD_STATUS, 537 &status)) 538 goto log_fail; 539 540 while (status == SDVO_CMD_STATUS_PENDING && --retry) { 541 if (retry < 10) 542 msleep(15); 543 else 544 udelay(15); 545 546 if (!intel_sdvo_read_byte(intel_sdvo, 547 SDVO_I2C_CMD_STATUS, 548 &status)) 549 goto log_fail; 550 } 551 552 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP) 553 DRM_LOG_KMS("(%s)", cmd_status_names[status]); 554 else 555 DRM_LOG_KMS("(??? %d)", status); 556 557 if (status != SDVO_CMD_STATUS_SUCCESS) 558 goto log_fail; 559 560 /* Read the command response */ 561 for (i = 0; i < response_len; i++) { 562 if (!intel_sdvo_read_byte(intel_sdvo, 563 SDVO_I2C_RETURN_0 + i, 564 &((u8 *)response)[i])) 565 goto log_fail; 566 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]); 567 } 568 DRM_LOG_KMS("\n"); 569 return true; 570 571 log_fail: 572 DRM_LOG_KMS("... failed\n"); 573 return false; 574 } 575 576 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode) 577 { 578 if (mode->clock >= 100000) 579 return 1; 580 else if (mode->clock >= 50000) 581 return 2; 582 else 583 return 4; 584 } 585 586 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo, 587 u8 ddc_bus) 588 { 589 /* This must be the immediately preceding write before the i2c xfer */ 590 return intel_sdvo_write_cmd(intel_sdvo, 591 SDVO_CMD_SET_CONTROL_BUS_SWITCH, 592 &ddc_bus, 1); 593 } 594 595 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len) 596 { 597 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len)) 598 return false; 599 600 return intel_sdvo_read_response(intel_sdvo, NULL, 0); 601 } 602 603 static bool 604 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len) 605 { 606 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0)) 607 return false; 608 609 return intel_sdvo_read_response(intel_sdvo, value, len); 610 } 611 612 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo) 613 { 614 struct intel_sdvo_set_target_input_args targets = {0}; 615 return intel_sdvo_set_value(intel_sdvo, 616 SDVO_CMD_SET_TARGET_INPUT, 617 &targets, sizeof(targets)); 618 } 619 620 /** 621 * Return whether each input is trained. 622 * 623 * This function is making an assumption about the layout of the response, 624 * which should be checked against the docs. 625 */ 626 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2) 627 { 628 struct intel_sdvo_get_trained_inputs_response response; 629 630 BUILD_BUG_ON(sizeof(response) != 1); 631 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS, 632 &response, sizeof(response))) 633 return false; 634 635 *input_1 = response.input0_trained; 636 *input_2 = response.input1_trained; 637 return true; 638 } 639 640 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo, 641 u16 outputs) 642 { 643 return intel_sdvo_set_value(intel_sdvo, 644 SDVO_CMD_SET_ACTIVE_OUTPUTS, 645 &outputs, sizeof(outputs)); 646 } 647 648 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo, 649 u16 *outputs) 650 { 651 return intel_sdvo_get_value(intel_sdvo, 652 SDVO_CMD_GET_ACTIVE_OUTPUTS, 653 outputs, sizeof(*outputs)); 654 } 655 656 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo, 657 int mode) 658 { 659 u8 state = SDVO_ENCODER_STATE_ON; 660 661 switch (mode) { 662 case DRM_MODE_DPMS_ON: 663 state = SDVO_ENCODER_STATE_ON; 664 break; 665 case DRM_MODE_DPMS_STANDBY: 666 state = SDVO_ENCODER_STATE_STANDBY; 667 break; 668 case DRM_MODE_DPMS_SUSPEND: 669 state = SDVO_ENCODER_STATE_SUSPEND; 670 break; 671 case DRM_MODE_DPMS_OFF: 672 state = SDVO_ENCODER_STATE_OFF; 673 break; 674 } 675 676 return intel_sdvo_set_value(intel_sdvo, 677 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state)); 678 } 679 680 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo, 681 int *clock_min, 682 int *clock_max) 683 { 684 struct intel_sdvo_pixel_clock_range clocks; 685 686 BUILD_BUG_ON(sizeof(clocks) != 4); 687 if (!intel_sdvo_get_value(intel_sdvo, 688 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE, 689 &clocks, sizeof(clocks))) 690 return false; 691 692 /* Convert the values from units of 10 kHz to kHz. */ 693 *clock_min = clocks.min * 10; 694 *clock_max = clocks.max * 10; 695 return true; 696 } 697 698 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo, 699 u16 outputs) 700 { 701 return intel_sdvo_set_value(intel_sdvo, 702 SDVO_CMD_SET_TARGET_OUTPUT, 703 &outputs, sizeof(outputs)); 704 } 705 706 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd, 707 struct intel_sdvo_dtd *dtd) 708 { 709 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) && 710 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2)); 711 } 712 713 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo, 714 struct intel_sdvo_dtd *dtd) 715 { 716 return intel_sdvo_set_timing(intel_sdvo, 717 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd); 718 } 719 720 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo, 721 struct intel_sdvo_dtd *dtd) 722 { 723 return intel_sdvo_set_timing(intel_sdvo, 724 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd); 725 } 726 727 static bool 728 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo, 729 uint16_t clock, 730 uint16_t width, 731 uint16_t height) 732 { 733 struct intel_sdvo_preferred_input_timing_args args; 734 735 memset(&args, 0, sizeof(args)); 736 args.clock = clock; 737 args.width = width; 738 args.height = height; 739 args.interlace = 0; 740 741 if (intel_sdvo->is_lvds && 742 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width || 743 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height)) 744 args.scaled = 1; 745 746 return intel_sdvo_set_value(intel_sdvo, 747 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING, 748 &args, sizeof(args)); 749 } 750 751 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo, 752 struct intel_sdvo_dtd *dtd) 753 { 754 BUILD_BUG_ON(sizeof(dtd->part1) != 8); 755 BUILD_BUG_ON(sizeof(dtd->part2) != 8); 756 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1, 757 &dtd->part1, sizeof(dtd->part1)) && 758 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2, 759 &dtd->part2, sizeof(dtd->part2)); 760 } 761 762 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val) 763 { 764 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1); 765 } 766 767 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd, 768 const struct drm_display_mode *mode) 769 { 770 uint16_t width, height; 771 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len; 772 uint16_t h_sync_offset, v_sync_offset; 773 int mode_clock; 774 775 width = mode->hdisplay; 776 height = mode->vdisplay; 777 778 /* do some mode translations */ 779 h_blank_len = mode->htotal - mode->hdisplay; 780 h_sync_len = mode->hsync_end - mode->hsync_start; 781 782 v_blank_len = mode->vtotal - mode->vdisplay; 783 v_sync_len = mode->vsync_end - mode->vsync_start; 784 785 h_sync_offset = mode->hsync_start - mode->hdisplay; 786 v_sync_offset = mode->vsync_start - mode->vdisplay; 787 788 mode_clock = mode->clock; 789 mode_clock /= 10; 790 dtd->part1.clock = mode_clock; 791 792 dtd->part1.h_active = width & 0xff; 793 dtd->part1.h_blank = h_blank_len & 0xff; 794 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) | 795 ((h_blank_len >> 8) & 0xf); 796 dtd->part1.v_active = height & 0xff; 797 dtd->part1.v_blank = v_blank_len & 0xff; 798 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) | 799 ((v_blank_len >> 8) & 0xf); 800 801 dtd->part2.h_sync_off = h_sync_offset & 0xff; 802 dtd->part2.h_sync_width = h_sync_len & 0xff; 803 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 | 804 (v_sync_len & 0xf); 805 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) | 806 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) | 807 ((v_sync_len & 0x30) >> 4); 808 809 dtd->part2.dtd_flags = 0x18; 810 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 811 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE; 812 if (mode->flags & DRM_MODE_FLAG_PHSYNC) 813 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE; 814 if (mode->flags & DRM_MODE_FLAG_PVSYNC) 815 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE; 816 817 dtd->part2.sdvo_flags = 0; 818 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0; 819 dtd->part2.reserved = 0; 820 } 821 822 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode, 823 const struct intel_sdvo_dtd *dtd) 824 { 825 mode->hdisplay = dtd->part1.h_active; 826 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8; 827 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off; 828 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2; 829 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width; 830 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4; 831 mode->htotal = mode->hdisplay + dtd->part1.h_blank; 832 mode->htotal += (dtd->part1.h_high & 0xf) << 8; 833 834 mode->vdisplay = dtd->part1.v_active; 835 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8; 836 mode->vsync_start = mode->vdisplay; 837 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf; 838 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2; 839 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0; 840 mode->vsync_end = mode->vsync_start + 841 (dtd->part2.v_sync_off_width & 0xf); 842 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4; 843 mode->vtotal = mode->vdisplay + dtd->part1.v_blank; 844 mode->vtotal += (dtd->part1.v_high & 0xf) << 8; 845 846 mode->clock = dtd->part1.clock * 10; 847 848 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); 849 if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE) 850 mode->flags |= DRM_MODE_FLAG_INTERLACE; 851 if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE) 852 mode->flags |= DRM_MODE_FLAG_PHSYNC; 853 if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE) 854 mode->flags |= DRM_MODE_FLAG_PVSYNC; 855 } 856 857 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo) 858 { 859 struct intel_sdvo_encode encode; 860 861 BUILD_BUG_ON(sizeof(encode) != 2); 862 return intel_sdvo_get_value(intel_sdvo, 863 SDVO_CMD_GET_SUPP_ENCODE, 864 &encode, sizeof(encode)); 865 } 866 867 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo, 868 uint8_t mode) 869 { 870 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1); 871 } 872 873 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo, 874 uint8_t mode) 875 { 876 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1); 877 } 878 879 #if 0 880 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo) 881 { 882 int i, j; 883 uint8_t set_buf_index[2]; 884 uint8_t av_split; 885 uint8_t buf_size; 886 uint8_t buf[48]; 887 uint8_t *pos; 888 889 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1); 890 891 for (i = 0; i <= av_split; i++) { 892 set_buf_index[0] = i; set_buf_index[1] = 0; 893 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX, 894 set_buf_index, 2); 895 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0); 896 intel_sdvo_read_response(encoder, &buf_size, 1); 897 898 pos = buf; 899 for (j = 0; j <= buf_size; j += 8) { 900 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA, 901 NULL, 0); 902 intel_sdvo_read_response(encoder, pos, 8); 903 pos += 8; 904 } 905 } 906 } 907 #endif 908 909 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo, 910 unsigned if_index, uint8_t tx_rate, 911 uint8_t *data, unsigned length) 912 { 913 uint8_t set_buf_index[2] = { if_index, 0 }; 914 uint8_t hbuf_size, tmp[8]; 915 int i; 916 917 if (!intel_sdvo_set_value(intel_sdvo, 918 SDVO_CMD_SET_HBUF_INDEX, 919 set_buf_index, 2)) 920 return false; 921 922 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO, 923 &hbuf_size, 1)) 924 return false; 925 926 /* Buffer size is 0 based, hooray! */ 927 hbuf_size++; 928 929 DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n", 930 if_index, length, hbuf_size); 931 932 for (i = 0; i < hbuf_size; i += 8) { 933 memset(tmp, 0, 8); 934 if (i < length) 935 memcpy(tmp, data + i, min_t(unsigned, 8, length - i)); 936 937 if (!intel_sdvo_set_value(intel_sdvo, 938 SDVO_CMD_SET_HBUF_DATA, 939 tmp, 8)) 940 return false; 941 } 942 943 return intel_sdvo_set_value(intel_sdvo, 944 SDVO_CMD_SET_HBUF_TXRATE, 945 &tx_rate, 1); 946 } 947 948 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo, 949 const struct drm_display_mode *adjusted_mode) 950 { 951 struct dip_infoframe avi_if = { 952 .type = DIP_TYPE_AVI, 953 .ver = DIP_VERSION_AVI, 954 .len = DIP_LEN_AVI, 955 }; 956 uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)]; 957 struct intel_crtc *intel_crtc = to_intel_crtc(intel_sdvo->base.base.crtc); 958 959 if (intel_sdvo->rgb_quant_range_selectable) { 960 if (intel_crtc->config.limited_color_range) 961 avi_if.body.avi.ITC_EC_Q_SC |= DIP_AVI_RGB_QUANT_RANGE_LIMITED; 962 else 963 avi_if.body.avi.ITC_EC_Q_SC |= DIP_AVI_RGB_QUANT_RANGE_FULL; 964 } 965 966 avi_if.body.avi.VIC = drm_match_cea_mode(adjusted_mode); 967 968 intel_dip_infoframe_csum(&avi_if); 969 970 /* sdvo spec says that the ecc is handled by the hw, and it looks like 971 * we must not send the ecc field, either. */ 972 memcpy(sdvo_data, &avi_if, 3); 973 sdvo_data[3] = avi_if.checksum; 974 memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi)); 975 976 return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF, 977 SDVO_HBUF_TX_VSYNC, 978 sdvo_data, sizeof(sdvo_data)); 979 } 980 981 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo) 982 { 983 struct intel_sdvo_tv_format format; 984 uint32_t format_map; 985 986 format_map = 1 << intel_sdvo->tv_format_index; 987 memset(&format, 0, sizeof(format)); 988 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map))); 989 990 BUILD_BUG_ON(sizeof(format) != 6); 991 return intel_sdvo_set_value(intel_sdvo, 992 SDVO_CMD_SET_TV_FORMAT, 993 &format, sizeof(format)); 994 } 995 996 static bool 997 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo, 998 const struct drm_display_mode *mode) 999 { 1000 struct intel_sdvo_dtd output_dtd; 1001 1002 if (!intel_sdvo_set_target_output(intel_sdvo, 1003 intel_sdvo->attached_output)) 1004 return false; 1005 1006 intel_sdvo_get_dtd_from_mode(&output_dtd, mode); 1007 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd)) 1008 return false; 1009 1010 return true; 1011 } 1012 1013 /* Asks the sdvo controller for the preferred input mode given the output mode. 1014 * Unfortunately we have to set up the full output mode to do that. */ 1015 static bool 1016 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo, 1017 const struct drm_display_mode *mode, 1018 struct drm_display_mode *adjusted_mode) 1019 { 1020 struct intel_sdvo_dtd input_dtd; 1021 1022 /* Reset the input timing to the screen. Assume always input 0. */ 1023 if (!intel_sdvo_set_target_input(intel_sdvo)) 1024 return false; 1025 1026 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo, 1027 mode->clock / 10, 1028 mode->hdisplay, 1029 mode->vdisplay)) 1030 return false; 1031 1032 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo, 1033 &input_dtd)) 1034 return false; 1035 1036 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd); 1037 intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags; 1038 1039 return true; 1040 } 1041 1042 static bool intel_sdvo_compute_config(struct intel_encoder *encoder, 1043 struct intel_crtc_config *pipe_config) 1044 { 1045 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base); 1046 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode; 1047 struct drm_display_mode *mode = &pipe_config->requested_mode; 1048 1049 DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n"); 1050 pipe_config->pipe_bpp = 8*3; 1051 1052 if (HAS_PCH_SPLIT(encoder->base.dev)) 1053 pipe_config->has_pch_encoder = true; 1054 1055 /* We need to construct preferred input timings based on our 1056 * output timings. To do that, we have to set the output 1057 * timings, even though this isn't really the right place in 1058 * the sequence to do it. Oh well. 1059 */ 1060 if (intel_sdvo->is_tv) { 1061 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode)) 1062 return false; 1063 1064 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo, 1065 mode, 1066 adjusted_mode); 1067 } else if (intel_sdvo->is_lvds) { 1068 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, 1069 intel_sdvo->sdvo_lvds_fixed_mode)) 1070 return false; 1071 1072 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo, 1073 mode, 1074 adjusted_mode); 1075 } 1076 1077 /* Make the CRTC code factor in the SDVO pixel multiplier. The 1078 * SDVO device will factor out the multiplier during mode_set. 1079 */ 1080 pipe_config->pixel_multiplier = 1081 intel_sdvo_get_pixel_multiplier(adjusted_mode); 1082 adjusted_mode->clock *= pipe_config->pixel_multiplier; 1083 1084 if (intel_sdvo->color_range_auto) { 1085 /* See CEA-861-E - 5.1 Default Encoding Parameters */ 1086 /* FIXME: This bit is only valid when using TMDS encoding and 8 1087 * bit per color mode. */ 1088 if (intel_sdvo->has_hdmi_monitor && 1089 drm_match_cea_mode(adjusted_mode) > 1) 1090 intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235; 1091 else 1092 intel_sdvo->color_range = 0; 1093 } 1094 1095 if (intel_sdvo->color_range) 1096 pipe_config->limited_color_range = true; 1097 1098 return true; 1099 } 1100 1101 static void intel_sdvo_mode_set(struct intel_encoder *intel_encoder) 1102 { 1103 struct drm_device *dev = intel_encoder->base.dev; 1104 struct drm_i915_private *dev_priv = dev->dev_private; 1105 struct drm_crtc *crtc = intel_encoder->base.crtc; 1106 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 1107 struct drm_display_mode *adjusted_mode = 1108 &intel_crtc->config.adjusted_mode; 1109 struct drm_display_mode *mode = &intel_crtc->config.requested_mode; 1110 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&intel_encoder->base); 1111 u32 sdvox; 1112 struct intel_sdvo_in_out_map in_out; 1113 struct intel_sdvo_dtd input_dtd, output_dtd; 1114 int rate; 1115 1116 if (!mode) 1117 return; 1118 1119 /* First, set the input mapping for the first input to our controlled 1120 * output. This is only correct if we're a single-input device, in 1121 * which case the first input is the output from the appropriate SDVO 1122 * channel on the motherboard. In a two-input device, the first input 1123 * will be SDVOB and the second SDVOC. 1124 */ 1125 in_out.in0 = intel_sdvo->attached_output; 1126 in_out.in1 = 0; 1127 1128 intel_sdvo_set_value(intel_sdvo, 1129 SDVO_CMD_SET_IN_OUT_MAP, 1130 &in_out, sizeof(in_out)); 1131 1132 /* Set the output timings to the screen */ 1133 if (!intel_sdvo_set_target_output(intel_sdvo, 1134 intel_sdvo->attached_output)) 1135 return; 1136 1137 /* lvds has a special fixed output timing. */ 1138 if (intel_sdvo->is_lvds) 1139 intel_sdvo_get_dtd_from_mode(&output_dtd, 1140 intel_sdvo->sdvo_lvds_fixed_mode); 1141 else 1142 intel_sdvo_get_dtd_from_mode(&output_dtd, mode); 1143 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd)) 1144 DRM_INFO("Setting output timings on %s failed\n", 1145 SDVO_NAME(intel_sdvo)); 1146 1147 /* Set the input timing to the screen. Assume always input 0. */ 1148 if (!intel_sdvo_set_target_input(intel_sdvo)) 1149 return; 1150 1151 if (intel_sdvo->has_hdmi_monitor) { 1152 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI); 1153 intel_sdvo_set_colorimetry(intel_sdvo, 1154 SDVO_COLORIMETRY_RGB256); 1155 intel_sdvo_set_avi_infoframe(intel_sdvo, adjusted_mode); 1156 } else 1157 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI); 1158 1159 if (intel_sdvo->is_tv && 1160 !intel_sdvo_set_tv_format(intel_sdvo)) 1161 return; 1162 1163 /* We have tried to get input timing in mode_fixup, and filled into 1164 * adjusted_mode. 1165 */ 1166 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode); 1167 if (intel_sdvo->is_tv || intel_sdvo->is_lvds) 1168 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags; 1169 if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd)) 1170 DRM_INFO("Setting input timings on %s failed\n", 1171 SDVO_NAME(intel_sdvo)); 1172 1173 switch (intel_crtc->config.pixel_multiplier) { 1174 default: 1175 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break; 1176 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break; 1177 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break; 1178 } 1179 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate)) 1180 return; 1181 1182 /* Set the SDVO control regs. */ 1183 if (INTEL_INFO(dev)->gen >= 4) { 1184 /* The real mode polarity is set by the SDVO commands, using 1185 * struct intel_sdvo_dtd. */ 1186 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH; 1187 if (!HAS_PCH_SPLIT(dev) && intel_sdvo->is_hdmi) 1188 sdvox |= intel_sdvo->color_range; 1189 if (INTEL_INFO(dev)->gen < 5) 1190 sdvox |= SDVO_BORDER_ENABLE; 1191 } else { 1192 sdvox = I915_READ(intel_sdvo->sdvo_reg); 1193 switch (intel_sdvo->sdvo_reg) { 1194 case GEN3_SDVOB: 1195 sdvox &= SDVOB_PRESERVE_MASK; 1196 break; 1197 case GEN3_SDVOC: 1198 sdvox &= SDVOC_PRESERVE_MASK; 1199 break; 1200 } 1201 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE; 1202 } 1203 1204 if (INTEL_PCH_TYPE(dev) >= PCH_CPT) 1205 sdvox |= SDVO_PIPE_SEL_CPT(intel_crtc->pipe); 1206 else 1207 sdvox |= SDVO_PIPE_SEL(intel_crtc->pipe); 1208 1209 if (intel_sdvo->has_hdmi_audio) 1210 sdvox |= SDVO_AUDIO_ENABLE; 1211 1212 if (INTEL_INFO(dev)->gen >= 4) { 1213 /* done in crtc_mode_set as the dpll_md reg must be written early */ 1214 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) { 1215 /* done in crtc_mode_set as it lives inside the dpll register */ 1216 } else { 1217 sdvox |= (intel_crtc->config.pixel_multiplier - 1) 1218 << SDVO_PORT_MULTIPLY_SHIFT; 1219 } 1220 1221 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL && 1222 INTEL_INFO(dev)->gen < 5) 1223 sdvox |= SDVO_STALL_SELECT; 1224 intel_sdvo_write_sdvox(intel_sdvo, sdvox); 1225 } 1226 1227 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector) 1228 { 1229 struct intel_sdvo_connector *intel_sdvo_connector = 1230 to_intel_sdvo_connector(&connector->base); 1231 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base); 1232 u16 active_outputs; 1233 1234 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs); 1235 1236 if (active_outputs & intel_sdvo_connector->output_flag) 1237 return true; 1238 else 1239 return false; 1240 } 1241 1242 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder, 1243 enum i915_pipe *pipe) 1244 { 1245 struct drm_device *dev = encoder->base.dev; 1246 struct drm_i915_private *dev_priv = dev->dev_private; 1247 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base); 1248 u16 active_outputs; 1249 u32 tmp; 1250 1251 tmp = I915_READ(intel_sdvo->sdvo_reg); 1252 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs); 1253 1254 if (!(tmp & SDVO_ENABLE) && (active_outputs == 0)) 1255 return false; 1256 1257 if (HAS_PCH_CPT(dev)) 1258 *pipe = PORT_TO_PIPE_CPT(tmp); 1259 else 1260 *pipe = PORT_TO_PIPE(tmp); 1261 1262 return true; 1263 } 1264 1265 static void intel_disable_sdvo(struct intel_encoder *encoder) 1266 { 1267 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; 1268 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base); 1269 u32 temp; 1270 1271 intel_sdvo_set_active_outputs(intel_sdvo, 0); 1272 if (0) 1273 intel_sdvo_set_encoder_power_state(intel_sdvo, 1274 DRM_MODE_DPMS_OFF); 1275 1276 temp = I915_READ(intel_sdvo->sdvo_reg); 1277 if ((temp & SDVO_ENABLE) != 0) { 1278 /* HW workaround for IBX, we need to move the port to 1279 * transcoder A before disabling it. */ 1280 if (HAS_PCH_IBX(encoder->base.dev)) { 1281 struct drm_crtc *crtc = encoder->base.crtc; 1282 int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1; 1283 1284 if (temp & SDVO_PIPE_B_SELECT) { 1285 temp &= ~SDVO_PIPE_B_SELECT; 1286 I915_WRITE(intel_sdvo->sdvo_reg, temp); 1287 POSTING_READ(intel_sdvo->sdvo_reg); 1288 1289 /* Again we need to write this twice. */ 1290 I915_WRITE(intel_sdvo->sdvo_reg, temp); 1291 POSTING_READ(intel_sdvo->sdvo_reg); 1292 1293 /* Transcoder selection bits only update 1294 * effectively on vblank. */ 1295 if (crtc) 1296 intel_wait_for_vblank(encoder->base.dev, pipe); 1297 else 1298 msleep(50); 1299 } 1300 } 1301 1302 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE); 1303 } 1304 } 1305 1306 static void intel_enable_sdvo(struct intel_encoder *encoder) 1307 { 1308 struct drm_device *dev = encoder->base.dev; 1309 struct drm_i915_private *dev_priv = dev->dev_private; 1310 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base); 1311 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); 1312 u32 temp; 1313 bool input1, input2; 1314 int i; 1315 u8 status; 1316 1317 temp = I915_READ(intel_sdvo->sdvo_reg); 1318 if ((temp & SDVO_ENABLE) == 0) { 1319 /* HW workaround for IBX, we need to move the port 1320 * to transcoder A before disabling it, so restore it here. */ 1321 if (HAS_PCH_IBX(dev)) 1322 temp |= SDVO_PIPE_SEL(intel_crtc->pipe); 1323 1324 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE); 1325 } 1326 for (i = 0; i < 2; i++) 1327 intel_wait_for_vblank(dev, intel_crtc->pipe); 1328 1329 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2); 1330 /* Warn if the device reported failure to sync. 1331 * A lot of SDVO devices fail to notify of sync, but it's 1332 * a given it the status is a success, we succeeded. 1333 */ 1334 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) { 1335 DRM_DEBUG_KMS("First %s output reported failure to " 1336 "sync\n", SDVO_NAME(intel_sdvo)); 1337 } 1338 1339 if (0) 1340 intel_sdvo_set_encoder_power_state(intel_sdvo, 1341 DRM_MODE_DPMS_ON); 1342 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output); 1343 } 1344 1345 static void intel_sdvo_dpms(struct drm_connector *connector, int mode) 1346 { 1347 struct drm_crtc *crtc; 1348 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1349 1350 /* dvo supports only 2 dpms states. */ 1351 if (mode != DRM_MODE_DPMS_ON) 1352 mode = DRM_MODE_DPMS_OFF; 1353 1354 if (mode == connector->dpms) 1355 return; 1356 1357 connector->dpms = mode; 1358 1359 /* Only need to change hw state when actually enabled */ 1360 crtc = intel_sdvo->base.base.crtc; 1361 if (!crtc) { 1362 intel_sdvo->base.connectors_active = false; 1363 return; 1364 } 1365 1366 if (mode != DRM_MODE_DPMS_ON) { 1367 intel_sdvo_set_active_outputs(intel_sdvo, 0); 1368 if (0) 1369 intel_sdvo_set_encoder_power_state(intel_sdvo, mode); 1370 1371 intel_sdvo->base.connectors_active = false; 1372 1373 intel_crtc_update_dpms(crtc); 1374 } else { 1375 intel_sdvo->base.connectors_active = true; 1376 1377 intel_crtc_update_dpms(crtc); 1378 1379 if (0) 1380 intel_sdvo_set_encoder_power_state(intel_sdvo, mode); 1381 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output); 1382 } 1383 1384 intel_modeset_check_state(connector->dev); 1385 } 1386 1387 static int intel_sdvo_mode_valid(struct drm_connector *connector, 1388 struct drm_display_mode *mode) 1389 { 1390 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1391 1392 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 1393 return MODE_NO_DBLESCAN; 1394 1395 if (intel_sdvo->pixel_clock_min > mode->clock) 1396 return MODE_CLOCK_LOW; 1397 1398 if (intel_sdvo->pixel_clock_max < mode->clock) 1399 return MODE_CLOCK_HIGH; 1400 1401 if (intel_sdvo->is_lvds) { 1402 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay) 1403 return MODE_PANEL; 1404 1405 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay) 1406 return MODE_PANEL; 1407 } 1408 1409 return MODE_OK; 1410 } 1411 1412 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps) 1413 { 1414 BUILD_BUG_ON(sizeof(*caps) != 8); 1415 if (!intel_sdvo_get_value(intel_sdvo, 1416 SDVO_CMD_GET_DEVICE_CAPS, 1417 caps, sizeof(*caps))) 1418 return false; 1419 1420 DRM_DEBUG_KMS("SDVO capabilities:\n" 1421 " vendor_id: %d\n" 1422 " device_id: %d\n" 1423 " device_rev_id: %d\n" 1424 " sdvo_version_major: %d\n" 1425 " sdvo_version_minor: %d\n" 1426 " sdvo_inputs_mask: %d\n" 1427 " smooth_scaling: %d\n" 1428 " sharp_scaling: %d\n" 1429 " up_scaling: %d\n" 1430 " down_scaling: %d\n" 1431 " stall_support: %d\n" 1432 " output_flags: %d\n", 1433 caps->vendor_id, 1434 caps->device_id, 1435 caps->device_rev_id, 1436 caps->sdvo_version_major, 1437 caps->sdvo_version_minor, 1438 caps->sdvo_inputs_mask, 1439 caps->smooth_scaling, 1440 caps->sharp_scaling, 1441 caps->up_scaling, 1442 caps->down_scaling, 1443 caps->stall_support, 1444 caps->output_flags); 1445 1446 return true; 1447 } 1448 1449 static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo) 1450 { 1451 struct drm_device *dev = intel_sdvo->base.base.dev; 1452 uint16_t hotplug; 1453 1454 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise 1455 * on the line. */ 1456 if (IS_I945G(dev) || IS_I945GM(dev)) 1457 return 0; 1458 1459 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, 1460 &hotplug, sizeof(hotplug))) 1461 return 0; 1462 1463 return hotplug; 1464 } 1465 1466 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder) 1467 { 1468 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base); 1469 1470 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, 1471 &intel_sdvo->hotplug_active, 2); 1472 } 1473 1474 static bool 1475 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo) 1476 { 1477 /* Is there more than one type of output? */ 1478 return hweight16(intel_sdvo->caps.output_flags) > 1; 1479 } 1480 1481 static struct edid * 1482 intel_sdvo_get_edid(struct drm_connector *connector) 1483 { 1484 struct intel_sdvo *sdvo = intel_attached_sdvo(connector); 1485 return drm_get_edid(connector, sdvo->ddc); 1486 } 1487 1488 /* Mac mini hack -- use the same DDC as the analog connector */ 1489 static struct edid * 1490 intel_sdvo_get_analog_edid(struct drm_connector *connector) 1491 { 1492 struct drm_i915_private *dev_priv = connector->dev->dev_private; 1493 1494 return drm_get_edid(connector, 1495 intel_gmbus_get_adapter(dev_priv, 1496 dev_priv->crt_ddc_pin)); 1497 } 1498 1499 static enum drm_connector_status 1500 intel_sdvo_tmds_sink_detect(struct drm_connector *connector) 1501 { 1502 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1503 enum drm_connector_status status; 1504 struct edid *edid; 1505 1506 edid = intel_sdvo_get_edid(connector); 1507 1508 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) { 1509 u8 ddc, saved_ddc = intel_sdvo->ddc_bus; 1510 1511 /* 1512 * Don't use the 1 as the argument of DDC bus switch to get 1513 * the EDID. It is used for SDVO SPD ROM. 1514 */ 1515 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) { 1516 intel_sdvo->ddc_bus = ddc; 1517 edid = intel_sdvo_get_edid(connector); 1518 if (edid) 1519 break; 1520 } 1521 /* 1522 * If we found the EDID on the other bus, 1523 * assume that is the correct DDC bus. 1524 */ 1525 if (edid == NULL) 1526 intel_sdvo->ddc_bus = saved_ddc; 1527 } 1528 1529 /* 1530 * When there is no edid and no monitor is connected with VGA 1531 * port, try to use the CRT ddc to read the EDID for DVI-connector. 1532 */ 1533 if (edid == NULL) 1534 edid = intel_sdvo_get_analog_edid(connector); 1535 1536 status = connector_status_unknown; 1537 if (edid != NULL) { 1538 /* DDC bus is shared, match EDID to connector type */ 1539 if (edid->input & DRM_EDID_INPUT_DIGITAL) { 1540 status = connector_status_connected; 1541 if (intel_sdvo->is_hdmi) { 1542 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid); 1543 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid); 1544 intel_sdvo->rgb_quant_range_selectable = 1545 drm_rgb_quant_range_selectable(edid); 1546 } 1547 } else 1548 status = connector_status_disconnected; 1549 kfree(edid); 1550 } 1551 1552 if (status == connector_status_connected) { 1553 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1554 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO) 1555 intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON); 1556 } 1557 1558 return status; 1559 } 1560 1561 static bool 1562 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo, 1563 struct edid *edid) 1564 { 1565 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL); 1566 bool connector_is_digital = !!IS_DIGITAL(sdvo); 1567 1568 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n", 1569 connector_is_digital, monitor_is_digital); 1570 return connector_is_digital == monitor_is_digital; 1571 } 1572 1573 static enum drm_connector_status 1574 intel_sdvo_detect(struct drm_connector *connector, bool force) 1575 { 1576 uint16_t response; 1577 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1578 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1579 enum drm_connector_status ret; 1580 1581 if (!intel_sdvo_get_value(intel_sdvo, 1582 SDVO_CMD_GET_ATTACHED_DISPLAYS, 1583 &response, 2)) 1584 return connector_status_unknown; 1585 1586 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n", 1587 response & 0xff, response >> 8, 1588 intel_sdvo_connector->output_flag); 1589 1590 if (response == 0) 1591 return connector_status_disconnected; 1592 1593 intel_sdvo->attached_output = response; 1594 1595 intel_sdvo->has_hdmi_monitor = false; 1596 intel_sdvo->has_hdmi_audio = false; 1597 intel_sdvo->rgb_quant_range_selectable = false; 1598 1599 if ((intel_sdvo_connector->output_flag & response) == 0) 1600 ret = connector_status_disconnected; 1601 else if (IS_TMDS(intel_sdvo_connector)) 1602 ret = intel_sdvo_tmds_sink_detect(connector); 1603 else { 1604 struct edid *edid; 1605 1606 /* if we have an edid check it matches the connection */ 1607 edid = intel_sdvo_get_edid(connector); 1608 if (edid == NULL) 1609 edid = intel_sdvo_get_analog_edid(connector); 1610 if (edid != NULL) { 1611 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector, 1612 edid)) 1613 ret = connector_status_connected; 1614 else 1615 ret = connector_status_disconnected; 1616 1617 kfree(edid); 1618 } else 1619 ret = connector_status_connected; 1620 } 1621 1622 /* May update encoder flag for like clock for SDVO TV, etc.*/ 1623 if (ret == connector_status_connected) { 1624 intel_sdvo->is_tv = false; 1625 intel_sdvo->is_lvds = false; 1626 intel_sdvo->base.needs_tv_clock = false; 1627 1628 if (response & SDVO_TV_MASK) { 1629 intel_sdvo->is_tv = true; 1630 intel_sdvo->base.needs_tv_clock = true; 1631 } 1632 if (response & SDVO_LVDS_MASK) 1633 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL; 1634 } 1635 1636 return ret; 1637 } 1638 1639 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector) 1640 { 1641 struct edid *edid; 1642 1643 /* set the bus switch and get the modes */ 1644 edid = intel_sdvo_get_edid(connector); 1645 1646 /* 1647 * Mac mini hack. On this device, the DVI-I connector shares one DDC 1648 * link between analog and digital outputs. So, if the regular SDVO 1649 * DDC fails, check to see if the analog output is disconnected, in 1650 * which case we'll look there for the digital DDC data. 1651 */ 1652 if (edid == NULL) 1653 edid = intel_sdvo_get_analog_edid(connector); 1654 1655 if (edid != NULL) { 1656 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector), 1657 edid)) { 1658 drm_mode_connector_update_edid_property(connector, edid); 1659 drm_add_edid_modes(connector, edid); 1660 } 1661 1662 kfree(edid); 1663 } 1664 } 1665 1666 /* 1667 * Set of SDVO TV modes. 1668 * Note! This is in reply order (see loop in get_tv_modes). 1669 * XXX: all 60Hz refresh? 1670 */ 1671 static const struct drm_display_mode sdvo_tv_modes[] = { 1672 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384, 1673 416, 0, 200, 201, 232, 233, 0, 1674 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1675 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384, 1676 416, 0, 240, 241, 272, 273, 0, 1677 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1678 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464, 1679 496, 0, 300, 301, 332, 333, 0, 1680 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1681 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704, 1682 736, 0, 350, 351, 382, 383, 0, 1683 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1684 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704, 1685 736, 0, 400, 401, 432, 433, 0, 1686 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1687 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704, 1688 736, 0, 480, 481, 512, 513, 0, 1689 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1690 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768, 1691 800, 0, 480, 481, 512, 513, 0, 1692 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1693 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768, 1694 800, 0, 576, 577, 608, 609, 0, 1695 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1696 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784, 1697 816, 0, 350, 351, 382, 383, 0, 1698 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1699 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784, 1700 816, 0, 400, 401, 432, 433, 0, 1701 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1702 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784, 1703 816, 0, 480, 481, 512, 513, 0, 1704 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1705 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784, 1706 816, 0, 540, 541, 572, 573, 0, 1707 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1708 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784, 1709 816, 0, 576, 577, 608, 609, 0, 1710 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1711 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832, 1712 864, 0, 576, 577, 608, 609, 0, 1713 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1714 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864, 1715 896, 0, 600, 601, 632, 633, 0, 1716 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1717 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896, 1718 928, 0, 624, 625, 656, 657, 0, 1719 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1720 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984, 1721 1016, 0, 766, 767, 798, 799, 0, 1722 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1723 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088, 1724 1120, 0, 768, 769, 800, 801, 0, 1725 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1726 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344, 1727 1376, 0, 1024, 1025, 1056, 1057, 0, 1728 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1729 }; 1730 1731 static void intel_sdvo_get_tv_modes(struct drm_connector *connector) 1732 { 1733 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1734 struct intel_sdvo_sdtv_resolution_request tv_res; 1735 uint32_t reply = 0, format_map = 0; 1736 int i; 1737 1738 /* Read the list of supported input resolutions for the selected TV 1739 * format. 1740 */ 1741 format_map = 1 << intel_sdvo->tv_format_index; 1742 memcpy(&tv_res, &format_map, 1743 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request))); 1744 1745 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output)) 1746 return; 1747 1748 BUILD_BUG_ON(sizeof(tv_res) != 3); 1749 if (!intel_sdvo_write_cmd(intel_sdvo, 1750 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT, 1751 &tv_res, sizeof(tv_res))) 1752 return; 1753 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3)) 1754 return; 1755 1756 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++) 1757 if (reply & (1 << i)) { 1758 struct drm_display_mode *nmode; 1759 nmode = drm_mode_duplicate(connector->dev, 1760 &sdvo_tv_modes[i]); 1761 if (nmode) 1762 drm_mode_probed_add(connector, nmode); 1763 } 1764 } 1765 1766 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector) 1767 { 1768 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1769 struct drm_i915_private *dev_priv = connector->dev->dev_private; 1770 struct drm_display_mode *newmode; 1771 1772 /* 1773 * Attempt to get the mode list from DDC. 1774 * Assume that the preferred modes are 1775 * arranged in priority order. 1776 */ 1777 intel_ddc_get_modes(connector, intel_sdvo->ddc); 1778 1779 /* 1780 * Fetch modes from VBT. For SDVO prefer the VBT mode since some 1781 * SDVO->LVDS transcoders can't cope with the EDID mode. Since 1782 * drm_mode_probed_add adds the mode at the head of the list we add it 1783 * last. 1784 */ 1785 if (dev_priv->sdvo_lvds_vbt_mode != NULL) { 1786 newmode = drm_mode_duplicate(connector->dev, 1787 dev_priv->sdvo_lvds_vbt_mode); 1788 if (newmode != NULL) { 1789 /* Guarantee the mode is preferred */ 1790 newmode->type = (DRM_MODE_TYPE_PREFERRED | 1791 DRM_MODE_TYPE_DRIVER); 1792 drm_mode_probed_add(connector, newmode); 1793 } 1794 } 1795 1796 list_for_each_entry(newmode, &connector->probed_modes, head) { 1797 if (newmode->type & DRM_MODE_TYPE_PREFERRED) { 1798 intel_sdvo->sdvo_lvds_fixed_mode = 1799 drm_mode_duplicate(connector->dev, newmode); 1800 1801 intel_sdvo->is_lvds = true; 1802 break; 1803 } 1804 } 1805 1806 } 1807 1808 static int intel_sdvo_get_modes(struct drm_connector *connector) 1809 { 1810 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1811 1812 if (IS_TV(intel_sdvo_connector)) 1813 intel_sdvo_get_tv_modes(connector); 1814 else if (IS_LVDS(intel_sdvo_connector)) 1815 intel_sdvo_get_lvds_modes(connector); 1816 else 1817 intel_sdvo_get_ddc_modes(connector); 1818 1819 return !list_empty(&connector->probed_modes); 1820 } 1821 1822 static void 1823 intel_sdvo_destroy_enhance_property(struct drm_connector *connector) 1824 { 1825 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1826 struct drm_device *dev = connector->dev; 1827 1828 if (intel_sdvo_connector->left) 1829 drm_property_destroy(dev, intel_sdvo_connector->left); 1830 if (intel_sdvo_connector->right) 1831 drm_property_destroy(dev, intel_sdvo_connector->right); 1832 if (intel_sdvo_connector->top) 1833 drm_property_destroy(dev, intel_sdvo_connector->top); 1834 if (intel_sdvo_connector->bottom) 1835 drm_property_destroy(dev, intel_sdvo_connector->bottom); 1836 if (intel_sdvo_connector->hpos) 1837 drm_property_destroy(dev, intel_sdvo_connector->hpos); 1838 if (intel_sdvo_connector->vpos) 1839 drm_property_destroy(dev, intel_sdvo_connector->vpos); 1840 if (intel_sdvo_connector->saturation) 1841 drm_property_destroy(dev, intel_sdvo_connector->saturation); 1842 if (intel_sdvo_connector->contrast) 1843 drm_property_destroy(dev, intel_sdvo_connector->contrast); 1844 if (intel_sdvo_connector->hue) 1845 drm_property_destroy(dev, intel_sdvo_connector->hue); 1846 if (intel_sdvo_connector->sharpness) 1847 drm_property_destroy(dev, intel_sdvo_connector->sharpness); 1848 if (intel_sdvo_connector->flicker_filter) 1849 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter); 1850 if (intel_sdvo_connector->flicker_filter_2d) 1851 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d); 1852 if (intel_sdvo_connector->flicker_filter_adaptive) 1853 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive); 1854 if (intel_sdvo_connector->tv_luma_filter) 1855 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter); 1856 if (intel_sdvo_connector->tv_chroma_filter) 1857 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter); 1858 if (intel_sdvo_connector->dot_crawl) 1859 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl); 1860 if (intel_sdvo_connector->brightness) 1861 drm_property_destroy(dev, intel_sdvo_connector->brightness); 1862 } 1863 1864 static void intel_sdvo_destroy(struct drm_connector *connector) 1865 { 1866 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1867 1868 if (intel_sdvo_connector->tv_format) 1869 drm_property_destroy(connector->dev, 1870 intel_sdvo_connector->tv_format); 1871 1872 intel_sdvo_destroy_enhance_property(connector); 1873 #if 0 1874 drm_sysfs_connector_remove(connector); 1875 #endif 1876 drm_connector_cleanup(connector); 1877 kfree(intel_sdvo_connector); 1878 } 1879 1880 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector) 1881 { 1882 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1883 struct edid *edid; 1884 bool has_audio = false; 1885 1886 if (!intel_sdvo->is_hdmi) 1887 return false; 1888 1889 edid = intel_sdvo_get_edid(connector); 1890 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL) 1891 has_audio = drm_detect_monitor_audio(edid); 1892 kfree(edid); 1893 1894 return has_audio; 1895 } 1896 1897 static int 1898 intel_sdvo_set_property(struct drm_connector *connector, 1899 struct drm_property *property, 1900 uint64_t val) 1901 { 1902 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1903 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1904 struct drm_i915_private *dev_priv = connector->dev->dev_private; 1905 uint16_t temp_value; 1906 uint8_t cmd; 1907 int ret; 1908 1909 ret = drm_object_property_set_value(&connector->base, property, val); 1910 if (ret) 1911 return ret; 1912 1913 if (property == dev_priv->force_audio_property) { 1914 int i = val; 1915 bool has_audio; 1916 1917 if (i == intel_sdvo_connector->force_audio) 1918 return 0; 1919 1920 intel_sdvo_connector->force_audio = i; 1921 1922 if (i == HDMI_AUDIO_AUTO) 1923 has_audio = intel_sdvo_detect_hdmi_audio(connector); 1924 else 1925 has_audio = (i == HDMI_AUDIO_ON); 1926 1927 if (has_audio == intel_sdvo->has_hdmi_audio) 1928 return 0; 1929 1930 intel_sdvo->has_hdmi_audio = has_audio; 1931 goto done; 1932 } 1933 1934 if (property == dev_priv->broadcast_rgb_property) { 1935 bool old_auto = intel_sdvo->color_range_auto; 1936 uint32_t old_range = intel_sdvo->color_range; 1937 1938 switch (val) { 1939 case INTEL_BROADCAST_RGB_AUTO: 1940 intel_sdvo->color_range_auto = true; 1941 break; 1942 case INTEL_BROADCAST_RGB_FULL: 1943 intel_sdvo->color_range_auto = false; 1944 intel_sdvo->color_range = 0; 1945 break; 1946 case INTEL_BROADCAST_RGB_LIMITED: 1947 intel_sdvo->color_range_auto = false; 1948 /* FIXME: this bit is only valid when using TMDS 1949 * encoding and 8 bit per color mode. */ 1950 intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235; 1951 break; 1952 default: 1953 return -EINVAL; 1954 } 1955 1956 if (old_auto == intel_sdvo->color_range_auto && 1957 old_range == intel_sdvo->color_range) 1958 return 0; 1959 1960 goto done; 1961 } 1962 1963 #define CHECK_PROPERTY(name, NAME) \ 1964 if (intel_sdvo_connector->name == property) { \ 1965 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \ 1966 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \ 1967 cmd = SDVO_CMD_SET_##NAME; \ 1968 intel_sdvo_connector->cur_##name = temp_value; \ 1969 goto set_value; \ 1970 } 1971 1972 if (property == intel_sdvo_connector->tv_format) { 1973 if (val >= TV_FORMAT_NUM) 1974 return -EINVAL; 1975 1976 if (intel_sdvo->tv_format_index == 1977 intel_sdvo_connector->tv_format_supported[val]) 1978 return 0; 1979 1980 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val]; 1981 goto done; 1982 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) { 1983 temp_value = val; 1984 if (intel_sdvo_connector->left == property) { 1985 drm_object_property_set_value(&connector->base, 1986 intel_sdvo_connector->right, val); 1987 if (intel_sdvo_connector->left_margin == temp_value) 1988 return 0; 1989 1990 intel_sdvo_connector->left_margin = temp_value; 1991 intel_sdvo_connector->right_margin = temp_value; 1992 temp_value = intel_sdvo_connector->max_hscan - 1993 intel_sdvo_connector->left_margin; 1994 cmd = SDVO_CMD_SET_OVERSCAN_H; 1995 goto set_value; 1996 } else if (intel_sdvo_connector->right == property) { 1997 drm_object_property_set_value(&connector->base, 1998 intel_sdvo_connector->left, val); 1999 if (intel_sdvo_connector->right_margin == temp_value) 2000 return 0; 2001 2002 intel_sdvo_connector->left_margin = temp_value; 2003 intel_sdvo_connector->right_margin = temp_value; 2004 temp_value = intel_sdvo_connector->max_hscan - 2005 intel_sdvo_connector->left_margin; 2006 cmd = SDVO_CMD_SET_OVERSCAN_H; 2007 goto set_value; 2008 } else if (intel_sdvo_connector->top == property) { 2009 drm_object_property_set_value(&connector->base, 2010 intel_sdvo_connector->bottom, val); 2011 if (intel_sdvo_connector->top_margin == temp_value) 2012 return 0; 2013 2014 intel_sdvo_connector->top_margin = temp_value; 2015 intel_sdvo_connector->bottom_margin = temp_value; 2016 temp_value = intel_sdvo_connector->max_vscan - 2017 intel_sdvo_connector->top_margin; 2018 cmd = SDVO_CMD_SET_OVERSCAN_V; 2019 goto set_value; 2020 } else if (intel_sdvo_connector->bottom == property) { 2021 drm_object_property_set_value(&connector->base, 2022 intel_sdvo_connector->top, val); 2023 if (intel_sdvo_connector->bottom_margin == temp_value) 2024 return 0; 2025 2026 intel_sdvo_connector->top_margin = temp_value; 2027 intel_sdvo_connector->bottom_margin = temp_value; 2028 temp_value = intel_sdvo_connector->max_vscan - 2029 intel_sdvo_connector->top_margin; 2030 cmd = SDVO_CMD_SET_OVERSCAN_V; 2031 goto set_value; 2032 } 2033 CHECK_PROPERTY(hpos, HPOS) 2034 CHECK_PROPERTY(vpos, VPOS) 2035 CHECK_PROPERTY(saturation, SATURATION) 2036 CHECK_PROPERTY(contrast, CONTRAST) 2037 CHECK_PROPERTY(hue, HUE) 2038 CHECK_PROPERTY(brightness, BRIGHTNESS) 2039 CHECK_PROPERTY(sharpness, SHARPNESS) 2040 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER) 2041 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D) 2042 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE) 2043 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER) 2044 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER) 2045 CHECK_PROPERTY(dot_crawl, DOT_CRAWL) 2046 } 2047 2048 return -EINVAL; /* unknown property */ 2049 2050 set_value: 2051 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2)) 2052 return -EIO; 2053 2054 2055 done: 2056 if (intel_sdvo->base.base.crtc) 2057 intel_crtc_restore_mode(intel_sdvo->base.base.crtc); 2058 2059 return 0; 2060 #undef CHECK_PROPERTY 2061 } 2062 2063 static const struct drm_connector_funcs intel_sdvo_connector_funcs = { 2064 .dpms = intel_sdvo_dpms, 2065 .detect = intel_sdvo_detect, 2066 .fill_modes = drm_helper_probe_single_connector_modes, 2067 .set_property = intel_sdvo_set_property, 2068 .destroy = intel_sdvo_destroy, 2069 }; 2070 2071 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = { 2072 .get_modes = intel_sdvo_get_modes, 2073 .mode_valid = intel_sdvo_mode_valid, 2074 .best_encoder = intel_best_encoder, 2075 }; 2076 2077 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder) 2078 { 2079 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder); 2080 2081 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL) 2082 drm_mode_destroy(encoder->dev, 2083 intel_sdvo->sdvo_lvds_fixed_mode); 2084 2085 device_delete_child(intel_sdvo->base.base.dev->dev, 2086 intel_sdvo->ddc_iic_bus); 2087 intel_encoder_destroy(encoder); 2088 } 2089 2090 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = { 2091 .destroy = intel_sdvo_enc_destroy, 2092 }; 2093 2094 static void 2095 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo) 2096 { 2097 uint16_t mask = 0; 2098 unsigned int num_bits; 2099 2100 /* Make a mask of outputs less than or equal to our own priority in the 2101 * list. 2102 */ 2103 switch (sdvo->controlled_output) { 2104 case SDVO_OUTPUT_LVDS1: 2105 mask |= SDVO_OUTPUT_LVDS1; 2106 case SDVO_OUTPUT_LVDS0: 2107 mask |= SDVO_OUTPUT_LVDS0; 2108 case SDVO_OUTPUT_TMDS1: 2109 mask |= SDVO_OUTPUT_TMDS1; 2110 case SDVO_OUTPUT_TMDS0: 2111 mask |= SDVO_OUTPUT_TMDS0; 2112 case SDVO_OUTPUT_RGB1: 2113 mask |= SDVO_OUTPUT_RGB1; 2114 case SDVO_OUTPUT_RGB0: 2115 mask |= SDVO_OUTPUT_RGB0; 2116 break; 2117 } 2118 2119 /* Count bits to find what number we are in the priority list. */ 2120 mask &= sdvo->caps.output_flags; 2121 num_bits = hweight16(mask); 2122 /* If more than 3 outputs, default to DDC bus 3 for now. */ 2123 if (num_bits > 3) 2124 num_bits = 3; 2125 2126 /* Corresponds to SDVO_CONTROL_BUS_DDCx */ 2127 sdvo->ddc_bus = 1 << num_bits; 2128 } 2129 2130 /** 2131 * Choose the appropriate DDC bus for control bus switch command for this 2132 * SDVO output based on the controlled output. 2133 * 2134 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS 2135 * outputs, then LVDS outputs. 2136 */ 2137 static void 2138 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv, 2139 struct intel_sdvo *sdvo, u32 reg) 2140 { 2141 struct sdvo_device_mapping *mapping; 2142 2143 if (sdvo->is_sdvob) 2144 mapping = &(dev_priv->sdvo_mappings[0]); 2145 else 2146 mapping = &(dev_priv->sdvo_mappings[1]); 2147 2148 if (mapping->initialized) 2149 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4); 2150 else 2151 intel_sdvo_guess_ddc_bus(sdvo); 2152 } 2153 2154 static void 2155 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv, 2156 struct intel_sdvo *sdvo, u32 reg) 2157 { 2158 struct sdvo_device_mapping *mapping; 2159 u8 pin; 2160 2161 if (sdvo->is_sdvob) 2162 mapping = &dev_priv->sdvo_mappings[0]; 2163 else 2164 mapping = &dev_priv->sdvo_mappings[1]; 2165 2166 if (mapping->initialized && intel_gmbus_is_port_valid(mapping->i2c_pin)) 2167 pin = mapping->i2c_pin; 2168 else 2169 pin = GMBUS_PORT_DPB; 2170 2171 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin); 2172 2173 /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow 2174 * our code totally fails once we start using gmbus. Hence fall back to 2175 * bit banging for now. */ 2176 intel_gmbus_force_bit(sdvo->i2c, true); 2177 } 2178 2179 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */ 2180 static void 2181 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo) 2182 { 2183 intel_gmbus_force_bit(sdvo->i2c, false); 2184 } 2185 2186 static bool 2187 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device) 2188 { 2189 return intel_sdvo_check_supp_encode(intel_sdvo); 2190 } 2191 2192 static u8 2193 intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo) 2194 { 2195 struct drm_i915_private *dev_priv = dev->dev_private; 2196 struct sdvo_device_mapping *my_mapping, *other_mapping; 2197 2198 if (sdvo->is_sdvob) { 2199 my_mapping = &dev_priv->sdvo_mappings[0]; 2200 other_mapping = &dev_priv->sdvo_mappings[1]; 2201 } else { 2202 my_mapping = &dev_priv->sdvo_mappings[1]; 2203 other_mapping = &dev_priv->sdvo_mappings[0]; 2204 } 2205 2206 /* If the BIOS described our SDVO device, take advantage of it. */ 2207 if (my_mapping->slave_addr) 2208 return my_mapping->slave_addr; 2209 2210 /* If the BIOS only described a different SDVO device, use the 2211 * address that it isn't using. 2212 */ 2213 if (other_mapping->slave_addr) { 2214 if (other_mapping->slave_addr == 0x70) 2215 return 0x72; 2216 else 2217 return 0x70; 2218 } 2219 2220 /* No SDVO device info is found for another DVO port, 2221 * so use mapping assumption we had before BIOS parsing. 2222 */ 2223 if (sdvo->is_sdvob) 2224 return 0x70; 2225 else 2226 return 0x72; 2227 } 2228 2229 static void 2230 intel_sdvo_connector_init(struct intel_sdvo_connector *connector, 2231 struct intel_sdvo *encoder) 2232 { 2233 drm_connector_init(encoder->base.base.dev, 2234 &connector->base.base, 2235 &intel_sdvo_connector_funcs, 2236 connector->base.base.connector_type); 2237 2238 drm_connector_helper_add(&connector->base.base, 2239 &intel_sdvo_connector_helper_funcs); 2240 2241 connector->base.base.interlace_allowed = 1; 2242 connector->base.base.doublescan_allowed = 0; 2243 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB; 2244 connector->base.get_hw_state = intel_sdvo_connector_get_hw_state; 2245 2246 intel_connector_attach_encoder(&connector->base, &encoder->base); 2247 #if 0 2248 drm_sysfs_connector_add(&connector->base.base); 2249 #endif 2250 } 2251 2252 static void 2253 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo, 2254 struct intel_sdvo_connector *connector) 2255 { 2256 struct drm_device *dev = connector->base.base.dev; 2257 2258 intel_attach_force_audio_property(&connector->base.base); 2259 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) { 2260 intel_attach_broadcast_rgb_property(&connector->base.base); 2261 intel_sdvo->color_range_auto = true; 2262 } 2263 } 2264 2265 static bool 2266 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device) 2267 { 2268 struct drm_encoder *encoder = &intel_sdvo->base.base; 2269 struct drm_connector *connector; 2270 struct intel_encoder *intel_encoder = to_intel_encoder(encoder); 2271 struct intel_connector *intel_connector; 2272 struct intel_sdvo_connector *intel_sdvo_connector; 2273 2274 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL); 2275 if (!intel_sdvo_connector) 2276 return false; 2277 2278 if (device == 0) { 2279 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0; 2280 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0; 2281 } else if (device == 1) { 2282 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1; 2283 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1; 2284 } 2285 2286 intel_connector = &intel_sdvo_connector->base; 2287 connector = &intel_connector->base; 2288 if (intel_sdvo_get_hotplug_support(intel_sdvo) & 2289 intel_sdvo_connector->output_flag) { 2290 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag; 2291 /* Some SDVO devices have one-shot hotplug interrupts. 2292 * Ensure that they get re-enabled when an interrupt happens. 2293 */ 2294 intel_encoder->hot_plug = intel_sdvo_enable_hotplug; 2295 intel_sdvo_enable_hotplug(intel_encoder); 2296 } else { 2297 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT; 2298 } 2299 encoder->encoder_type = DRM_MODE_ENCODER_TMDS; 2300 connector->connector_type = DRM_MODE_CONNECTOR_DVID; 2301 2302 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) { 2303 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA; 2304 intel_sdvo->is_hdmi = true; 2305 } 2306 2307 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo); 2308 if (intel_sdvo->is_hdmi) 2309 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector); 2310 2311 return true; 2312 } 2313 2314 static bool 2315 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type) 2316 { 2317 struct drm_encoder *encoder = &intel_sdvo->base.base; 2318 struct drm_connector *connector; 2319 struct intel_connector *intel_connector; 2320 struct intel_sdvo_connector *intel_sdvo_connector; 2321 2322 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL); 2323 if (!intel_sdvo_connector) 2324 return false; 2325 2326 intel_connector = &intel_sdvo_connector->base; 2327 connector = &intel_connector->base; 2328 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC; 2329 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO; 2330 2331 intel_sdvo->controlled_output |= type; 2332 intel_sdvo_connector->output_flag = type; 2333 2334 intel_sdvo->is_tv = true; 2335 intel_sdvo->base.needs_tv_clock = true; 2336 2337 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo); 2338 2339 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type)) 2340 goto err; 2341 2342 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector)) 2343 goto err; 2344 2345 return true; 2346 2347 err: 2348 intel_sdvo_destroy(connector); 2349 return false; 2350 } 2351 2352 static bool 2353 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device) 2354 { 2355 struct drm_encoder *encoder = &intel_sdvo->base.base; 2356 struct drm_connector *connector; 2357 struct intel_connector *intel_connector; 2358 struct intel_sdvo_connector *intel_sdvo_connector; 2359 2360 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL); 2361 if (!intel_sdvo_connector) 2362 return false; 2363 2364 intel_connector = &intel_sdvo_connector->base; 2365 connector = &intel_connector->base; 2366 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT; 2367 encoder->encoder_type = DRM_MODE_ENCODER_DAC; 2368 connector->connector_type = DRM_MODE_CONNECTOR_VGA; 2369 2370 if (device == 0) { 2371 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0; 2372 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0; 2373 } else if (device == 1) { 2374 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1; 2375 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1; 2376 } 2377 2378 intel_sdvo_connector_init(intel_sdvo_connector, 2379 intel_sdvo); 2380 return true; 2381 } 2382 2383 static bool 2384 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device) 2385 { 2386 struct drm_encoder *encoder = &intel_sdvo->base.base; 2387 struct drm_connector *connector; 2388 struct intel_connector *intel_connector; 2389 struct intel_sdvo_connector *intel_sdvo_connector; 2390 2391 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL); 2392 if (!intel_sdvo_connector) 2393 return false; 2394 2395 intel_connector = &intel_sdvo_connector->base; 2396 connector = &intel_connector->base; 2397 encoder->encoder_type = DRM_MODE_ENCODER_LVDS; 2398 connector->connector_type = DRM_MODE_CONNECTOR_LVDS; 2399 2400 if (device == 0) { 2401 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0; 2402 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0; 2403 } else if (device == 1) { 2404 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1; 2405 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1; 2406 } 2407 2408 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo); 2409 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector)) 2410 goto err; 2411 2412 return true; 2413 2414 err: 2415 intel_sdvo_destroy(connector); 2416 return false; 2417 } 2418 2419 static bool 2420 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags) 2421 { 2422 intel_sdvo->is_tv = false; 2423 intel_sdvo->base.needs_tv_clock = false; 2424 intel_sdvo->is_lvds = false; 2425 2426 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/ 2427 2428 if (flags & SDVO_OUTPUT_TMDS0) 2429 if (!intel_sdvo_dvi_init(intel_sdvo, 0)) 2430 return false; 2431 2432 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK) 2433 if (!intel_sdvo_dvi_init(intel_sdvo, 1)) 2434 return false; 2435 2436 /* TV has no XXX1 function block */ 2437 if (flags & SDVO_OUTPUT_SVID0) 2438 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0)) 2439 return false; 2440 2441 if (flags & SDVO_OUTPUT_CVBS0) 2442 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0)) 2443 return false; 2444 2445 if (flags & SDVO_OUTPUT_YPRPB0) 2446 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0)) 2447 return false; 2448 2449 if (flags & SDVO_OUTPUT_RGB0) 2450 if (!intel_sdvo_analog_init(intel_sdvo, 0)) 2451 return false; 2452 2453 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK) 2454 if (!intel_sdvo_analog_init(intel_sdvo, 1)) 2455 return false; 2456 2457 if (flags & SDVO_OUTPUT_LVDS0) 2458 if (!intel_sdvo_lvds_init(intel_sdvo, 0)) 2459 return false; 2460 2461 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK) 2462 if (!intel_sdvo_lvds_init(intel_sdvo, 1)) 2463 return false; 2464 2465 if ((flags & SDVO_OUTPUT_MASK) == 0) { 2466 unsigned char bytes[2]; 2467 2468 intel_sdvo->controlled_output = 0; 2469 memcpy(bytes, &intel_sdvo->caps.output_flags, 2); 2470 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n", 2471 SDVO_NAME(intel_sdvo), 2472 bytes[0], bytes[1]); 2473 return false; 2474 } 2475 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); 2476 2477 return true; 2478 } 2479 2480 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo) 2481 { 2482 struct drm_device *dev = intel_sdvo->base.base.dev; 2483 struct drm_connector *connector, *tmp; 2484 2485 list_for_each_entry_safe(connector, tmp, 2486 &dev->mode_config.connector_list, head) { 2487 if (intel_attached_encoder(connector) == &intel_sdvo->base) 2488 intel_sdvo_destroy(connector); 2489 } 2490 } 2491 2492 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo, 2493 struct intel_sdvo_connector *intel_sdvo_connector, 2494 int type) 2495 { 2496 struct drm_device *dev = intel_sdvo->base.base.dev; 2497 struct intel_sdvo_tv_format format; 2498 uint32_t format_map, i; 2499 2500 if (!intel_sdvo_set_target_output(intel_sdvo, type)) 2501 return false; 2502 2503 BUILD_BUG_ON(sizeof(format) != 6); 2504 if (!intel_sdvo_get_value(intel_sdvo, 2505 SDVO_CMD_GET_SUPPORTED_TV_FORMATS, 2506 &format, sizeof(format))) 2507 return false; 2508 2509 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format))); 2510 2511 if (format_map == 0) 2512 return false; 2513 2514 intel_sdvo_connector->format_supported_num = 0; 2515 for (i = 0 ; i < TV_FORMAT_NUM; i++) 2516 if (format_map & (1 << i)) 2517 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i; 2518 2519 2520 intel_sdvo_connector->tv_format = 2521 drm_property_create(dev, DRM_MODE_PROP_ENUM, 2522 "mode", intel_sdvo_connector->format_supported_num); 2523 if (!intel_sdvo_connector->tv_format) 2524 return false; 2525 2526 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++) 2527 drm_property_add_enum( 2528 intel_sdvo_connector->tv_format, i, 2529 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]); 2530 2531 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0]; 2532 drm_object_attach_property(&intel_sdvo_connector->base.base.base, 2533 intel_sdvo_connector->tv_format, 0); 2534 return true; 2535 2536 } 2537 2538 #define ENHANCEMENT(name, NAME) do { \ 2539 if (enhancements.name) { \ 2540 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \ 2541 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \ 2542 return false; \ 2543 intel_sdvo_connector->max_##name = data_value[0]; \ 2544 intel_sdvo_connector->cur_##name = response; \ 2545 intel_sdvo_connector->name = \ 2546 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \ 2547 if (!intel_sdvo_connector->name) return false; \ 2548 drm_object_attach_property(&connector->base, \ 2549 intel_sdvo_connector->name, \ 2550 intel_sdvo_connector->cur_##name); \ 2551 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \ 2552 data_value[0], data_value[1], response); \ 2553 } \ 2554 } while (0) 2555 2556 static bool 2557 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo, 2558 struct intel_sdvo_connector *intel_sdvo_connector, 2559 struct intel_sdvo_enhancements_reply enhancements) 2560 { 2561 struct drm_device *dev = intel_sdvo->base.base.dev; 2562 struct drm_connector *connector = &intel_sdvo_connector->base.base; 2563 uint16_t response, data_value[2]; 2564 2565 /* when horizontal overscan is supported, Add the left/right property */ 2566 if (enhancements.overscan_h) { 2567 if (!intel_sdvo_get_value(intel_sdvo, 2568 SDVO_CMD_GET_MAX_OVERSCAN_H, 2569 &data_value, 4)) 2570 return false; 2571 2572 if (!intel_sdvo_get_value(intel_sdvo, 2573 SDVO_CMD_GET_OVERSCAN_H, 2574 &response, 2)) 2575 return false; 2576 2577 intel_sdvo_connector->max_hscan = data_value[0]; 2578 intel_sdvo_connector->left_margin = data_value[0] - response; 2579 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin; 2580 intel_sdvo_connector->left = 2581 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]); 2582 if (!intel_sdvo_connector->left) 2583 return false; 2584 2585 drm_object_attach_property(&connector->base, 2586 intel_sdvo_connector->left, 2587 intel_sdvo_connector->left_margin); 2588 2589 intel_sdvo_connector->right = 2590 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]); 2591 if (!intel_sdvo_connector->right) 2592 return false; 2593 2594 drm_object_attach_property(&connector->base, 2595 intel_sdvo_connector->right, 2596 intel_sdvo_connector->right_margin); 2597 DRM_DEBUG_KMS("h_overscan: max %d, " 2598 "default %d, current %d\n", 2599 data_value[0], data_value[1], response); 2600 } 2601 2602 if (enhancements.overscan_v) { 2603 if (!intel_sdvo_get_value(intel_sdvo, 2604 SDVO_CMD_GET_MAX_OVERSCAN_V, 2605 &data_value, 4)) 2606 return false; 2607 2608 if (!intel_sdvo_get_value(intel_sdvo, 2609 SDVO_CMD_GET_OVERSCAN_V, 2610 &response, 2)) 2611 return false; 2612 2613 intel_sdvo_connector->max_vscan = data_value[0]; 2614 intel_sdvo_connector->top_margin = data_value[0] - response; 2615 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin; 2616 intel_sdvo_connector->top = 2617 drm_property_create_range(dev, 0, 2618 "top_margin", 0, data_value[0]); 2619 if (!intel_sdvo_connector->top) 2620 return false; 2621 2622 drm_object_attach_property(&connector->base, 2623 intel_sdvo_connector->top, 2624 intel_sdvo_connector->top_margin); 2625 2626 intel_sdvo_connector->bottom = 2627 drm_property_create_range(dev, 0, 2628 "bottom_margin", 0, data_value[0]); 2629 if (!intel_sdvo_connector->bottom) 2630 return false; 2631 2632 drm_object_attach_property(&connector->base, 2633 intel_sdvo_connector->bottom, 2634 intel_sdvo_connector->bottom_margin); 2635 DRM_DEBUG_KMS("v_overscan: max %d, " 2636 "default %d, current %d\n", 2637 data_value[0], data_value[1], response); 2638 } 2639 2640 ENHANCEMENT(hpos, HPOS); 2641 ENHANCEMENT(vpos, VPOS); 2642 ENHANCEMENT(saturation, SATURATION); 2643 ENHANCEMENT(contrast, CONTRAST); 2644 ENHANCEMENT(hue, HUE); 2645 ENHANCEMENT(sharpness, SHARPNESS); 2646 ENHANCEMENT(brightness, BRIGHTNESS); 2647 ENHANCEMENT(flicker_filter, FLICKER_FILTER); 2648 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE); 2649 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D); 2650 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER); 2651 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER); 2652 2653 if (enhancements.dot_crawl) { 2654 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2)) 2655 return false; 2656 2657 intel_sdvo_connector->max_dot_crawl = 1; 2658 intel_sdvo_connector->cur_dot_crawl = response & 0x1; 2659 intel_sdvo_connector->dot_crawl = 2660 drm_property_create_range(dev, 0, "dot_crawl", 0, 1); 2661 if (!intel_sdvo_connector->dot_crawl) 2662 return false; 2663 2664 drm_object_attach_property(&connector->base, 2665 intel_sdvo_connector->dot_crawl, 2666 intel_sdvo_connector->cur_dot_crawl); 2667 DRM_DEBUG_KMS("dot crawl: current %d\n", response); 2668 } 2669 2670 return true; 2671 } 2672 2673 static bool 2674 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo, 2675 struct intel_sdvo_connector *intel_sdvo_connector, 2676 struct intel_sdvo_enhancements_reply enhancements) 2677 { 2678 struct drm_device *dev = intel_sdvo->base.base.dev; 2679 struct drm_connector *connector = &intel_sdvo_connector->base.base; 2680 uint16_t response, data_value[2]; 2681 2682 ENHANCEMENT(brightness, BRIGHTNESS); 2683 2684 return true; 2685 } 2686 #undef ENHANCEMENT 2687 2688 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo, 2689 struct intel_sdvo_connector *intel_sdvo_connector) 2690 { 2691 union { 2692 struct intel_sdvo_enhancements_reply reply; 2693 uint16_t response; 2694 } enhancements; 2695 2696 BUILD_BUG_ON(sizeof(enhancements) != 2); 2697 2698 enhancements.response = 0; 2699 intel_sdvo_get_value(intel_sdvo, 2700 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS, 2701 &enhancements, sizeof(enhancements)); 2702 if (enhancements.response == 0) { 2703 DRM_DEBUG_KMS("No enhancement is supported\n"); 2704 return true; 2705 } 2706 2707 if (IS_TV(intel_sdvo_connector)) 2708 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply); 2709 else if (IS_LVDS(intel_sdvo_connector)) 2710 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply); 2711 else 2712 return true; 2713 } 2714 2715 struct intel_sdvo_ddc_proxy_sc { 2716 struct intel_sdvo *intel_sdvo; 2717 device_t port; 2718 }; 2719 2720 static int 2721 intel_sdvo_ddc_proxy_probe(device_t idev) 2722 { 2723 2724 return (BUS_PROBE_DEFAULT); 2725 } 2726 2727 static int 2728 intel_sdvo_ddc_proxy_attach(device_t idev) 2729 { 2730 struct intel_sdvo_ddc_proxy_sc *sc; 2731 2732 sc = device_get_softc(idev); 2733 sc->port = device_add_child(idev, "iicbus", -1); 2734 if (sc->port == NULL) 2735 return (ENXIO); 2736 device_quiet(sc->port); 2737 bus_generic_attach(idev); 2738 return (0); 2739 } 2740 2741 static int 2742 intel_sdvo_ddc_proxy_detach(device_t idev) 2743 { 2744 struct intel_sdvo_ddc_proxy_sc *sc; 2745 device_t port; 2746 2747 sc = device_get_softc(idev); 2748 port = sc->port; 2749 bus_generic_detach(idev); 2750 if (port != NULL) 2751 device_delete_child(idev, port); 2752 return (0); 2753 } 2754 2755 static int 2756 intel_sdvo_ddc_proxy_reset(device_t idev, u_char speed, u_char addr, 2757 u_char *oldaddr) 2758 { 2759 struct intel_sdvo_ddc_proxy_sc *sc; 2760 struct intel_sdvo *sdvo; 2761 2762 sc = device_get_softc(idev); 2763 sdvo = sc->intel_sdvo; 2764 2765 return (IICBUS_RESET(device_get_parent(sdvo->i2c), speed, addr, 2766 oldaddr)); 2767 } 2768 2769 static int intel_sdvo_ddc_proxy_xfer(struct device *adapter, 2770 struct i2c_msg *msgs, 2771 int num) 2772 { 2773 struct intel_sdvo_ddc_proxy_sc *sc = device_get_softc(adapter); 2774 struct intel_sdvo *sdvo = sc->intel_sdvo; 2775 2776 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus)) 2777 return -EIO; 2778 2779 return (iicbus_transfer(sdvo->i2c, msgs, num)); 2780 } 2781 2782 static bool 2783 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo, struct drm_device *dev, 2784 int sdvo_reg) 2785 { 2786 struct intel_sdvo_ddc_proxy_sc *sc; 2787 int ret; 2788 2789 sdvo->ddc_iic_bus = device_add_child(dev->dev, 2790 "intel_sdvo_ddc_proxy", sdvo_reg); 2791 if (sdvo->ddc_iic_bus == NULL) { 2792 DRM_ERROR("cannot create ddc proxy bus %d\n", sdvo_reg); 2793 return (false); 2794 } 2795 device_quiet(sdvo->ddc_iic_bus); 2796 ret = device_probe_and_attach(sdvo->ddc_iic_bus); 2797 if (ret != 0) { 2798 DRM_ERROR("cannot attach proxy bus %d error %d\n", 2799 sdvo_reg, ret); 2800 device_delete_child(dev->dev, sdvo->ddc_iic_bus); 2801 return (false); 2802 } 2803 sc = device_get_softc(sdvo->ddc_iic_bus); 2804 sc->intel_sdvo = sdvo; 2805 2806 sdvo->ddc = sc->port; 2807 return (true); 2808 } 2809 2810 static device_method_t intel_sdvo_ddc_proxy_methods[] = { 2811 DEVMETHOD(device_probe, intel_sdvo_ddc_proxy_probe), 2812 DEVMETHOD(device_attach, intel_sdvo_ddc_proxy_attach), 2813 DEVMETHOD(device_detach, intel_sdvo_ddc_proxy_detach), 2814 DEVMETHOD(iicbus_reset, intel_sdvo_ddc_proxy_reset), 2815 DEVMETHOD(iicbus_transfer, intel_sdvo_ddc_proxy_xfer), 2816 DEVMETHOD_END 2817 }; 2818 static driver_t intel_sdvo_ddc_proxy_driver = { 2819 "intel_sdvo_ddc_proxy", 2820 intel_sdvo_ddc_proxy_methods, 2821 sizeof(struct intel_sdvo_ddc_proxy_sc) 2822 }; 2823 static devclass_t intel_sdvo_devclass; 2824 DRIVER_MODULE_ORDERED(intel_sdvo_ddc_proxy, drm, intel_sdvo_ddc_proxy_driver, 2825 intel_sdvo_devclass, 0, 0, SI_ORDER_FIRST); 2826 2827 bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob) 2828 { 2829 struct drm_i915_private *dev_priv = dev->dev_private; 2830 struct intel_encoder *intel_encoder; 2831 struct intel_sdvo *intel_sdvo; 2832 u32 hotplug_mask; 2833 int i; 2834 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL); 2835 if (!intel_sdvo) 2836 return false; 2837 2838 intel_sdvo->sdvo_reg = sdvo_reg; 2839 intel_sdvo->is_sdvob = is_sdvob; 2840 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1; 2841 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg); 2842 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev, sdvo_reg)) 2843 goto err_i2c_bus; 2844 2845 /* encoder type will be decided later */ 2846 intel_encoder = &intel_sdvo->base; 2847 intel_encoder->type = INTEL_OUTPUT_SDVO; 2848 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0); 2849 2850 /* Read the regs to test if we can talk to the device */ 2851 for (i = 0; i < 0x40; i++) { 2852 u8 byte; 2853 2854 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) { 2855 DRM_DEBUG_KMS("No SDVO device found on %s\n", 2856 SDVO_NAME(intel_sdvo)); 2857 goto err; 2858 } 2859 } 2860 2861 hotplug_mask = 0; 2862 if (IS_G4X(dev)) { 2863 hotplug_mask = intel_sdvo->is_sdvob ? 2864 SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X; 2865 } else if (IS_GEN4(dev)) { 2866 hotplug_mask = intel_sdvo->is_sdvob ? 2867 SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965; 2868 } else { 2869 hotplug_mask = intel_sdvo->is_sdvob ? 2870 SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915; 2871 } 2872 2873 intel_encoder->compute_config = intel_sdvo_compute_config; 2874 intel_encoder->disable = intel_disable_sdvo; 2875 intel_encoder->mode_set = intel_sdvo_mode_set; 2876 intel_encoder->enable = intel_enable_sdvo; 2877 intel_encoder->get_hw_state = intel_sdvo_get_hw_state; 2878 2879 /* In default case sdvo lvds is false */ 2880 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps)) 2881 goto err; 2882 2883 if (intel_sdvo_output_setup(intel_sdvo, 2884 intel_sdvo->caps.output_flags) != true) { 2885 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n", 2886 SDVO_NAME(intel_sdvo)); 2887 /* Output_setup can leave behind connectors! */ 2888 goto err_output; 2889 } 2890 2891 /* Only enable the hotplug irq if we need it, to work around noisy 2892 * hotplug lines. 2893 */ 2894 if (intel_sdvo->hotplug_active) { 2895 intel_encoder->hpd_pin = 2896 intel_sdvo->is_sdvob ? HPD_SDVO_B : HPD_SDVO_C; 2897 } 2898 2899 /* 2900 * Cloning SDVO with anything is often impossible, since the SDVO 2901 * encoder can request a special input timing mode. And even if that's 2902 * not the case we have evidence that cloning a plain unscaled mode with 2903 * VGA doesn't really work. Furthermore the cloning flags are way too 2904 * simplistic anyway to express such constraints, so just give up on 2905 * cloning for SDVO encoders. 2906 */ 2907 intel_sdvo->base.cloneable = false; 2908 2909 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg); 2910 2911 /* Set the input timing to the screen. Assume always input 0. */ 2912 if (!intel_sdvo_set_target_input(intel_sdvo)) 2913 goto err_output; 2914 2915 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo, 2916 &intel_sdvo->pixel_clock_min, 2917 &intel_sdvo->pixel_clock_max)) 2918 goto err_output; 2919 2920 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, " 2921 "clock range %dMHz - %dMHz, " 2922 "input 1: %c, input 2: %c, " 2923 "output 1: %c, output 2: %c\n", 2924 SDVO_NAME(intel_sdvo), 2925 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id, 2926 intel_sdvo->caps.device_rev_id, 2927 intel_sdvo->pixel_clock_min / 1000, 2928 intel_sdvo->pixel_clock_max / 1000, 2929 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N', 2930 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N', 2931 /* check currently supported outputs */ 2932 intel_sdvo->caps.output_flags & 2933 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N', 2934 intel_sdvo->caps.output_flags & 2935 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N'); 2936 return true; 2937 2938 err_output: 2939 intel_sdvo_output_cleanup(intel_sdvo); 2940 2941 err: 2942 drm_encoder_cleanup(&intel_encoder->base); 2943 err_i2c_bus: 2944 intel_sdvo_unselect_i2c_bus(intel_sdvo); 2945 kfree(intel_sdvo); 2946 2947 return false; 2948 } 2949