1 /* 2 * Copyright 2006 Dave Airlie <airlied@linux.ie> 3 * Copyright © 2006-2007 Intel Corporation 4 * Jesse Barnes <jesse.barnes@intel.com> 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the next 14 * paragraph) shall be included in all copies or substantial portions of the 15 * Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 23 * DEALINGS IN THE SOFTWARE. 24 * 25 * Authors: 26 * Eric Anholt <eric@anholt.net> 27 */ 28 #include <linux/i2c.h> 29 #include <linux/slab.h> 30 #include <linux/delay.h> 31 #include <linux/export.h> 32 #include <drm/drmP.h> 33 #include <drm/drm_atomic_helper.h> 34 #include <drm/drm_crtc.h> 35 #include <drm/drm_edid.h> 36 #include "intel_drv.h" 37 #include <drm/i915_drm.h> 38 #include "i915_drv.h" 39 #include "intel_sdvo_regs.h" 40 41 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1) 42 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1) 43 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1) 44 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0) 45 46 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\ 47 SDVO_TV_MASK) 48 49 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK) 50 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK) 51 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK) 52 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK)) 53 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK)) 54 55 56 static const char * const tv_format_names[] = { 57 "NTSC_M" , "NTSC_J" , "NTSC_443", 58 "PAL_B" , "PAL_D" , "PAL_G" , 59 "PAL_H" , "PAL_I" , "PAL_M" , 60 "PAL_N" , "PAL_NC" , "PAL_60" , 61 "SECAM_B" , "SECAM_D" , "SECAM_G" , 62 "SECAM_K" , "SECAM_K1", "SECAM_L" , 63 "SECAM_60" 64 }; 65 66 #define TV_FORMAT_NUM ARRAY_SIZE(tv_format_names) 67 68 struct intel_sdvo { 69 struct intel_encoder base; 70 71 struct i2c_adapter *i2c; 72 u8 slave_addr; 73 74 struct i2c_adapter ddc; 75 76 /* Register for the SDVO device: SDVOB or SDVOC */ 77 i915_reg_t sdvo_reg; 78 79 /* Active outputs controlled by this SDVO output */ 80 uint16_t controlled_output; 81 82 /* 83 * Capabilities of the SDVO device returned by 84 * intel_sdvo_get_capabilities() 85 */ 86 struct intel_sdvo_caps caps; 87 88 /* Pixel clock limitations reported by the SDVO device, in kHz */ 89 int pixel_clock_min, pixel_clock_max; 90 91 /* 92 * For multiple function SDVO device, 93 * this is for current attached outputs. 94 */ 95 uint16_t attached_output; 96 97 /* 98 * Hotplug activation bits for this device 99 */ 100 uint16_t hotplug_active; 101 102 /** 103 * This is set if we're going to treat the device as TV-out. 104 * 105 * While we have these nice friendly flags for output types that ought 106 * to decide this for us, the S-Video output on our HDMI+S-Video card 107 * shows up as RGB1 (VGA). 108 */ 109 bool is_tv; 110 111 enum port port; 112 113 /** 114 * This is set if we treat the device as HDMI, instead of DVI. 115 */ 116 bool is_hdmi; 117 bool has_hdmi_monitor; 118 bool has_hdmi_audio; 119 bool rgb_quant_range_selectable; 120 121 /** 122 * This is set if we detect output of sdvo device as LVDS and 123 * have a valid fixed mode to use with the panel. 124 */ 125 bool is_lvds; 126 127 /** 128 * This is sdvo fixed pannel mode pointer 129 */ 130 struct drm_display_mode *sdvo_lvds_fixed_mode; 131 132 /* DDC bus used by this SDVO encoder */ 133 uint8_t ddc_bus; 134 135 /* 136 * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd 137 */ 138 uint8_t dtd_sdvo_flags; 139 }; 140 141 struct intel_sdvo_connector { 142 struct intel_connector base; 143 144 /* Mark the type of connector */ 145 uint16_t output_flag; 146 147 /* This contains all current supported TV format */ 148 u8 tv_format_supported[TV_FORMAT_NUM]; 149 int format_supported_num; 150 struct drm_property *tv_format; 151 152 /* add the property for the SDVO-TV */ 153 struct drm_property *left; 154 struct drm_property *right; 155 struct drm_property *top; 156 struct drm_property *bottom; 157 struct drm_property *hpos; 158 struct drm_property *vpos; 159 struct drm_property *contrast; 160 struct drm_property *saturation; 161 struct drm_property *hue; 162 struct drm_property *sharpness; 163 struct drm_property *flicker_filter; 164 struct drm_property *flicker_filter_adaptive; 165 struct drm_property *flicker_filter_2d; 166 struct drm_property *tv_chroma_filter; 167 struct drm_property *tv_luma_filter; 168 struct drm_property *dot_crawl; 169 170 /* add the property for the SDVO-TV/LVDS */ 171 struct drm_property *brightness; 172 173 /* this is to get the range of margin.*/ 174 u32 max_hscan, max_vscan; 175 }; 176 177 struct intel_sdvo_connector_state { 178 /* base.base: tv.saturation/contrast/hue/brightness */ 179 struct intel_digital_connector_state base; 180 181 struct { 182 unsigned overscan_h, overscan_v, hpos, vpos, sharpness; 183 unsigned flicker_filter, flicker_filter_2d, flicker_filter_adaptive; 184 unsigned chroma_filter, luma_filter, dot_crawl; 185 } tv; 186 }; 187 188 static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder) 189 { 190 return container_of(encoder, struct intel_sdvo, base); 191 } 192 193 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector) 194 { 195 return to_sdvo(intel_attached_encoder(connector)); 196 } 197 198 static struct intel_sdvo_connector * 199 to_intel_sdvo_connector(struct drm_connector *connector) 200 { 201 return container_of(connector, struct intel_sdvo_connector, base.base); 202 } 203 204 #define to_intel_sdvo_connector_state(conn_state) \ 205 container_of((conn_state), struct intel_sdvo_connector_state, base.base) 206 207 static bool 208 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags); 209 static bool 210 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo, 211 struct intel_sdvo_connector *intel_sdvo_connector, 212 int type); 213 static bool 214 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo, 215 struct intel_sdvo_connector *intel_sdvo_connector); 216 217 /** 218 * Writes the SDVOB or SDVOC with the given value, but always writes both 219 * SDVOB and SDVOC to work around apparent hardware issues (according to 220 * comments in the BIOS). 221 */ 222 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val) 223 { 224 struct drm_device *dev = intel_sdvo->base.base.dev; 225 struct drm_i915_private *dev_priv = to_i915(dev); 226 u32 bval = val, cval = val; 227 int i; 228 229 if (HAS_PCH_SPLIT(dev_priv)) { 230 I915_WRITE(intel_sdvo->sdvo_reg, val); 231 POSTING_READ(intel_sdvo->sdvo_reg); 232 /* 233 * HW workaround, need to write this twice for issue 234 * that may result in first write getting masked. 235 */ 236 if (HAS_PCH_IBX(dev_priv)) { 237 I915_WRITE(intel_sdvo->sdvo_reg, val); 238 POSTING_READ(intel_sdvo->sdvo_reg); 239 } 240 return; 241 } 242 243 if (intel_sdvo->port == PORT_B) 244 cval = I915_READ(GEN3_SDVOC); 245 else 246 bval = I915_READ(GEN3_SDVOB); 247 248 /* 249 * Write the registers twice for luck. Sometimes, 250 * writing them only once doesn't appear to 'stick'. 251 * The BIOS does this too. Yay, magic 252 */ 253 for (i = 0; i < 2; i++) 254 { 255 I915_WRITE(GEN3_SDVOB, bval); 256 POSTING_READ(GEN3_SDVOB); 257 I915_WRITE(GEN3_SDVOC, cval); 258 POSTING_READ(GEN3_SDVOC); 259 } 260 } 261 262 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch) 263 { 264 struct i2c_msg msgs[] = { 265 { 266 .addr = intel_sdvo->slave_addr, 267 .flags = 0, 268 .len = 1, 269 .buf = &addr, 270 }, 271 { 272 .addr = intel_sdvo->slave_addr, 273 .flags = I2C_M_RD, 274 .len = 1, 275 .buf = ch, 276 } 277 }; 278 int ret; 279 280 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2) 281 return true; 282 283 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret); 284 return false; 285 } 286 287 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd} 288 /** Mapping of command numbers to names, for debug output */ 289 static const struct _sdvo_cmd_name { 290 u8 cmd; 291 const char *name; 292 } __attribute__ ((packed)) sdvo_cmd_names[] = { 293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET), 294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS), 295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV), 296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS), 297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS), 298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS), 299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP), 300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP), 301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS), 302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT), 303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG), 304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG), 305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE), 306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT), 307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT), 308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1), 309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2), 310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), 311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2), 312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), 313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1), 314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2), 315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1), 316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2), 317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING), 318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1), 319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2), 320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE), 321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE), 322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS), 323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT), 324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT), 325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS), 326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT), 327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT), 328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES), 329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE), 330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE), 331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE), 332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH), 333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT), 334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT), 335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS), 336 337 /* Add the op code for SDVO enhancements */ 338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS), 339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS), 340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS), 341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS), 342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS), 343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS), 344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION), 345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION), 346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION), 347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE), 348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE), 349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE), 350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST), 351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST), 352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST), 353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS), 354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS), 355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS), 356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H), 357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H), 358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H), 359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V), 360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V), 361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V), 362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER), 363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER), 364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER), 365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE), 366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE), 367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE), 368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D), 369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D), 370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D), 371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS), 372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS), 373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS), 374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL), 375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL), 376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER), 377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER), 378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER), 379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER), 380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER), 381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER), 382 383 /* HDMI op code */ 384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE), 385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE), 386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE), 387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI), 388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI), 389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP), 390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY), 391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY), 392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER), 393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT), 394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT), 395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX), 396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX), 397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO), 398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT), 399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT), 400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE), 401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE), 402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA), 403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA), 404 }; 405 406 #define SDVO_NAME(svdo) ((svdo)->port == PORT_B ? "SDVOB" : "SDVOC") 407 408 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd, 409 const void *args, int args_len) 410 { 411 int i, pos = 0; 412 #define BUF_LEN 256 413 char buffer[BUF_LEN]; 414 415 #define BUF_PRINT(args...) \ 416 pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args) 417 418 419 for (i = 0; i < args_len; i++) { 420 BUF_PRINT("%02X ", ((u8 *)args)[i]); 421 } 422 for (; i < 8; i++) { 423 BUF_PRINT(" "); 424 } 425 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) { 426 if (cmd == sdvo_cmd_names[i].cmd) { 427 BUF_PRINT("(%s)", sdvo_cmd_names[i].name); 428 break; 429 } 430 } 431 if (i == ARRAY_SIZE(sdvo_cmd_names)) { 432 BUF_PRINT("(%02X)", cmd); 433 } 434 BUG_ON(pos >= BUF_LEN - 1); 435 #undef BUF_PRINT 436 #undef BUF_LEN 437 438 DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer); 439 } 440 441 static const char * const cmd_status_names[] = { 442 "Power on", 443 "Success", 444 "Not supported", 445 "Invalid arg", 446 "Pending", 447 "Target not specified", 448 "Scaling not supported" 449 }; 450 451 static bool __intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd, 452 const void *args, int args_len, 453 bool unlocked) 454 { 455 u8 *buf, status; 456 struct i2c_msg *msgs; 457 int i, ret = true; 458 459 /* Would be simpler to allocate both in one go ? */ 460 buf = kzalloc(args_len * 2 + 2, GFP_KERNEL); 461 if (!buf) 462 return false; 463 464 msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL); 465 if (!msgs) { 466 kfree(buf); 467 return false; 468 } 469 470 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len); 471 472 for (i = 0; i < args_len; i++) { 473 msgs[i].addr = intel_sdvo->slave_addr; 474 msgs[i].flags = 0; 475 msgs[i].len = 2; 476 msgs[i].buf = buf + 2 *i; 477 buf[2*i + 0] = SDVO_I2C_ARG_0 - i; 478 buf[2*i + 1] = ((u8*)args)[i]; 479 } 480 msgs[i].addr = intel_sdvo->slave_addr; 481 msgs[i].flags = 0; 482 msgs[i].len = 2; 483 msgs[i].buf = buf + 2*i; 484 buf[2*i + 0] = SDVO_I2C_OPCODE; 485 buf[2*i + 1] = cmd; 486 487 /* the following two are to read the response */ 488 status = SDVO_I2C_CMD_STATUS; 489 msgs[i+1].addr = intel_sdvo->slave_addr; 490 msgs[i+1].flags = 0; 491 msgs[i+1].len = 1; 492 msgs[i+1].buf = &status; 493 494 msgs[i+2].addr = intel_sdvo->slave_addr; 495 msgs[i+2].flags = I2C_M_RD; 496 msgs[i+2].len = 1; 497 msgs[i+2].buf = &status; 498 499 if (unlocked) 500 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3); 501 else 502 ret = __i2c_transfer(intel_sdvo->i2c, msgs, i+3); 503 if (ret < 0) { 504 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret); 505 ret = false; 506 goto out; 507 } 508 if (ret != i+3) { 509 /* failure in I2C transfer */ 510 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3); 511 ret = false; 512 } 513 514 out: 515 kfree(msgs); 516 kfree(buf); 517 return ret; 518 } 519 520 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd, 521 const void *args, int args_len) 522 { 523 return __intel_sdvo_write_cmd(intel_sdvo, cmd, args, args_len, true); 524 } 525 526 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo, 527 void *response, int response_len) 528 { 529 u8 retry = 15; /* 5 quick checks, followed by 10 long checks */ 530 u8 status; 531 int i, pos = 0; 532 #define BUF_LEN 256 533 char buffer[BUF_LEN]; 534 535 536 /* 537 * The documentation states that all commands will be 538 * processed within 15µs, and that we need only poll 539 * the status byte a maximum of 3 times in order for the 540 * command to be complete. 541 * 542 * Check 5 times in case the hardware failed to read the docs. 543 * 544 * Also beware that the first response by many devices is to 545 * reply PENDING and stall for time. TVs are notorious for 546 * requiring longer than specified to complete their replies. 547 * Originally (in the DDX long ago), the delay was only ever 15ms 548 * with an additional delay of 30ms applied for TVs added later after 549 * many experiments. To accommodate both sets of delays, we do a 550 * sequence of slow checks if the device is falling behind and fails 551 * to reply within 5*15µs. 552 */ 553 if (!intel_sdvo_read_byte(intel_sdvo, 554 SDVO_I2C_CMD_STATUS, 555 &status)) 556 goto log_fail; 557 558 while ((status == SDVO_CMD_STATUS_PENDING || 559 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) { 560 if (retry < 10) 561 msleep(15); 562 else 563 udelay(15); 564 565 if (!intel_sdvo_read_byte(intel_sdvo, 566 SDVO_I2C_CMD_STATUS, 567 &status)) 568 goto log_fail; 569 } 570 571 #define BUF_PRINT(args...) \ 572 pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args) 573 574 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP) 575 BUF_PRINT("(%s)", cmd_status_names[status]); 576 else 577 BUF_PRINT("(??? %d)", status); 578 579 if (status != SDVO_CMD_STATUS_SUCCESS) 580 goto log_fail; 581 582 /* Read the command response */ 583 for (i = 0; i < response_len; i++) { 584 if (!intel_sdvo_read_byte(intel_sdvo, 585 SDVO_I2C_RETURN_0 + i, 586 &((u8 *)response)[i])) 587 goto log_fail; 588 BUF_PRINT(" %02X", ((u8 *)response)[i]); 589 } 590 BUG_ON(pos >= BUF_LEN - 1); 591 #undef BUF_PRINT 592 #undef BUF_LEN 593 594 DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer); 595 return true; 596 597 log_fail: 598 DRM_DEBUG_KMS("%s: R: ... failed\n", SDVO_NAME(intel_sdvo)); 599 return false; 600 } 601 602 static int intel_sdvo_get_pixel_multiplier(const struct drm_display_mode *adjusted_mode) 603 { 604 if (adjusted_mode->crtc_clock >= 100000) 605 return 1; 606 else if (adjusted_mode->crtc_clock >= 50000) 607 return 2; 608 else 609 return 4; 610 } 611 612 static bool __intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo, 613 u8 ddc_bus) 614 { 615 /* This must be the immediately preceding write before the i2c xfer */ 616 return __intel_sdvo_write_cmd(intel_sdvo, 617 SDVO_CMD_SET_CONTROL_BUS_SWITCH, 618 &ddc_bus, 1, false); 619 } 620 621 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len) 622 { 623 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len)) 624 return false; 625 626 return intel_sdvo_read_response(intel_sdvo, NULL, 0); 627 } 628 629 static bool 630 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len) 631 { 632 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0)) 633 return false; 634 635 return intel_sdvo_read_response(intel_sdvo, value, len); 636 } 637 638 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo) 639 { 640 struct intel_sdvo_set_target_input_args targets = {0}; 641 return intel_sdvo_set_value(intel_sdvo, 642 SDVO_CMD_SET_TARGET_INPUT, 643 &targets, sizeof(targets)); 644 } 645 646 /** 647 * Return whether each input is trained. 648 * 649 * This function is making an assumption about the layout of the response, 650 * which should be checked against the docs. 651 */ 652 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2) 653 { 654 struct intel_sdvo_get_trained_inputs_response response; 655 656 BUILD_BUG_ON(sizeof(response) != 1); 657 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS, 658 &response, sizeof(response))) 659 return false; 660 661 *input_1 = response.input0_trained; 662 *input_2 = response.input1_trained; 663 return true; 664 } 665 666 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo, 667 u16 outputs) 668 { 669 return intel_sdvo_set_value(intel_sdvo, 670 SDVO_CMD_SET_ACTIVE_OUTPUTS, 671 &outputs, sizeof(outputs)); 672 } 673 674 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo, 675 u16 *outputs) 676 { 677 return intel_sdvo_get_value(intel_sdvo, 678 SDVO_CMD_GET_ACTIVE_OUTPUTS, 679 outputs, sizeof(*outputs)); 680 } 681 682 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo, 683 int mode) 684 { 685 u8 state = SDVO_ENCODER_STATE_ON; 686 687 switch (mode) { 688 case DRM_MODE_DPMS_ON: 689 state = SDVO_ENCODER_STATE_ON; 690 break; 691 case DRM_MODE_DPMS_STANDBY: 692 state = SDVO_ENCODER_STATE_STANDBY; 693 break; 694 case DRM_MODE_DPMS_SUSPEND: 695 state = SDVO_ENCODER_STATE_SUSPEND; 696 break; 697 case DRM_MODE_DPMS_OFF: 698 state = SDVO_ENCODER_STATE_OFF; 699 break; 700 } 701 702 return intel_sdvo_set_value(intel_sdvo, 703 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state)); 704 } 705 706 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo, 707 int *clock_min, 708 int *clock_max) 709 { 710 struct intel_sdvo_pixel_clock_range clocks; 711 712 BUILD_BUG_ON(sizeof(clocks) != 4); 713 if (!intel_sdvo_get_value(intel_sdvo, 714 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE, 715 &clocks, sizeof(clocks))) 716 return false; 717 718 /* Convert the values from units of 10 kHz to kHz. */ 719 *clock_min = clocks.min * 10; 720 *clock_max = clocks.max * 10; 721 return true; 722 } 723 724 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo, 725 u16 outputs) 726 { 727 return intel_sdvo_set_value(intel_sdvo, 728 SDVO_CMD_SET_TARGET_OUTPUT, 729 &outputs, sizeof(outputs)); 730 } 731 732 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd, 733 struct intel_sdvo_dtd *dtd) 734 { 735 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) && 736 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2)); 737 } 738 739 static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd, 740 struct intel_sdvo_dtd *dtd) 741 { 742 return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) && 743 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2)); 744 } 745 746 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo, 747 struct intel_sdvo_dtd *dtd) 748 { 749 return intel_sdvo_set_timing(intel_sdvo, 750 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd); 751 } 752 753 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo, 754 struct intel_sdvo_dtd *dtd) 755 { 756 return intel_sdvo_set_timing(intel_sdvo, 757 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd); 758 } 759 760 static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo, 761 struct intel_sdvo_dtd *dtd) 762 { 763 return intel_sdvo_get_timing(intel_sdvo, 764 SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd); 765 } 766 767 static bool 768 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo, 769 uint16_t clock, 770 uint16_t width, 771 uint16_t height) 772 { 773 struct intel_sdvo_preferred_input_timing_args args; 774 775 memset(&args, 0, sizeof(args)); 776 args.clock = clock; 777 args.width = width; 778 args.height = height; 779 args.interlace = 0; 780 781 if (intel_sdvo->is_lvds && 782 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width || 783 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height)) 784 args.scaled = 1; 785 786 return intel_sdvo_set_value(intel_sdvo, 787 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING, 788 &args, sizeof(args)); 789 } 790 791 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo, 792 struct intel_sdvo_dtd *dtd) 793 { 794 BUILD_BUG_ON(sizeof(dtd->part1) != 8); 795 BUILD_BUG_ON(sizeof(dtd->part2) != 8); 796 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1, 797 &dtd->part1, sizeof(dtd->part1)) && 798 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2, 799 &dtd->part2, sizeof(dtd->part2)); 800 } 801 802 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val) 803 { 804 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1); 805 } 806 807 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd, 808 const struct drm_display_mode *mode) 809 { 810 uint16_t width, height; 811 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len; 812 uint16_t h_sync_offset, v_sync_offset; 813 int mode_clock; 814 815 memset(dtd, 0, sizeof(*dtd)); 816 817 width = mode->hdisplay; 818 height = mode->vdisplay; 819 820 /* do some mode translations */ 821 h_blank_len = mode->htotal - mode->hdisplay; 822 h_sync_len = mode->hsync_end - mode->hsync_start; 823 824 v_blank_len = mode->vtotal - mode->vdisplay; 825 v_sync_len = mode->vsync_end - mode->vsync_start; 826 827 h_sync_offset = mode->hsync_start - mode->hdisplay; 828 v_sync_offset = mode->vsync_start - mode->vdisplay; 829 830 mode_clock = mode->clock; 831 mode_clock /= 10; 832 dtd->part1.clock = mode_clock; 833 834 dtd->part1.h_active = width & 0xff; 835 dtd->part1.h_blank = h_blank_len & 0xff; 836 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) | 837 ((h_blank_len >> 8) & 0xf); 838 dtd->part1.v_active = height & 0xff; 839 dtd->part1.v_blank = v_blank_len & 0xff; 840 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) | 841 ((v_blank_len >> 8) & 0xf); 842 843 dtd->part2.h_sync_off = h_sync_offset & 0xff; 844 dtd->part2.h_sync_width = h_sync_len & 0xff; 845 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 | 846 (v_sync_len & 0xf); 847 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) | 848 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) | 849 ((v_sync_len & 0x30) >> 4); 850 851 dtd->part2.dtd_flags = 0x18; 852 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 853 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE; 854 if (mode->flags & DRM_MODE_FLAG_PHSYNC) 855 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE; 856 if (mode->flags & DRM_MODE_FLAG_PVSYNC) 857 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE; 858 859 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0; 860 } 861 862 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode, 863 const struct intel_sdvo_dtd *dtd) 864 { 865 struct drm_display_mode mode = {}; 866 867 mode.hdisplay = dtd->part1.h_active; 868 mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8; 869 mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off; 870 mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2; 871 mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width; 872 mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4; 873 mode.htotal = mode.hdisplay + dtd->part1.h_blank; 874 mode.htotal += (dtd->part1.h_high & 0xf) << 8; 875 876 mode.vdisplay = dtd->part1.v_active; 877 mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8; 878 mode.vsync_start = mode.vdisplay; 879 mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf; 880 mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2; 881 mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0; 882 mode.vsync_end = mode.vsync_start + 883 (dtd->part2.v_sync_off_width & 0xf); 884 mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4; 885 mode.vtotal = mode.vdisplay + dtd->part1.v_blank; 886 mode.vtotal += (dtd->part1.v_high & 0xf) << 8; 887 888 mode.clock = dtd->part1.clock * 10; 889 890 if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE) 891 mode.flags |= DRM_MODE_FLAG_INTERLACE; 892 if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE) 893 mode.flags |= DRM_MODE_FLAG_PHSYNC; 894 else 895 mode.flags |= DRM_MODE_FLAG_NHSYNC; 896 if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE) 897 mode.flags |= DRM_MODE_FLAG_PVSYNC; 898 else 899 mode.flags |= DRM_MODE_FLAG_NVSYNC; 900 901 drm_mode_set_crtcinfo(&mode, 0); 902 903 drm_mode_copy(pmode, &mode); 904 } 905 906 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo) 907 { 908 struct intel_sdvo_encode encode; 909 910 BUILD_BUG_ON(sizeof(encode) != 2); 911 return intel_sdvo_get_value(intel_sdvo, 912 SDVO_CMD_GET_SUPP_ENCODE, 913 &encode, sizeof(encode)); 914 } 915 916 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo, 917 uint8_t mode) 918 { 919 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1); 920 } 921 922 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo, 923 uint8_t mode) 924 { 925 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1); 926 } 927 928 #if 0 929 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo) 930 { 931 int i, j; 932 uint8_t set_buf_index[2]; 933 uint8_t av_split; 934 uint8_t buf_size; 935 uint8_t buf[48]; 936 uint8_t *pos; 937 938 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1); 939 940 for (i = 0; i <= av_split; i++) { 941 set_buf_index[0] = i; set_buf_index[1] = 0; 942 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX, 943 set_buf_index, 2); 944 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0); 945 intel_sdvo_read_response(encoder, &buf_size, 1); 946 947 pos = buf; 948 for (j = 0; j <= buf_size; j += 8) { 949 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA, 950 NULL, 0); 951 intel_sdvo_read_response(encoder, pos, 8); 952 pos += 8; 953 } 954 } 955 } 956 #endif 957 958 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo, 959 unsigned if_index, uint8_t tx_rate, 960 const uint8_t *data, unsigned length) 961 { 962 uint8_t set_buf_index[2] = { if_index, 0 }; 963 uint8_t hbuf_size, tmp[8]; 964 int i; 965 966 if (!intel_sdvo_set_value(intel_sdvo, 967 SDVO_CMD_SET_HBUF_INDEX, 968 set_buf_index, 2)) 969 return false; 970 971 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO, 972 &hbuf_size, 1)) 973 return false; 974 975 /* Buffer size is 0 based, hooray! */ 976 hbuf_size++; 977 978 DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n", 979 if_index, length, hbuf_size); 980 981 for (i = 0; i < hbuf_size; i += 8) { 982 memset(tmp, 0, 8); 983 if (i < length) 984 memcpy(tmp, data + i, min_t(unsigned, 8, length - i)); 985 986 if (!intel_sdvo_set_value(intel_sdvo, 987 SDVO_CMD_SET_HBUF_DATA, 988 tmp, 8)) 989 return false; 990 } 991 992 return intel_sdvo_set_value(intel_sdvo, 993 SDVO_CMD_SET_HBUF_TXRATE, 994 &tx_rate, 1); 995 } 996 997 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo, 998 const struct intel_crtc_state *pipe_config) 999 { 1000 uint8_t sdvo_data[HDMI_INFOFRAME_SIZE(AVI)]; 1001 union hdmi_infoframe frame; 1002 int ret; 1003 ssize_t len; 1004 1005 ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi, 1006 &pipe_config->base.adjusted_mode, 1007 false); 1008 if (ret < 0) { 1009 DRM_ERROR("couldn't fill AVI infoframe\n"); 1010 return false; 1011 } 1012 1013 if (intel_sdvo->rgb_quant_range_selectable) { 1014 if (pipe_config->limited_color_range) 1015 frame.avi.quantization_range = 1016 HDMI_QUANTIZATION_RANGE_LIMITED; 1017 else 1018 frame.avi.quantization_range = 1019 HDMI_QUANTIZATION_RANGE_FULL; 1020 } 1021 1022 len = hdmi_infoframe_pack(&frame, sdvo_data, sizeof(sdvo_data)); 1023 if (len < 0) 1024 return false; 1025 1026 return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF, 1027 SDVO_HBUF_TX_VSYNC, 1028 sdvo_data, sizeof(sdvo_data)); 1029 } 1030 1031 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo, 1032 const struct drm_connector_state *conn_state) 1033 { 1034 struct intel_sdvo_tv_format format; 1035 uint32_t format_map; 1036 1037 format_map = 1 << conn_state->tv.mode; 1038 memset(&format, 0, sizeof(format)); 1039 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map))); 1040 1041 BUILD_BUG_ON(sizeof(format) != 6); 1042 return intel_sdvo_set_value(intel_sdvo, 1043 SDVO_CMD_SET_TV_FORMAT, 1044 &format, sizeof(format)); 1045 } 1046 1047 static bool 1048 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo, 1049 const struct drm_display_mode *mode) 1050 { 1051 struct intel_sdvo_dtd output_dtd; 1052 1053 if (!intel_sdvo_set_target_output(intel_sdvo, 1054 intel_sdvo->attached_output)) 1055 return false; 1056 1057 intel_sdvo_get_dtd_from_mode(&output_dtd, mode); 1058 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd)) 1059 return false; 1060 1061 return true; 1062 } 1063 1064 /* Asks the sdvo controller for the preferred input mode given the output mode. 1065 * Unfortunately we have to set up the full output mode to do that. */ 1066 static bool 1067 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo, 1068 const struct drm_display_mode *mode, 1069 struct drm_display_mode *adjusted_mode) 1070 { 1071 struct intel_sdvo_dtd input_dtd; 1072 1073 /* Reset the input timing to the screen. Assume always input 0. */ 1074 if (!intel_sdvo_set_target_input(intel_sdvo)) 1075 return false; 1076 1077 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo, 1078 mode->clock / 10, 1079 mode->hdisplay, 1080 mode->vdisplay)) 1081 return false; 1082 1083 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo, 1084 &input_dtd)) 1085 return false; 1086 1087 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd); 1088 intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags; 1089 1090 return true; 1091 } 1092 1093 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config) 1094 { 1095 unsigned dotclock = pipe_config->port_clock; 1096 struct dpll *clock = &pipe_config->dpll; 1097 1098 /* SDVO TV has fixed PLL values depend on its clock range, 1099 this mirrors vbios setting. */ 1100 if (dotclock >= 100000 && dotclock < 140500) { 1101 clock->p1 = 2; 1102 clock->p2 = 10; 1103 clock->n = 3; 1104 clock->m1 = 16; 1105 clock->m2 = 8; 1106 } else if (dotclock >= 140500 && dotclock <= 200000) { 1107 clock->p1 = 1; 1108 clock->p2 = 10; 1109 clock->n = 6; 1110 clock->m1 = 12; 1111 clock->m2 = 8; 1112 } else { 1113 WARN(1, "SDVO TV clock out of range: %i\n", dotclock); 1114 } 1115 1116 pipe_config->clock_set = true; 1117 } 1118 1119 static bool intel_sdvo_compute_config(struct intel_encoder *encoder, 1120 struct intel_crtc_state *pipe_config, 1121 struct drm_connector_state *conn_state) 1122 { 1123 struct intel_sdvo *intel_sdvo = to_sdvo(encoder); 1124 struct intel_sdvo_connector_state *intel_sdvo_state = 1125 to_intel_sdvo_connector_state(conn_state); 1126 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; 1127 struct drm_display_mode *mode = &pipe_config->base.mode; 1128 1129 DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n"); 1130 pipe_config->pipe_bpp = 8*3; 1131 1132 if (HAS_PCH_SPLIT(to_i915(encoder->base.dev))) 1133 pipe_config->has_pch_encoder = true; 1134 1135 /* We need to construct preferred input timings based on our 1136 * output timings. To do that, we have to set the output 1137 * timings, even though this isn't really the right place in 1138 * the sequence to do it. Oh well. 1139 */ 1140 if (intel_sdvo->is_tv) { 1141 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode)) 1142 return false; 1143 1144 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo, 1145 mode, 1146 adjusted_mode); 1147 pipe_config->sdvo_tv_clock = true; 1148 } else if (intel_sdvo->is_lvds) { 1149 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, 1150 intel_sdvo->sdvo_lvds_fixed_mode)) 1151 return false; 1152 1153 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo, 1154 mode, 1155 adjusted_mode); 1156 } 1157 1158 /* Make the CRTC code factor in the SDVO pixel multiplier. The 1159 * SDVO device will factor out the multiplier during mode_set. 1160 */ 1161 pipe_config->pixel_multiplier = 1162 intel_sdvo_get_pixel_multiplier(adjusted_mode); 1163 1164 if (intel_sdvo_state->base.force_audio != HDMI_AUDIO_OFF_DVI) 1165 pipe_config->has_hdmi_sink = intel_sdvo->has_hdmi_monitor; 1166 1167 if (intel_sdvo_state->base.force_audio == HDMI_AUDIO_ON || 1168 (intel_sdvo_state->base.force_audio == HDMI_AUDIO_AUTO && intel_sdvo->has_hdmi_audio)) 1169 pipe_config->has_audio = true; 1170 1171 if (intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_AUTO) { 1172 /* See CEA-861-E - 5.1 Default Encoding Parameters */ 1173 /* FIXME: This bit is only valid when using TMDS encoding and 8 1174 * bit per color mode. */ 1175 if (pipe_config->has_hdmi_sink && 1176 drm_match_cea_mode(adjusted_mode) > 1) 1177 pipe_config->limited_color_range = true; 1178 } else { 1179 if (pipe_config->has_hdmi_sink && 1180 intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_LIMITED) 1181 pipe_config->limited_color_range = true; 1182 } 1183 1184 /* Clock computation needs to happen after pixel multiplier. */ 1185 if (intel_sdvo->is_tv) 1186 i9xx_adjust_sdvo_tv_clock(pipe_config); 1187 1188 /* Set user selected PAR to incoming mode's member */ 1189 if (intel_sdvo->is_hdmi) 1190 adjusted_mode->picture_aspect_ratio = conn_state->picture_aspect_ratio; 1191 1192 return true; 1193 } 1194 1195 #define UPDATE_PROPERTY(input, NAME) \ 1196 do { \ 1197 val = input; \ 1198 intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_##NAME, &val, sizeof(val)); \ 1199 } while (0) 1200 1201 static void intel_sdvo_update_props(struct intel_sdvo *intel_sdvo, 1202 const struct intel_sdvo_connector_state *sdvo_state) 1203 { 1204 const struct drm_connector_state *conn_state = &sdvo_state->base.base; 1205 struct intel_sdvo_connector *intel_sdvo_conn = 1206 to_intel_sdvo_connector(conn_state->connector); 1207 uint16_t val; 1208 1209 if (intel_sdvo_conn->left) 1210 UPDATE_PROPERTY(sdvo_state->tv.overscan_h, OVERSCAN_H); 1211 1212 if (intel_sdvo_conn->top) 1213 UPDATE_PROPERTY(sdvo_state->tv.overscan_v, OVERSCAN_V); 1214 1215 if (intel_sdvo_conn->hpos) 1216 UPDATE_PROPERTY(sdvo_state->tv.hpos, HPOS); 1217 1218 if (intel_sdvo_conn->vpos) 1219 UPDATE_PROPERTY(sdvo_state->tv.vpos, VPOS); 1220 1221 if (intel_sdvo_conn->saturation) 1222 UPDATE_PROPERTY(conn_state->tv.saturation, SATURATION); 1223 1224 if (intel_sdvo_conn->contrast) 1225 UPDATE_PROPERTY(conn_state->tv.contrast, CONTRAST); 1226 1227 if (intel_sdvo_conn->hue) 1228 UPDATE_PROPERTY(conn_state->tv.hue, HUE); 1229 1230 if (intel_sdvo_conn->brightness) 1231 UPDATE_PROPERTY(conn_state->tv.brightness, BRIGHTNESS); 1232 1233 if (intel_sdvo_conn->sharpness) 1234 UPDATE_PROPERTY(sdvo_state->tv.sharpness, SHARPNESS); 1235 1236 if (intel_sdvo_conn->flicker_filter) 1237 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter, FLICKER_FILTER); 1238 1239 if (intel_sdvo_conn->flicker_filter_2d) 1240 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_2d, FLICKER_FILTER_2D); 1241 1242 if (intel_sdvo_conn->flicker_filter_adaptive) 1243 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE); 1244 1245 if (intel_sdvo_conn->tv_chroma_filter) 1246 UPDATE_PROPERTY(sdvo_state->tv.chroma_filter, TV_CHROMA_FILTER); 1247 1248 if (intel_sdvo_conn->tv_luma_filter) 1249 UPDATE_PROPERTY(sdvo_state->tv.luma_filter, TV_LUMA_FILTER); 1250 1251 if (intel_sdvo_conn->dot_crawl) 1252 UPDATE_PROPERTY(sdvo_state->tv.dot_crawl, DOT_CRAWL); 1253 1254 #undef UPDATE_PROPERTY 1255 } 1256 1257 #pragma GCC diagnostic ignored "-Wdiscarded-qualifiers" 1258 1259 static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder, 1260 const struct intel_crtc_state *crtc_state, 1261 const struct drm_connector_state *conn_state) 1262 { 1263 struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev); 1264 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); 1265 const struct drm_display_mode *adjusted_mode = &crtc_state->base.adjusted_mode; 1266 const struct intel_sdvo_connector_state *sdvo_state = 1267 to_intel_sdvo_connector_state(conn_state); 1268 const struct drm_display_mode *mode = &crtc_state->base.mode; 1269 struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder); 1270 u32 sdvox; 1271 struct intel_sdvo_in_out_map in_out; 1272 struct intel_sdvo_dtd input_dtd, output_dtd; 1273 int rate; 1274 1275 intel_sdvo_update_props(intel_sdvo, sdvo_state); 1276 1277 /* First, set the input mapping for the first input to our controlled 1278 * output. This is only correct if we're a single-input device, in 1279 * which case the first input is the output from the appropriate SDVO 1280 * channel on the motherboard. In a two-input device, the first input 1281 * will be SDVOB and the second SDVOC. 1282 */ 1283 in_out.in0 = intel_sdvo->attached_output; 1284 in_out.in1 = 0; 1285 1286 intel_sdvo_set_value(intel_sdvo, 1287 SDVO_CMD_SET_IN_OUT_MAP, 1288 &in_out, sizeof(in_out)); 1289 1290 /* Set the output timings to the screen */ 1291 if (!intel_sdvo_set_target_output(intel_sdvo, 1292 intel_sdvo->attached_output)) 1293 return; 1294 1295 /* lvds has a special fixed output timing. */ 1296 if (intel_sdvo->is_lvds) 1297 intel_sdvo_get_dtd_from_mode(&output_dtd, 1298 intel_sdvo->sdvo_lvds_fixed_mode); 1299 else 1300 intel_sdvo_get_dtd_from_mode(&output_dtd, mode); 1301 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd)) 1302 DRM_INFO("Setting output timings on %s failed\n", 1303 SDVO_NAME(intel_sdvo)); 1304 1305 /* Set the input timing to the screen. Assume always input 0. */ 1306 if (!intel_sdvo_set_target_input(intel_sdvo)) 1307 return; 1308 1309 if (crtc_state->has_hdmi_sink) { 1310 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI); 1311 intel_sdvo_set_colorimetry(intel_sdvo, 1312 SDVO_COLORIMETRY_RGB256); 1313 intel_sdvo_set_avi_infoframe(intel_sdvo, crtc_state); 1314 } else 1315 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI); 1316 1317 if (intel_sdvo->is_tv && 1318 !intel_sdvo_set_tv_format(intel_sdvo, conn_state)) 1319 return; 1320 1321 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode); 1322 1323 if (intel_sdvo->is_tv || intel_sdvo->is_lvds) 1324 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags; 1325 if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd)) 1326 DRM_INFO("Setting input timings on %s failed\n", 1327 SDVO_NAME(intel_sdvo)); 1328 1329 switch (crtc_state->pixel_multiplier) { 1330 default: 1331 WARN(1, "unknown pixel multiplier specified\n"); 1332 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break; 1333 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break; 1334 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break; 1335 } 1336 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate)) 1337 return; 1338 1339 /* Set the SDVO control regs. */ 1340 if (INTEL_GEN(dev_priv) >= 4) { 1341 /* The real mode polarity is set by the SDVO commands, using 1342 * struct intel_sdvo_dtd. */ 1343 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH; 1344 if (!HAS_PCH_SPLIT(dev_priv) && crtc_state->limited_color_range) 1345 sdvox |= HDMI_COLOR_RANGE_16_235; 1346 if (INTEL_GEN(dev_priv) < 5) 1347 sdvox |= SDVO_BORDER_ENABLE; 1348 } else { 1349 sdvox = I915_READ(intel_sdvo->sdvo_reg); 1350 if (intel_sdvo->port == PORT_B) 1351 sdvox &= SDVOB_PRESERVE_MASK; 1352 else 1353 sdvox &= SDVOC_PRESERVE_MASK; 1354 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE; 1355 } 1356 1357 if (HAS_PCH_CPT(dev_priv)) 1358 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe); 1359 else 1360 sdvox |= SDVO_PIPE_SEL(crtc->pipe); 1361 1362 if (crtc_state->has_audio) { 1363 WARN_ON_ONCE(INTEL_GEN(dev_priv) < 4); 1364 sdvox |= SDVO_AUDIO_ENABLE; 1365 } 1366 1367 if (INTEL_GEN(dev_priv) >= 4) { 1368 /* done in crtc_mode_set as the dpll_md reg must be written early */ 1369 } else if (IS_I945G(dev_priv) || IS_I945GM(dev_priv) || 1370 IS_G33(dev_priv) || IS_PINEVIEW(dev_priv)) { 1371 /* done in crtc_mode_set as it lives inside the dpll register */ 1372 } else { 1373 sdvox |= (crtc_state->pixel_multiplier - 1) 1374 << SDVO_PORT_MULTIPLY_SHIFT; 1375 } 1376 1377 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL && 1378 INTEL_GEN(dev_priv) < 5) 1379 sdvox |= SDVO_STALL_SELECT; 1380 intel_sdvo_write_sdvox(intel_sdvo, sdvox); 1381 } 1382 1383 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector) 1384 { 1385 struct intel_sdvo_connector *intel_sdvo_connector = 1386 to_intel_sdvo_connector(&connector->base); 1387 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base); 1388 u16 active_outputs = 0; 1389 1390 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs); 1391 1392 if (active_outputs & intel_sdvo_connector->output_flag) 1393 return true; 1394 else 1395 return false; 1396 } 1397 1398 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder, 1399 enum i915_pipe *pipe) 1400 { 1401 struct drm_device *dev = encoder->base.dev; 1402 struct drm_i915_private *dev_priv = to_i915(dev); 1403 struct intel_sdvo *intel_sdvo = to_sdvo(encoder); 1404 u16 active_outputs = 0; 1405 u32 tmp; 1406 1407 tmp = I915_READ(intel_sdvo->sdvo_reg); 1408 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs); 1409 1410 if (!(tmp & SDVO_ENABLE) && (active_outputs == 0)) 1411 return false; 1412 1413 if (HAS_PCH_CPT(dev_priv)) 1414 *pipe = PORT_TO_PIPE_CPT(tmp); 1415 else 1416 *pipe = PORT_TO_PIPE(tmp); 1417 1418 return true; 1419 } 1420 1421 static void intel_sdvo_get_config(struct intel_encoder *encoder, 1422 struct intel_crtc_state *pipe_config) 1423 { 1424 struct drm_device *dev = encoder->base.dev; 1425 struct drm_i915_private *dev_priv = to_i915(dev); 1426 struct intel_sdvo *intel_sdvo = to_sdvo(encoder); 1427 struct intel_sdvo_dtd dtd; 1428 int encoder_pixel_multiplier = 0; 1429 int dotclock; 1430 u32 flags = 0, sdvox; 1431 u8 val; 1432 bool ret; 1433 1434 sdvox = I915_READ(intel_sdvo->sdvo_reg); 1435 1436 ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd); 1437 if (!ret) { 1438 /* Some sdvo encoders are not spec compliant and don't 1439 * implement the mandatory get_timings function. */ 1440 DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n"); 1441 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS; 1442 } else { 1443 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE) 1444 flags |= DRM_MODE_FLAG_PHSYNC; 1445 else 1446 flags |= DRM_MODE_FLAG_NHSYNC; 1447 1448 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE) 1449 flags |= DRM_MODE_FLAG_PVSYNC; 1450 else 1451 flags |= DRM_MODE_FLAG_NVSYNC; 1452 } 1453 1454 pipe_config->base.adjusted_mode.flags |= flags; 1455 1456 /* 1457 * pixel multiplier readout is tricky: Only on i915g/gm it is stored in 1458 * the sdvo port register, on all other platforms it is part of the dpll 1459 * state. Since the general pipe state readout happens before the 1460 * encoder->get_config we so already have a valid pixel multplier on all 1461 * other platfroms. 1462 */ 1463 if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) { 1464 pipe_config->pixel_multiplier = 1465 ((sdvox & SDVO_PORT_MULTIPLY_MASK) 1466 >> SDVO_PORT_MULTIPLY_SHIFT) + 1; 1467 } 1468 1469 dotclock = pipe_config->port_clock; 1470 1471 if (pipe_config->pixel_multiplier) 1472 dotclock /= pipe_config->pixel_multiplier; 1473 1474 pipe_config->base.adjusted_mode.crtc_clock = dotclock; 1475 1476 /* Cross check the port pixel multiplier with the sdvo encoder state. */ 1477 if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT, 1478 &val, 1)) { 1479 switch (val) { 1480 case SDVO_CLOCK_RATE_MULT_1X: 1481 encoder_pixel_multiplier = 1; 1482 break; 1483 case SDVO_CLOCK_RATE_MULT_2X: 1484 encoder_pixel_multiplier = 2; 1485 break; 1486 case SDVO_CLOCK_RATE_MULT_4X: 1487 encoder_pixel_multiplier = 4; 1488 break; 1489 } 1490 } 1491 1492 if (sdvox & HDMI_COLOR_RANGE_16_235) 1493 pipe_config->limited_color_range = true; 1494 1495 if (sdvox & SDVO_AUDIO_ENABLE) 1496 pipe_config->has_audio = true; 1497 1498 if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE, 1499 &val, 1)) { 1500 if (val == SDVO_ENCODE_HDMI) 1501 pipe_config->has_hdmi_sink = true; 1502 } 1503 1504 WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier, 1505 "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n", 1506 pipe_config->pixel_multiplier, encoder_pixel_multiplier); 1507 } 1508 1509 static void intel_disable_sdvo(struct intel_encoder *encoder, 1510 const struct intel_crtc_state *old_crtc_state, 1511 const struct drm_connector_state *conn_state) 1512 { 1513 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 1514 struct intel_sdvo *intel_sdvo = to_sdvo(encoder); 1515 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); 1516 u32 temp; 1517 1518 intel_sdvo_set_active_outputs(intel_sdvo, 0); 1519 if (0) 1520 intel_sdvo_set_encoder_power_state(intel_sdvo, 1521 DRM_MODE_DPMS_OFF); 1522 1523 temp = I915_READ(intel_sdvo->sdvo_reg); 1524 1525 temp &= ~SDVO_ENABLE; 1526 intel_sdvo_write_sdvox(intel_sdvo, temp); 1527 1528 /* 1529 * HW workaround for IBX, we need to move the port 1530 * to transcoder A after disabling it to allow the 1531 * matching DP port to be enabled on transcoder A. 1532 */ 1533 if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B) { 1534 /* 1535 * We get CPU/PCH FIFO underruns on the other pipe when 1536 * doing the workaround. Sweep them under the rug. 1537 */ 1538 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false); 1539 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false); 1540 1541 temp &= ~SDVO_PIPE_B_SELECT; 1542 temp |= SDVO_ENABLE; 1543 intel_sdvo_write_sdvox(intel_sdvo, temp); 1544 1545 temp &= ~SDVO_ENABLE; 1546 intel_sdvo_write_sdvox(intel_sdvo, temp); 1547 1548 intel_wait_for_vblank_if_active(dev_priv, PIPE_A); 1549 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true); 1550 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true); 1551 } 1552 } 1553 1554 static void pch_disable_sdvo(struct intel_encoder *encoder, 1555 const struct intel_crtc_state *old_crtc_state, 1556 const struct drm_connector_state *old_conn_state) 1557 { 1558 } 1559 1560 static void pch_post_disable_sdvo(struct intel_encoder *encoder, 1561 const struct intel_crtc_state *old_crtc_state, 1562 const struct drm_connector_state *old_conn_state) 1563 { 1564 intel_disable_sdvo(encoder, old_crtc_state, old_conn_state); 1565 } 1566 1567 static void intel_enable_sdvo(struct intel_encoder *encoder, 1568 const struct intel_crtc_state *pipe_config, 1569 const struct drm_connector_state *conn_state) 1570 { 1571 struct drm_device *dev = encoder->base.dev; 1572 struct drm_i915_private *dev_priv = to_i915(dev); 1573 struct intel_sdvo *intel_sdvo = to_sdvo(encoder); 1574 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); 1575 u32 temp; 1576 bool input1, input2; 1577 int i; 1578 bool success; 1579 1580 temp = I915_READ(intel_sdvo->sdvo_reg); 1581 temp |= SDVO_ENABLE; 1582 intel_sdvo_write_sdvox(intel_sdvo, temp); 1583 1584 for (i = 0; i < 2; i++) 1585 intel_wait_for_vblank(dev_priv, intel_crtc->pipe); 1586 1587 success = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2); 1588 /* Warn if the device reported failure to sync. 1589 * A lot of SDVO devices fail to notify of sync, but it's 1590 * a given it the status is a success, we succeeded. 1591 */ 1592 if (success && !input1) { 1593 DRM_DEBUG_KMS("First %s output reported failure to " 1594 "sync\n", SDVO_NAME(intel_sdvo)); 1595 } 1596 1597 if (0) 1598 intel_sdvo_set_encoder_power_state(intel_sdvo, 1599 DRM_MODE_DPMS_ON); 1600 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output); 1601 } 1602 1603 static enum drm_mode_status 1604 intel_sdvo_mode_valid(struct drm_connector *connector, 1605 struct drm_display_mode *mode) 1606 { 1607 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1608 int max_dotclk = to_i915(connector->dev)->max_dotclk_freq; 1609 1610 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 1611 return MODE_NO_DBLESCAN; 1612 1613 if (intel_sdvo->pixel_clock_min > mode->clock) 1614 return MODE_CLOCK_LOW; 1615 1616 if (intel_sdvo->pixel_clock_max < mode->clock) 1617 return MODE_CLOCK_HIGH; 1618 1619 if (mode->clock > max_dotclk) 1620 return MODE_CLOCK_HIGH; 1621 1622 if (intel_sdvo->is_lvds) { 1623 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay) 1624 return MODE_PANEL; 1625 1626 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay) 1627 return MODE_PANEL; 1628 } 1629 1630 return MODE_OK; 1631 } 1632 1633 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps) 1634 { 1635 BUILD_BUG_ON(sizeof(*caps) != 8); 1636 if (!intel_sdvo_get_value(intel_sdvo, 1637 SDVO_CMD_GET_DEVICE_CAPS, 1638 caps, sizeof(*caps))) 1639 return false; 1640 1641 DRM_DEBUG_KMS("SDVO capabilities:\n" 1642 " vendor_id: %d\n" 1643 " device_id: %d\n" 1644 " device_rev_id: %d\n" 1645 " sdvo_version_major: %d\n" 1646 " sdvo_version_minor: %d\n" 1647 " sdvo_inputs_mask: %d\n" 1648 " smooth_scaling: %d\n" 1649 " sharp_scaling: %d\n" 1650 " up_scaling: %d\n" 1651 " down_scaling: %d\n" 1652 " stall_support: %d\n" 1653 " output_flags: %d\n", 1654 caps->vendor_id, 1655 caps->device_id, 1656 caps->device_rev_id, 1657 caps->sdvo_version_major, 1658 caps->sdvo_version_minor, 1659 caps->sdvo_inputs_mask, 1660 caps->smooth_scaling, 1661 caps->sharp_scaling, 1662 caps->up_scaling, 1663 caps->down_scaling, 1664 caps->stall_support, 1665 caps->output_flags); 1666 1667 return true; 1668 } 1669 1670 static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo) 1671 { 1672 struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev); 1673 uint16_t hotplug; 1674 1675 if (!I915_HAS_HOTPLUG(dev_priv)) 1676 return 0; 1677 1678 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise 1679 * on the line. */ 1680 if (IS_I945G(dev_priv) || IS_I945GM(dev_priv)) 1681 return 0; 1682 1683 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, 1684 &hotplug, sizeof(hotplug))) 1685 return 0; 1686 1687 return hotplug; 1688 } 1689 1690 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder) 1691 { 1692 struct intel_sdvo *intel_sdvo = to_sdvo(encoder); 1693 1694 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, 1695 &intel_sdvo->hotplug_active, 2); 1696 } 1697 1698 static bool 1699 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo) 1700 { 1701 /* Is there more than one type of output? */ 1702 return hweight16(intel_sdvo->caps.output_flags) > 1; 1703 } 1704 1705 static struct edid * 1706 intel_sdvo_get_edid(struct drm_connector *connector) 1707 { 1708 struct intel_sdvo *sdvo = intel_attached_sdvo(connector); 1709 return drm_get_edid(connector, &sdvo->ddc); 1710 } 1711 1712 /* Mac mini hack -- use the same DDC as the analog connector */ 1713 static struct edid * 1714 intel_sdvo_get_analog_edid(struct drm_connector *connector) 1715 { 1716 struct drm_i915_private *dev_priv = to_i915(connector->dev); 1717 1718 return drm_get_edid(connector, 1719 intel_gmbus_get_adapter(dev_priv, 1720 dev_priv->vbt.crt_ddc_pin)); 1721 } 1722 1723 static enum drm_connector_status 1724 intel_sdvo_tmds_sink_detect(struct drm_connector *connector) 1725 { 1726 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1727 enum drm_connector_status status; 1728 struct edid *edid; 1729 1730 edid = intel_sdvo_get_edid(connector); 1731 1732 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) { 1733 u8 ddc, saved_ddc = intel_sdvo->ddc_bus; 1734 1735 /* 1736 * Don't use the 1 as the argument of DDC bus switch to get 1737 * the EDID. It is used for SDVO SPD ROM. 1738 */ 1739 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) { 1740 intel_sdvo->ddc_bus = ddc; 1741 edid = intel_sdvo_get_edid(connector); 1742 if (edid) 1743 break; 1744 } 1745 /* 1746 * If we found the EDID on the other bus, 1747 * assume that is the correct DDC bus. 1748 */ 1749 if (edid == NULL) 1750 intel_sdvo->ddc_bus = saved_ddc; 1751 } 1752 1753 /* 1754 * When there is no edid and no monitor is connected with VGA 1755 * port, try to use the CRT ddc to read the EDID for DVI-connector. 1756 */ 1757 if (edid == NULL) 1758 edid = intel_sdvo_get_analog_edid(connector); 1759 1760 status = connector_status_unknown; 1761 if (edid != NULL) { 1762 /* DDC bus is shared, match EDID to connector type */ 1763 if (edid->input & DRM_EDID_INPUT_DIGITAL) { 1764 status = connector_status_connected; 1765 if (intel_sdvo->is_hdmi) { 1766 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid); 1767 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid); 1768 intel_sdvo->rgb_quant_range_selectable = 1769 drm_rgb_quant_range_selectable(edid); 1770 } 1771 } else 1772 status = connector_status_disconnected; 1773 kfree(edid); 1774 } 1775 1776 return status; 1777 } 1778 1779 static bool 1780 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo, 1781 struct edid *edid) 1782 { 1783 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL); 1784 bool connector_is_digital = !!IS_DIGITAL(sdvo); 1785 1786 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n", 1787 connector_is_digital, monitor_is_digital); 1788 return connector_is_digital == monitor_is_digital; 1789 } 1790 1791 static enum drm_connector_status 1792 intel_sdvo_detect(struct drm_connector *connector, bool force) 1793 { 1794 uint16_t response; 1795 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1796 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1797 enum drm_connector_status ret; 1798 1799 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", 1800 connector->base.id, connector->name); 1801 1802 if (!intel_sdvo_get_value(intel_sdvo, 1803 SDVO_CMD_GET_ATTACHED_DISPLAYS, 1804 &response, 2)) 1805 return connector_status_unknown; 1806 1807 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n", 1808 response & 0xff, response >> 8, 1809 intel_sdvo_connector->output_flag); 1810 1811 if (response == 0) 1812 return connector_status_disconnected; 1813 1814 intel_sdvo->attached_output = response; 1815 1816 intel_sdvo->has_hdmi_monitor = false; 1817 intel_sdvo->has_hdmi_audio = false; 1818 intel_sdvo->rgb_quant_range_selectable = false; 1819 1820 if ((intel_sdvo_connector->output_flag & response) == 0) 1821 ret = connector_status_disconnected; 1822 else if (IS_TMDS(intel_sdvo_connector)) 1823 ret = intel_sdvo_tmds_sink_detect(connector); 1824 else { 1825 struct edid *edid; 1826 1827 /* if we have an edid check it matches the connection */ 1828 edid = intel_sdvo_get_edid(connector); 1829 if (edid == NULL) 1830 edid = intel_sdvo_get_analog_edid(connector); 1831 if (edid != NULL) { 1832 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector, 1833 edid)) 1834 ret = connector_status_connected; 1835 else 1836 ret = connector_status_disconnected; 1837 1838 kfree(edid); 1839 } else 1840 ret = connector_status_connected; 1841 } 1842 1843 /* May update encoder flag for like clock for SDVO TV, etc.*/ 1844 if (ret == connector_status_connected) { 1845 intel_sdvo->is_tv = false; 1846 intel_sdvo->is_lvds = false; 1847 1848 if (response & SDVO_TV_MASK) 1849 intel_sdvo->is_tv = true; 1850 if (response & SDVO_LVDS_MASK) 1851 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL; 1852 } 1853 1854 return ret; 1855 } 1856 1857 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector) 1858 { 1859 struct edid *edid; 1860 1861 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", 1862 connector->base.id, connector->name); 1863 1864 /* set the bus switch and get the modes */ 1865 edid = intel_sdvo_get_edid(connector); 1866 1867 /* 1868 * Mac mini hack. On this device, the DVI-I connector shares one DDC 1869 * link between analog and digital outputs. So, if the regular SDVO 1870 * DDC fails, check to see if the analog output is disconnected, in 1871 * which case we'll look there for the digital DDC data. 1872 */ 1873 if (edid == NULL) 1874 edid = intel_sdvo_get_analog_edid(connector); 1875 1876 if (edid != NULL) { 1877 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector), 1878 edid)) { 1879 drm_mode_connector_update_edid_property(connector, edid); 1880 drm_add_edid_modes(connector, edid); 1881 } 1882 1883 kfree(edid); 1884 } 1885 } 1886 1887 /* 1888 * Set of SDVO TV modes. 1889 * Note! This is in reply order (see loop in get_tv_modes). 1890 * XXX: all 60Hz refresh? 1891 */ 1892 static const struct drm_display_mode sdvo_tv_modes[] = { 1893 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384, 1894 416, 0, 200, 201, 232, 233, 0, 1895 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1896 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384, 1897 416, 0, 240, 241, 272, 273, 0, 1898 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1899 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464, 1900 496, 0, 300, 301, 332, 333, 0, 1901 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1902 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704, 1903 736, 0, 350, 351, 382, 383, 0, 1904 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1905 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704, 1906 736, 0, 400, 401, 432, 433, 0, 1907 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1908 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704, 1909 736, 0, 480, 481, 512, 513, 0, 1910 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1911 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768, 1912 800, 0, 480, 481, 512, 513, 0, 1913 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1914 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768, 1915 800, 0, 576, 577, 608, 609, 0, 1916 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1917 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784, 1918 816, 0, 350, 351, 382, 383, 0, 1919 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1920 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784, 1921 816, 0, 400, 401, 432, 433, 0, 1922 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1923 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784, 1924 816, 0, 480, 481, 512, 513, 0, 1925 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1926 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784, 1927 816, 0, 540, 541, 572, 573, 0, 1928 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1929 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784, 1930 816, 0, 576, 577, 608, 609, 0, 1931 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1932 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832, 1933 864, 0, 576, 577, 608, 609, 0, 1934 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1935 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864, 1936 896, 0, 600, 601, 632, 633, 0, 1937 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1938 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896, 1939 928, 0, 624, 625, 656, 657, 0, 1940 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1941 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984, 1942 1016, 0, 766, 767, 798, 799, 0, 1943 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1944 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088, 1945 1120, 0, 768, 769, 800, 801, 0, 1946 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1947 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344, 1948 1376, 0, 1024, 1025, 1056, 1057, 0, 1949 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1950 }; 1951 1952 static void intel_sdvo_get_tv_modes(struct drm_connector *connector) 1953 { 1954 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1955 const struct drm_connector_state *conn_state = connector->state; 1956 struct intel_sdvo_sdtv_resolution_request tv_res; 1957 uint32_t reply = 0, format_map = 0; 1958 int i; 1959 1960 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", 1961 connector->base.id, connector->name); 1962 1963 /* Read the list of supported input resolutions for the selected TV 1964 * format. 1965 */ 1966 format_map = 1 << conn_state->tv.mode; 1967 memcpy(&tv_res, &format_map, 1968 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request))); 1969 1970 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output)) 1971 return; 1972 1973 BUILD_BUG_ON(sizeof(tv_res) != 3); 1974 if (!intel_sdvo_write_cmd(intel_sdvo, 1975 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT, 1976 &tv_res, sizeof(tv_res))) 1977 return; 1978 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3)) 1979 return; 1980 1981 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++) 1982 if (reply & (1 << i)) { 1983 struct drm_display_mode *nmode; 1984 nmode = drm_mode_duplicate(connector->dev, 1985 &sdvo_tv_modes[i]); 1986 if (nmode) 1987 drm_mode_probed_add(connector, nmode); 1988 } 1989 } 1990 1991 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector) 1992 { 1993 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1994 struct drm_i915_private *dev_priv = to_i915(connector->dev); 1995 struct drm_display_mode *newmode; 1996 1997 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", 1998 connector->base.id, connector->name); 1999 2000 /* 2001 * Fetch modes from VBT. For SDVO prefer the VBT mode since some 2002 * SDVO->LVDS transcoders can't cope with the EDID mode. 2003 */ 2004 if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) { 2005 newmode = drm_mode_duplicate(connector->dev, 2006 dev_priv->vbt.sdvo_lvds_vbt_mode); 2007 if (newmode != NULL) { 2008 /* Guarantee the mode is preferred */ 2009 newmode->type = (DRM_MODE_TYPE_PREFERRED | 2010 DRM_MODE_TYPE_DRIVER); 2011 drm_mode_probed_add(connector, newmode); 2012 } 2013 } 2014 2015 /* 2016 * Attempt to get the mode list from DDC. 2017 * Assume that the preferred modes are 2018 * arranged in priority order. 2019 */ 2020 intel_ddc_get_modes(connector, &intel_sdvo->ddc); 2021 2022 list_for_each_entry(newmode, &connector->probed_modes, head) { 2023 if (newmode->type & DRM_MODE_TYPE_PREFERRED) { 2024 intel_sdvo->sdvo_lvds_fixed_mode = 2025 drm_mode_duplicate(connector->dev, newmode); 2026 2027 intel_sdvo->is_lvds = true; 2028 break; 2029 } 2030 } 2031 } 2032 2033 static int intel_sdvo_get_modes(struct drm_connector *connector) 2034 { 2035 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 2036 2037 if (IS_TV(intel_sdvo_connector)) 2038 intel_sdvo_get_tv_modes(connector); 2039 else if (IS_LVDS(intel_sdvo_connector)) 2040 intel_sdvo_get_lvds_modes(connector); 2041 else 2042 intel_sdvo_get_ddc_modes(connector); 2043 2044 return !list_empty(&connector->probed_modes); 2045 } 2046 2047 static void intel_sdvo_destroy(struct drm_connector *connector) 2048 { 2049 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 2050 2051 drm_connector_cleanup(connector); 2052 kfree(intel_sdvo_connector); 2053 } 2054 2055 static int 2056 intel_sdvo_connector_atomic_get_property(struct drm_connector *connector, 2057 const struct drm_connector_state *state, 2058 struct drm_property *property, 2059 uint64_t *val) 2060 { 2061 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 2062 const struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state((void *)state); 2063 2064 if (property == intel_sdvo_connector->tv_format) { 2065 int i; 2066 2067 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++) 2068 if (state->tv.mode == intel_sdvo_connector->tv_format_supported[i]) { 2069 *val = i; 2070 2071 return 0; 2072 } 2073 2074 WARN_ON(1); 2075 *val = 0; 2076 } else if (property == intel_sdvo_connector->top || 2077 property == intel_sdvo_connector->bottom) 2078 *val = intel_sdvo_connector->max_vscan - sdvo_state->tv.overscan_v; 2079 else if (property == intel_sdvo_connector->left || 2080 property == intel_sdvo_connector->right) 2081 *val = intel_sdvo_connector->max_hscan - sdvo_state->tv.overscan_h; 2082 else if (property == intel_sdvo_connector->hpos) 2083 *val = sdvo_state->tv.hpos; 2084 else if (property == intel_sdvo_connector->vpos) 2085 *val = sdvo_state->tv.vpos; 2086 else if (property == intel_sdvo_connector->saturation) 2087 *val = state->tv.saturation; 2088 else if (property == intel_sdvo_connector->contrast) 2089 *val = state->tv.contrast; 2090 else if (property == intel_sdvo_connector->hue) 2091 *val = state->tv.hue; 2092 else if (property == intel_sdvo_connector->brightness) 2093 *val = state->tv.brightness; 2094 else if (property == intel_sdvo_connector->sharpness) 2095 *val = sdvo_state->tv.sharpness; 2096 else if (property == intel_sdvo_connector->flicker_filter) 2097 *val = sdvo_state->tv.flicker_filter; 2098 else if (property == intel_sdvo_connector->flicker_filter_2d) 2099 *val = sdvo_state->tv.flicker_filter_2d; 2100 else if (property == intel_sdvo_connector->flicker_filter_adaptive) 2101 *val = sdvo_state->tv.flicker_filter_adaptive; 2102 else if (property == intel_sdvo_connector->tv_chroma_filter) 2103 *val = sdvo_state->tv.chroma_filter; 2104 else if (property == intel_sdvo_connector->tv_luma_filter) 2105 *val = sdvo_state->tv.luma_filter; 2106 else if (property == intel_sdvo_connector->dot_crawl) 2107 *val = sdvo_state->tv.dot_crawl; 2108 else 2109 return intel_digital_connector_atomic_get_property(connector, state, property, val); 2110 2111 return 0; 2112 } 2113 2114 static int 2115 intel_sdvo_connector_atomic_set_property(struct drm_connector *connector, 2116 struct drm_connector_state *state, 2117 struct drm_property *property, 2118 uint64_t val) 2119 { 2120 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 2121 struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state(state); 2122 2123 if (property == intel_sdvo_connector->tv_format) { 2124 state->tv.mode = intel_sdvo_connector->tv_format_supported[val]; 2125 2126 if (state->crtc) { 2127 struct drm_crtc_state *crtc_state = 2128 drm_atomic_get_new_crtc_state(state->state, state->crtc); 2129 2130 crtc_state->connectors_changed = true; 2131 } 2132 } else if (property == intel_sdvo_connector->top || 2133 property == intel_sdvo_connector->bottom) 2134 /* Cannot set these independent from each other */ 2135 sdvo_state->tv.overscan_v = intel_sdvo_connector->max_vscan - val; 2136 else if (property == intel_sdvo_connector->left || 2137 property == intel_sdvo_connector->right) 2138 /* Cannot set these independent from each other */ 2139 sdvo_state->tv.overscan_h = intel_sdvo_connector->max_hscan - val; 2140 else if (property == intel_sdvo_connector->hpos) 2141 sdvo_state->tv.hpos = val; 2142 else if (property == intel_sdvo_connector->vpos) 2143 sdvo_state->tv.vpos = val; 2144 else if (property == intel_sdvo_connector->saturation) 2145 state->tv.saturation = val; 2146 else if (property == intel_sdvo_connector->contrast) 2147 state->tv.contrast = val; 2148 else if (property == intel_sdvo_connector->hue) 2149 state->tv.hue = val; 2150 else if (property == intel_sdvo_connector->brightness) 2151 state->tv.brightness = val; 2152 else if (property == intel_sdvo_connector->sharpness) 2153 sdvo_state->tv.sharpness = val; 2154 else if (property == intel_sdvo_connector->flicker_filter) 2155 sdvo_state->tv.flicker_filter = val; 2156 else if (property == intel_sdvo_connector->flicker_filter_2d) 2157 sdvo_state->tv.flicker_filter_2d = val; 2158 else if (property == intel_sdvo_connector->flicker_filter_adaptive) 2159 sdvo_state->tv.flicker_filter_adaptive = val; 2160 else if (property == intel_sdvo_connector->tv_chroma_filter) 2161 sdvo_state->tv.chroma_filter = val; 2162 else if (property == intel_sdvo_connector->tv_luma_filter) 2163 sdvo_state->tv.luma_filter = val; 2164 else if (property == intel_sdvo_connector->dot_crawl) 2165 sdvo_state->tv.dot_crawl = val; 2166 else 2167 return intel_digital_connector_atomic_set_property(connector, state, property, val); 2168 2169 return 0; 2170 } 2171 2172 static int 2173 intel_sdvo_connector_register(struct drm_connector *connector) 2174 { 2175 struct intel_sdvo *sdvo = intel_attached_sdvo(connector); 2176 int ret; 2177 2178 ret = intel_connector_register(connector); 2179 if (ret) 2180 return ret; 2181 2182 return sysfs_create_link(&connector->kdev->kobj, 2183 &sdvo->ddc.dev.kobj, 2184 sdvo->ddc.dev.kobj.name); 2185 } 2186 2187 static void 2188 intel_sdvo_connector_unregister(struct drm_connector *connector) 2189 { 2190 struct intel_sdvo *sdvo = intel_attached_sdvo(connector); 2191 2192 sysfs_remove_link(&connector->kdev->kobj, 2193 sdvo->ddc.dev.kobj.name); 2194 intel_connector_unregister(connector); 2195 } 2196 2197 static struct drm_connector_state * 2198 intel_sdvo_connector_duplicate_state(struct drm_connector *connector) 2199 { 2200 struct intel_sdvo_connector_state *state; 2201 2202 state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL); 2203 if (!state) 2204 return NULL; 2205 2206 __drm_atomic_helper_connector_duplicate_state(connector, &state->base.base); 2207 return &state->base.base; 2208 } 2209 2210 static const struct drm_connector_funcs intel_sdvo_connector_funcs = { 2211 .detect = intel_sdvo_detect, 2212 .fill_modes = drm_helper_probe_single_connector_modes, 2213 .atomic_get_property = intel_sdvo_connector_atomic_get_property, 2214 .atomic_set_property = intel_sdvo_connector_atomic_set_property, 2215 .late_register = intel_sdvo_connector_register, 2216 .early_unregister = intel_sdvo_connector_unregister, 2217 .destroy = intel_sdvo_destroy, 2218 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 2219 .atomic_duplicate_state = intel_sdvo_connector_duplicate_state, 2220 }; 2221 2222 static int intel_sdvo_atomic_check(struct drm_connector *conn, 2223 struct drm_connector_state *new_conn_state) 2224 { 2225 struct drm_atomic_state *state = new_conn_state->state; 2226 struct drm_connector_state *old_conn_state = 2227 drm_atomic_get_old_connector_state(state, conn); 2228 struct intel_sdvo_connector_state *old_state = 2229 to_intel_sdvo_connector_state(old_conn_state); 2230 struct intel_sdvo_connector_state *new_state = 2231 to_intel_sdvo_connector_state(new_conn_state); 2232 2233 if (new_conn_state->crtc && 2234 (memcmp(&old_state->tv, &new_state->tv, sizeof(old_state->tv)) || 2235 memcmp(&old_conn_state->tv, &new_conn_state->tv, sizeof(old_conn_state->tv)))) { 2236 struct drm_crtc_state *crtc_state = 2237 drm_atomic_get_new_crtc_state(new_conn_state->state, 2238 new_conn_state->crtc); 2239 2240 crtc_state->connectors_changed = true; 2241 } 2242 2243 return intel_digital_connector_atomic_check(conn, new_conn_state); 2244 } 2245 2246 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = { 2247 .get_modes = intel_sdvo_get_modes, 2248 .mode_valid = intel_sdvo_mode_valid, 2249 .atomic_check = intel_sdvo_atomic_check, 2250 }; 2251 2252 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder) 2253 { 2254 struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder)); 2255 2256 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL) 2257 drm_mode_destroy(encoder->dev, 2258 intel_sdvo->sdvo_lvds_fixed_mode); 2259 2260 i2c_del_adapter(&intel_sdvo->ddc); 2261 intel_encoder_destroy(encoder); 2262 } 2263 2264 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = { 2265 .destroy = intel_sdvo_enc_destroy, 2266 }; 2267 2268 static void 2269 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo) 2270 { 2271 uint16_t mask = 0; 2272 unsigned int num_bits; 2273 2274 /* Make a mask of outputs less than or equal to our own priority in the 2275 * list. 2276 */ 2277 switch (sdvo->controlled_output) { 2278 case SDVO_OUTPUT_LVDS1: 2279 mask |= SDVO_OUTPUT_LVDS1; 2280 case SDVO_OUTPUT_LVDS0: 2281 mask |= SDVO_OUTPUT_LVDS0; 2282 case SDVO_OUTPUT_TMDS1: 2283 mask |= SDVO_OUTPUT_TMDS1; 2284 case SDVO_OUTPUT_TMDS0: 2285 mask |= SDVO_OUTPUT_TMDS0; 2286 case SDVO_OUTPUT_RGB1: 2287 mask |= SDVO_OUTPUT_RGB1; 2288 case SDVO_OUTPUT_RGB0: 2289 mask |= SDVO_OUTPUT_RGB0; 2290 break; 2291 } 2292 2293 /* Count bits to find what number we are in the priority list. */ 2294 mask &= sdvo->caps.output_flags; 2295 num_bits = hweight16(mask); 2296 /* If more than 3 outputs, default to DDC bus 3 for now. */ 2297 if (num_bits > 3) 2298 num_bits = 3; 2299 2300 /* Corresponds to SDVO_CONTROL_BUS_DDCx */ 2301 sdvo->ddc_bus = 1 << num_bits; 2302 } 2303 2304 /** 2305 * Choose the appropriate DDC bus for control bus switch command for this 2306 * SDVO output based on the controlled output. 2307 * 2308 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS 2309 * outputs, then LVDS outputs. 2310 */ 2311 static void 2312 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv, 2313 struct intel_sdvo *sdvo) 2314 { 2315 struct sdvo_device_mapping *mapping; 2316 2317 if (sdvo->port == PORT_B) 2318 mapping = &dev_priv->vbt.sdvo_mappings[0]; 2319 else 2320 mapping = &dev_priv->vbt.sdvo_mappings[1]; 2321 2322 if (mapping->initialized) 2323 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4); 2324 else 2325 intel_sdvo_guess_ddc_bus(sdvo); 2326 } 2327 2328 static void 2329 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv, 2330 struct intel_sdvo *sdvo) 2331 { 2332 struct sdvo_device_mapping *mapping; 2333 u8 pin; 2334 2335 if (sdvo->port == PORT_B) 2336 mapping = &dev_priv->vbt.sdvo_mappings[0]; 2337 else 2338 mapping = &dev_priv->vbt.sdvo_mappings[1]; 2339 2340 if (mapping->initialized && 2341 intel_gmbus_is_valid_pin(dev_priv, mapping->i2c_pin)) 2342 pin = mapping->i2c_pin; 2343 else 2344 pin = GMBUS_PIN_DPB; 2345 2346 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin); 2347 2348 /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow 2349 * our code totally fails once we start using gmbus. Hence fall back to 2350 * bit banging for now. */ 2351 intel_gmbus_force_bit(sdvo->i2c, true); 2352 } 2353 2354 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */ 2355 static void 2356 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo) 2357 { 2358 intel_gmbus_force_bit(sdvo->i2c, false); 2359 } 2360 2361 static bool 2362 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device) 2363 { 2364 return intel_sdvo_check_supp_encode(intel_sdvo); 2365 } 2366 2367 static u8 2368 intel_sdvo_get_slave_addr(struct drm_i915_private *dev_priv, 2369 struct intel_sdvo *sdvo) 2370 { 2371 struct sdvo_device_mapping *my_mapping, *other_mapping; 2372 2373 if (sdvo->port == PORT_B) { 2374 my_mapping = &dev_priv->vbt.sdvo_mappings[0]; 2375 other_mapping = &dev_priv->vbt.sdvo_mappings[1]; 2376 } else { 2377 my_mapping = &dev_priv->vbt.sdvo_mappings[1]; 2378 other_mapping = &dev_priv->vbt.sdvo_mappings[0]; 2379 } 2380 2381 /* If the BIOS described our SDVO device, take advantage of it. */ 2382 if (my_mapping->slave_addr) 2383 return my_mapping->slave_addr; 2384 2385 /* If the BIOS only described a different SDVO device, use the 2386 * address that it isn't using. 2387 */ 2388 if (other_mapping->slave_addr) { 2389 if (other_mapping->slave_addr == 0x70) 2390 return 0x72; 2391 else 2392 return 0x70; 2393 } 2394 2395 /* No SDVO device info is found for another DVO port, 2396 * so use mapping assumption we had before BIOS parsing. 2397 */ 2398 if (sdvo->port == PORT_B) 2399 return 0x70; 2400 else 2401 return 0x72; 2402 } 2403 2404 static int 2405 intel_sdvo_connector_init(struct intel_sdvo_connector *connector, 2406 struct intel_sdvo *encoder) 2407 { 2408 struct drm_connector *drm_connector; 2409 int ret; 2410 2411 drm_connector = &connector->base.base; 2412 ret = drm_connector_init(encoder->base.base.dev, 2413 drm_connector, 2414 &intel_sdvo_connector_funcs, 2415 connector->base.base.connector_type); 2416 if (ret < 0) 2417 return ret; 2418 2419 drm_connector_helper_add(drm_connector, 2420 &intel_sdvo_connector_helper_funcs); 2421 2422 connector->base.base.interlace_allowed = 1; 2423 connector->base.base.doublescan_allowed = 0; 2424 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB; 2425 connector->base.get_hw_state = intel_sdvo_connector_get_hw_state; 2426 2427 intel_connector_attach_encoder(&connector->base, &encoder->base); 2428 2429 return 0; 2430 } 2431 2432 static void 2433 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo, 2434 struct intel_sdvo_connector *connector) 2435 { 2436 struct drm_i915_private *dev_priv = to_i915(connector->base.base.dev); 2437 2438 intel_attach_force_audio_property(&connector->base.base); 2439 if (INTEL_GEN(dev_priv) >= 4 && IS_MOBILE(dev_priv)) { 2440 intel_attach_broadcast_rgb_property(&connector->base.base); 2441 } 2442 intel_attach_aspect_ratio_property(&connector->base.base); 2443 connector->base.base.state->picture_aspect_ratio = HDMI_PICTURE_ASPECT_NONE; 2444 } 2445 2446 static struct intel_sdvo_connector *intel_sdvo_connector_alloc(void) 2447 { 2448 struct intel_sdvo_connector *sdvo_connector; 2449 struct intel_sdvo_connector_state *conn_state; 2450 2451 sdvo_connector = kzalloc(sizeof(*sdvo_connector), GFP_KERNEL); 2452 if (!sdvo_connector) 2453 return NULL; 2454 2455 conn_state = kzalloc(sizeof(*conn_state), GFP_KERNEL); 2456 if (!conn_state) { 2457 kfree(sdvo_connector); 2458 return NULL; 2459 } 2460 2461 __drm_atomic_helper_connector_reset(&sdvo_connector->base.base, 2462 &conn_state->base.base); 2463 2464 return sdvo_connector; 2465 } 2466 2467 static bool 2468 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device) 2469 { 2470 struct drm_encoder *encoder = &intel_sdvo->base.base; 2471 struct drm_i915_private *dev_priv = to_i915(encoder->dev); 2472 struct drm_connector *connector; 2473 struct intel_encoder *intel_encoder = to_intel_encoder(encoder); 2474 struct intel_connector *intel_connector; 2475 struct intel_sdvo_connector *intel_sdvo_connector; 2476 2477 DRM_DEBUG_KMS("initialising DVI device %d\n", device); 2478 2479 intel_sdvo_connector = intel_sdvo_connector_alloc(); 2480 if (!intel_sdvo_connector) 2481 return false; 2482 2483 if (device == 0) { 2484 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0; 2485 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0; 2486 } else if (device == 1) { 2487 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1; 2488 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1; 2489 } 2490 2491 intel_connector = &intel_sdvo_connector->base; 2492 connector = &intel_connector->base; 2493 if (intel_sdvo_get_hotplug_support(intel_sdvo) & 2494 intel_sdvo_connector->output_flag) { 2495 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag; 2496 /* Some SDVO devices have one-shot hotplug interrupts. 2497 * Ensure that they get re-enabled when an interrupt happens. 2498 */ 2499 intel_encoder->hot_plug = intel_sdvo_enable_hotplug; 2500 intel_sdvo_enable_hotplug(intel_encoder); 2501 } else { 2502 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT; 2503 } 2504 encoder->encoder_type = DRM_MODE_ENCODER_TMDS; 2505 connector->connector_type = DRM_MODE_CONNECTOR_DVID; 2506 2507 /* gen3 doesn't do the hdmi bits in the SDVO register */ 2508 if (INTEL_GEN(dev_priv) >= 4 && 2509 intel_sdvo_is_hdmi_connector(intel_sdvo, device)) { 2510 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA; 2511 intel_sdvo->is_hdmi = true; 2512 } 2513 2514 if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) { 2515 kfree(intel_sdvo_connector); 2516 return false; 2517 } 2518 2519 if (intel_sdvo->is_hdmi) 2520 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector); 2521 2522 return true; 2523 } 2524 2525 static bool 2526 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type) 2527 { 2528 struct drm_encoder *encoder = &intel_sdvo->base.base; 2529 struct drm_connector *connector; 2530 struct intel_connector *intel_connector; 2531 struct intel_sdvo_connector *intel_sdvo_connector; 2532 2533 DRM_DEBUG_KMS("initialising TV type %d\n", type); 2534 2535 intel_sdvo_connector = intel_sdvo_connector_alloc(); 2536 if (!intel_sdvo_connector) 2537 return false; 2538 2539 intel_connector = &intel_sdvo_connector->base; 2540 connector = &intel_connector->base; 2541 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC; 2542 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO; 2543 2544 intel_sdvo->controlled_output |= type; 2545 intel_sdvo_connector->output_flag = type; 2546 2547 intel_sdvo->is_tv = true; 2548 2549 if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) { 2550 kfree(intel_sdvo_connector); 2551 return false; 2552 } 2553 2554 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type)) 2555 goto err; 2556 2557 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector)) 2558 goto err; 2559 2560 return true; 2561 2562 err: 2563 intel_sdvo_destroy(connector); 2564 return false; 2565 } 2566 2567 static bool 2568 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device) 2569 { 2570 struct drm_encoder *encoder = &intel_sdvo->base.base; 2571 struct drm_connector *connector; 2572 struct intel_connector *intel_connector; 2573 struct intel_sdvo_connector *intel_sdvo_connector; 2574 2575 DRM_DEBUG_KMS("initialising analog device %d\n", device); 2576 2577 intel_sdvo_connector = intel_sdvo_connector_alloc(); 2578 if (!intel_sdvo_connector) 2579 return false; 2580 2581 intel_connector = &intel_sdvo_connector->base; 2582 connector = &intel_connector->base; 2583 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT; 2584 encoder->encoder_type = DRM_MODE_ENCODER_DAC; 2585 connector->connector_type = DRM_MODE_CONNECTOR_VGA; 2586 2587 if (device == 0) { 2588 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0; 2589 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0; 2590 } else if (device == 1) { 2591 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1; 2592 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1; 2593 } 2594 2595 if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) { 2596 kfree(intel_sdvo_connector); 2597 return false; 2598 } 2599 2600 return true; 2601 } 2602 2603 static bool 2604 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device) 2605 { 2606 struct drm_encoder *encoder = &intel_sdvo->base.base; 2607 struct drm_connector *connector; 2608 struct intel_connector *intel_connector; 2609 struct intel_sdvo_connector *intel_sdvo_connector; 2610 2611 DRM_DEBUG_KMS("initialising LVDS device %d\n", device); 2612 2613 intel_sdvo_connector = intel_sdvo_connector_alloc(); 2614 if (!intel_sdvo_connector) 2615 return false; 2616 2617 intel_connector = &intel_sdvo_connector->base; 2618 connector = &intel_connector->base; 2619 encoder->encoder_type = DRM_MODE_ENCODER_LVDS; 2620 connector->connector_type = DRM_MODE_CONNECTOR_LVDS; 2621 2622 if (device == 0) { 2623 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0; 2624 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0; 2625 } else if (device == 1) { 2626 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1; 2627 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1; 2628 } 2629 2630 if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) { 2631 kfree(intel_sdvo_connector); 2632 return false; 2633 } 2634 2635 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector)) 2636 goto err; 2637 2638 return true; 2639 2640 err: 2641 intel_sdvo_destroy(connector); 2642 return false; 2643 } 2644 2645 static bool 2646 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags) 2647 { 2648 intel_sdvo->is_tv = false; 2649 intel_sdvo->is_lvds = false; 2650 2651 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/ 2652 2653 if (flags & SDVO_OUTPUT_TMDS0) 2654 if (!intel_sdvo_dvi_init(intel_sdvo, 0)) 2655 return false; 2656 2657 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK) 2658 if (!intel_sdvo_dvi_init(intel_sdvo, 1)) 2659 return false; 2660 2661 /* TV has no XXX1 function block */ 2662 if (flags & SDVO_OUTPUT_SVID0) 2663 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0)) 2664 return false; 2665 2666 if (flags & SDVO_OUTPUT_CVBS0) 2667 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0)) 2668 return false; 2669 2670 if (flags & SDVO_OUTPUT_YPRPB0) 2671 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0)) 2672 return false; 2673 2674 if (flags & SDVO_OUTPUT_RGB0) 2675 if (!intel_sdvo_analog_init(intel_sdvo, 0)) 2676 return false; 2677 2678 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK) 2679 if (!intel_sdvo_analog_init(intel_sdvo, 1)) 2680 return false; 2681 2682 if (flags & SDVO_OUTPUT_LVDS0) 2683 if (!intel_sdvo_lvds_init(intel_sdvo, 0)) 2684 return false; 2685 2686 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK) 2687 if (!intel_sdvo_lvds_init(intel_sdvo, 1)) 2688 return false; 2689 2690 if ((flags & SDVO_OUTPUT_MASK) == 0) { 2691 unsigned char bytes[2]; 2692 2693 intel_sdvo->controlled_output = 0; 2694 memcpy(bytes, &intel_sdvo->caps.output_flags, 2); 2695 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n", 2696 SDVO_NAME(intel_sdvo), 2697 bytes[0], bytes[1]); 2698 return false; 2699 } 2700 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); 2701 2702 return true; 2703 } 2704 2705 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo) 2706 { 2707 struct drm_device *dev = intel_sdvo->base.base.dev; 2708 struct drm_connector *connector, *tmp; 2709 2710 list_for_each_entry_safe(connector, tmp, 2711 &dev->mode_config.connector_list, head) { 2712 if (intel_attached_encoder(connector) == &intel_sdvo->base) { 2713 drm_connector_unregister(connector); 2714 intel_sdvo_destroy(connector); 2715 } 2716 } 2717 } 2718 2719 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo, 2720 struct intel_sdvo_connector *intel_sdvo_connector, 2721 int type) 2722 { 2723 struct drm_device *dev = intel_sdvo->base.base.dev; 2724 struct intel_sdvo_tv_format format; 2725 uint32_t format_map, i; 2726 2727 if (!intel_sdvo_set_target_output(intel_sdvo, type)) 2728 return false; 2729 2730 BUILD_BUG_ON(sizeof(format) != 6); 2731 if (!intel_sdvo_get_value(intel_sdvo, 2732 SDVO_CMD_GET_SUPPORTED_TV_FORMATS, 2733 &format, sizeof(format))) 2734 return false; 2735 2736 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format))); 2737 2738 if (format_map == 0) 2739 return false; 2740 2741 intel_sdvo_connector->format_supported_num = 0; 2742 for (i = 0 ; i < TV_FORMAT_NUM; i++) 2743 if (format_map & (1 << i)) 2744 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i; 2745 2746 2747 intel_sdvo_connector->tv_format = 2748 drm_property_create(dev, DRM_MODE_PROP_ENUM, 2749 "mode", intel_sdvo_connector->format_supported_num); 2750 if (!intel_sdvo_connector->tv_format) 2751 return false; 2752 2753 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++) 2754 drm_property_add_enum( 2755 intel_sdvo_connector->tv_format, i, 2756 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]); 2757 2758 intel_sdvo_connector->base.base.state->tv.mode = intel_sdvo_connector->tv_format_supported[0]; 2759 drm_object_attach_property(&intel_sdvo_connector->base.base.base, 2760 intel_sdvo_connector->tv_format, 0); 2761 return true; 2762 2763 } 2764 2765 #define _ENHANCEMENT(state_assignment, name, NAME) do { \ 2766 if (enhancements.name) { \ 2767 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \ 2768 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \ 2769 return false; \ 2770 intel_sdvo_connector->name = \ 2771 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \ 2772 if (!intel_sdvo_connector->name) return false; \ 2773 state_assignment = response; \ 2774 drm_object_attach_property(&connector->base, \ 2775 intel_sdvo_connector->name, 0); \ 2776 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \ 2777 data_value[0], data_value[1], response); \ 2778 } \ 2779 } while (0) 2780 2781 #define ENHANCEMENT(state, name, NAME) _ENHANCEMENT((state)->name, name, NAME) 2782 2783 static bool 2784 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo, 2785 struct intel_sdvo_connector *intel_sdvo_connector, 2786 struct intel_sdvo_enhancements_reply enhancements) 2787 { 2788 struct drm_device *dev = intel_sdvo->base.base.dev; 2789 struct drm_connector *connector = &intel_sdvo_connector->base.base; 2790 struct drm_connector_state *conn_state = connector->state; 2791 struct intel_sdvo_connector_state *sdvo_state = 2792 to_intel_sdvo_connector_state(conn_state); 2793 uint16_t response, data_value[2]; 2794 2795 /* when horizontal overscan is supported, Add the left/right property */ 2796 if (enhancements.overscan_h) { 2797 if (!intel_sdvo_get_value(intel_sdvo, 2798 SDVO_CMD_GET_MAX_OVERSCAN_H, 2799 &data_value, 4)) 2800 return false; 2801 2802 if (!intel_sdvo_get_value(intel_sdvo, 2803 SDVO_CMD_GET_OVERSCAN_H, 2804 &response, 2)) 2805 return false; 2806 2807 sdvo_state->tv.overscan_h = response; 2808 2809 intel_sdvo_connector->max_hscan = data_value[0]; 2810 intel_sdvo_connector->left = 2811 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]); 2812 if (!intel_sdvo_connector->left) 2813 return false; 2814 2815 drm_object_attach_property(&connector->base, 2816 intel_sdvo_connector->left, 0); 2817 2818 intel_sdvo_connector->right = 2819 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]); 2820 if (!intel_sdvo_connector->right) 2821 return false; 2822 2823 drm_object_attach_property(&connector->base, 2824 intel_sdvo_connector->right, 0); 2825 DRM_DEBUG_KMS("h_overscan: max %d, " 2826 "default %d, current %d\n", 2827 data_value[0], data_value[1], response); 2828 } 2829 2830 if (enhancements.overscan_v) { 2831 if (!intel_sdvo_get_value(intel_sdvo, 2832 SDVO_CMD_GET_MAX_OVERSCAN_V, 2833 &data_value, 4)) 2834 return false; 2835 2836 if (!intel_sdvo_get_value(intel_sdvo, 2837 SDVO_CMD_GET_OVERSCAN_V, 2838 &response, 2)) 2839 return false; 2840 2841 sdvo_state->tv.overscan_v = response; 2842 2843 intel_sdvo_connector->max_vscan = data_value[0]; 2844 intel_sdvo_connector->top = 2845 drm_property_create_range(dev, 0, 2846 "top_margin", 0, data_value[0]); 2847 if (!intel_sdvo_connector->top) 2848 return false; 2849 2850 drm_object_attach_property(&connector->base, 2851 intel_sdvo_connector->top, 0); 2852 2853 intel_sdvo_connector->bottom = 2854 drm_property_create_range(dev, 0, 2855 "bottom_margin", 0, data_value[0]); 2856 if (!intel_sdvo_connector->bottom) 2857 return false; 2858 2859 drm_object_attach_property(&connector->base, 2860 intel_sdvo_connector->bottom, 0); 2861 DRM_DEBUG_KMS("v_overscan: max %d, " 2862 "default %d, current %d\n", 2863 data_value[0], data_value[1], response); 2864 } 2865 2866 ENHANCEMENT(&sdvo_state->tv, hpos, HPOS); 2867 ENHANCEMENT(&sdvo_state->tv, vpos, VPOS); 2868 ENHANCEMENT(&conn_state->tv, saturation, SATURATION); 2869 ENHANCEMENT(&conn_state->tv, contrast, CONTRAST); 2870 ENHANCEMENT(&conn_state->tv, hue, HUE); 2871 ENHANCEMENT(&conn_state->tv, brightness, BRIGHTNESS); 2872 ENHANCEMENT(&sdvo_state->tv, sharpness, SHARPNESS); 2873 ENHANCEMENT(&sdvo_state->tv, flicker_filter, FLICKER_FILTER); 2874 ENHANCEMENT(&sdvo_state->tv, flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE); 2875 ENHANCEMENT(&sdvo_state->tv, flicker_filter_2d, FLICKER_FILTER_2D); 2876 _ENHANCEMENT(sdvo_state->tv.chroma_filter, tv_chroma_filter, TV_CHROMA_FILTER); 2877 _ENHANCEMENT(sdvo_state->tv.luma_filter, tv_luma_filter, TV_LUMA_FILTER); 2878 2879 if (enhancements.dot_crawl) { 2880 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2)) 2881 return false; 2882 2883 sdvo_state->tv.dot_crawl = response & 0x1; 2884 intel_sdvo_connector->dot_crawl = 2885 drm_property_create_range(dev, 0, "dot_crawl", 0, 1); 2886 if (!intel_sdvo_connector->dot_crawl) 2887 return false; 2888 2889 drm_object_attach_property(&connector->base, 2890 intel_sdvo_connector->dot_crawl, 0); 2891 DRM_DEBUG_KMS("dot crawl: current %d\n", response); 2892 } 2893 2894 return true; 2895 } 2896 2897 static bool 2898 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo, 2899 struct intel_sdvo_connector *intel_sdvo_connector, 2900 struct intel_sdvo_enhancements_reply enhancements) 2901 { 2902 struct drm_device *dev = intel_sdvo->base.base.dev; 2903 struct drm_connector *connector = &intel_sdvo_connector->base.base; 2904 uint16_t response, data_value[2]; 2905 2906 ENHANCEMENT(&connector->state->tv, brightness, BRIGHTNESS); 2907 2908 return true; 2909 } 2910 #undef ENHANCEMENT 2911 #undef _ENHANCEMENT 2912 2913 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo, 2914 struct intel_sdvo_connector *intel_sdvo_connector) 2915 { 2916 union { 2917 struct intel_sdvo_enhancements_reply reply; 2918 uint16_t response; 2919 } enhancements; 2920 2921 BUILD_BUG_ON(sizeof(enhancements) != 2); 2922 2923 if (!intel_sdvo_get_value(intel_sdvo, 2924 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS, 2925 &enhancements, sizeof(enhancements)) || 2926 enhancements.response == 0) { 2927 DRM_DEBUG_KMS("No enhancement is supported\n"); 2928 return true; 2929 } 2930 2931 if (IS_TV(intel_sdvo_connector)) 2932 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply); 2933 else if (IS_LVDS(intel_sdvo_connector)) 2934 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply); 2935 else 2936 return true; 2937 } 2938 2939 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter, 2940 struct i2c_msg *msgs, 2941 int num) 2942 { 2943 struct intel_sdvo *sdvo = adapter->algo_data; 2944 2945 if (!__intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus)) 2946 return -EIO; 2947 2948 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num); 2949 } 2950 2951 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter) 2952 { 2953 struct intel_sdvo *sdvo = adapter->algo_data; 2954 return sdvo->i2c->algo->functionality(sdvo->i2c); 2955 } 2956 2957 static const struct i2c_algorithm intel_sdvo_ddc_proxy = { 2958 .master_xfer = intel_sdvo_ddc_proxy_xfer, 2959 .functionality = intel_sdvo_ddc_proxy_func 2960 }; 2961 2962 static void proxy_lock_bus(struct i2c_adapter *adapter, 2963 unsigned int flags) 2964 { 2965 struct intel_sdvo *sdvo = adapter->algo_data; 2966 sdvo->i2c->lock_ops->lock_bus(sdvo->i2c, flags); 2967 } 2968 2969 static int proxy_trylock_bus(struct i2c_adapter *adapter, 2970 unsigned int flags) 2971 { 2972 struct intel_sdvo *sdvo = adapter->algo_data; 2973 return sdvo->i2c->lock_ops->trylock_bus(sdvo->i2c, flags); 2974 } 2975 2976 static void proxy_unlock_bus(struct i2c_adapter *adapter, 2977 unsigned int flags) 2978 { 2979 struct intel_sdvo *sdvo = adapter->algo_data; 2980 sdvo->i2c->lock_ops->unlock_bus(sdvo->i2c, flags); 2981 } 2982 2983 static const struct i2c_lock_operations proxy_lock_ops = { 2984 .lock_bus = proxy_lock_bus, 2985 .trylock_bus = proxy_trylock_bus, 2986 .unlock_bus = proxy_unlock_bus, 2987 }; 2988 2989 static bool 2990 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo, 2991 struct drm_i915_private *dev_priv) 2992 { 2993 struct pci_dev *pdev = dev_priv->drm.pdev; 2994 2995 #if 0 2996 sdvo->ddc.owner = THIS_MODULE; 2997 sdvo->ddc.class = I2C_CLASS_DDC; 2998 #endif 2999 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy"); 3000 sdvo->ddc.dev.parent = &pdev->dev; 3001 sdvo->ddc.algo_data = sdvo; 3002 sdvo->ddc.algo = &intel_sdvo_ddc_proxy; 3003 sdvo->ddc.lock_ops = &proxy_lock_ops; 3004 3005 return i2c_add_adapter(&sdvo->ddc) == 0; 3006 } 3007 3008 static void assert_sdvo_port_valid(const struct drm_i915_private *dev_priv, 3009 enum port port) 3010 { 3011 if (HAS_PCH_SPLIT(dev_priv)) 3012 WARN_ON(port != PORT_B); 3013 else 3014 WARN_ON(port != PORT_B && port != PORT_C); 3015 } 3016 3017 bool intel_sdvo_init(struct drm_i915_private *dev_priv, 3018 i915_reg_t sdvo_reg, enum port port) 3019 { 3020 struct intel_encoder *intel_encoder; 3021 struct intel_sdvo *intel_sdvo; 3022 int i; 3023 3024 assert_sdvo_port_valid(dev_priv, port); 3025 3026 intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL); 3027 if (!intel_sdvo) 3028 return false; 3029 3030 intel_sdvo->sdvo_reg = sdvo_reg; 3031 intel_sdvo->port = port; 3032 intel_sdvo->slave_addr = 3033 intel_sdvo_get_slave_addr(dev_priv, intel_sdvo) >> 1; 3034 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo); 3035 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev_priv)) 3036 goto err_i2c_bus; 3037 3038 /* encoder type will be decided later */ 3039 intel_encoder = &intel_sdvo->base; 3040 intel_encoder->type = INTEL_OUTPUT_SDVO; 3041 intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER; 3042 intel_encoder->port = port; 3043 drm_encoder_init(&dev_priv->drm, &intel_encoder->base, 3044 &intel_sdvo_enc_funcs, 0, 3045 "SDVO %c", port_name(port)); 3046 3047 /* Read the regs to test if we can talk to the device */ 3048 for (i = 0; i < 0x40; i++) { 3049 u8 byte; 3050 3051 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) { 3052 DRM_DEBUG_KMS("No SDVO device found on %s\n", 3053 SDVO_NAME(intel_sdvo)); 3054 goto err; 3055 } 3056 } 3057 3058 intel_encoder->compute_config = intel_sdvo_compute_config; 3059 if (HAS_PCH_SPLIT(dev_priv)) { 3060 intel_encoder->disable = pch_disable_sdvo; 3061 intel_encoder->post_disable = pch_post_disable_sdvo; 3062 } else { 3063 intel_encoder->disable = intel_disable_sdvo; 3064 } 3065 intel_encoder->pre_enable = intel_sdvo_pre_enable; 3066 intel_encoder->enable = intel_enable_sdvo; 3067 intel_encoder->get_hw_state = intel_sdvo_get_hw_state; 3068 intel_encoder->get_config = intel_sdvo_get_config; 3069 3070 /* In default case sdvo lvds is false */ 3071 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps)) 3072 goto err; 3073 3074 if (intel_sdvo_output_setup(intel_sdvo, 3075 intel_sdvo->caps.output_flags) != true) { 3076 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n", 3077 SDVO_NAME(intel_sdvo)); 3078 /* Output_setup can leave behind connectors! */ 3079 goto err_output; 3080 } 3081 3082 /* Only enable the hotplug irq if we need it, to work around noisy 3083 * hotplug lines. 3084 */ 3085 if (intel_sdvo->hotplug_active) { 3086 if (intel_sdvo->port == PORT_B) 3087 intel_encoder->hpd_pin = HPD_SDVO_B; 3088 else 3089 intel_encoder->hpd_pin = HPD_SDVO_C; 3090 } 3091 3092 /* 3093 * Cloning SDVO with anything is often impossible, since the SDVO 3094 * encoder can request a special input timing mode. And even if that's 3095 * not the case we have evidence that cloning a plain unscaled mode with 3096 * VGA doesn't really work. Furthermore the cloning flags are way too 3097 * simplistic anyway to express such constraints, so just give up on 3098 * cloning for SDVO encoders. 3099 */ 3100 intel_sdvo->base.cloneable = 0; 3101 3102 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo); 3103 3104 /* Set the input timing to the screen. Assume always input 0. */ 3105 if (!intel_sdvo_set_target_input(intel_sdvo)) 3106 goto err_output; 3107 3108 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo, 3109 &intel_sdvo->pixel_clock_min, 3110 &intel_sdvo->pixel_clock_max)) 3111 goto err_output; 3112 3113 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, " 3114 "clock range %dMHz - %dMHz, " 3115 "input 1: %c, input 2: %c, " 3116 "output 1: %c, output 2: %c\n", 3117 SDVO_NAME(intel_sdvo), 3118 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id, 3119 intel_sdvo->caps.device_rev_id, 3120 intel_sdvo->pixel_clock_min / 1000, 3121 intel_sdvo->pixel_clock_max / 1000, 3122 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N', 3123 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N', 3124 /* check currently supported outputs */ 3125 intel_sdvo->caps.output_flags & 3126 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N', 3127 intel_sdvo->caps.output_flags & 3128 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N'); 3129 return true; 3130 3131 err_output: 3132 intel_sdvo_output_cleanup(intel_sdvo); 3133 3134 err: 3135 drm_encoder_cleanup(&intel_encoder->base); 3136 i2c_del_adapter(&intel_sdvo->ddc); 3137 err_i2c_bus: 3138 intel_sdvo_unselect_i2c_bus(intel_sdvo); 3139 kfree(intel_sdvo); 3140 3141 return false; 3142 } 3143