1 /* 2 * Copyright 2006 Dave Airlie <airlied@linux.ie> 3 * Copyright © 2006-2007 Intel Corporation 4 * Jesse Barnes <jesse.barnes@intel.com> 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the next 14 * paragraph) shall be included in all copies or substantial portions of the 15 * Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 23 * DEALINGS IN THE SOFTWARE. 24 * 25 * Authors: 26 * Eric Anholt <eric@anholt.net> 27 * 28 * $FreeBSD: head/sys/dev/drm2/i915/intel_sdvo.c 249041 2013-04-03 08:27:35Z dumbbell $ 29 */ 30 31 #include <drm/drmP.h> 32 #include <drm/drm_crtc.h> 33 #include <drm/drm_edid.h> 34 #include "intel_drv.h" 35 #include <drm/i915_drm.h> 36 #include "i915_drv.h" 37 #include "intel_sdvo_regs.h" 38 39 #include <bus/iicbus/iic.h> 40 #include <bus/iicbus/iiconf.h> 41 #include "iicbus_if.h" 42 43 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1) 44 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1) 45 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1) 46 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0) 47 48 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\ 49 SDVO_TV_MASK) 50 51 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK) 52 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK) 53 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK) 54 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK)) 55 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK)) 56 57 58 static const char *tv_format_names[] = { 59 "NTSC_M" , "NTSC_J" , "NTSC_443", 60 "PAL_B" , "PAL_D" , "PAL_G" , 61 "PAL_H" , "PAL_I" , "PAL_M" , 62 "PAL_N" , "PAL_NC" , "PAL_60" , 63 "SECAM_B" , "SECAM_D" , "SECAM_G" , 64 "SECAM_K" , "SECAM_K1", "SECAM_L" , 65 "SECAM_60" 66 }; 67 68 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names)) 69 70 struct intel_sdvo { 71 struct intel_encoder base; 72 73 device_t i2c; 74 u8 slave_addr; 75 76 device_t ddc_iic_bus, ddc; 77 78 /* Register for the SDVO device: SDVOB or SDVOC */ 79 int sdvo_reg; 80 81 /* Active outputs controlled by this SDVO output */ 82 uint16_t controlled_output; 83 84 /* 85 * Capabilities of the SDVO device returned by 86 * i830_sdvo_get_capabilities() 87 */ 88 struct intel_sdvo_caps caps; 89 90 /* Pixel clock limitations reported by the SDVO device, in kHz */ 91 int pixel_clock_min, pixel_clock_max; 92 93 /* 94 * For multiple function SDVO device, 95 * this is for current attached outputs. 96 */ 97 uint16_t attached_output; 98 99 /* 100 * Hotplug activation bits for this device 101 */ 102 uint8_t hotplug_active[2]; 103 104 /** 105 * This is used to select the color range of RBG outputs in HDMI mode. 106 * It is only valid when using TMDS encoding and 8 bit per color mode. 107 */ 108 uint32_t color_range; 109 110 /** 111 * This is set if we're going to treat the device as TV-out. 112 * 113 * While we have these nice friendly flags for output types that ought 114 * to decide this for us, the S-Video output on our HDMI+S-Video card 115 * shows up as RGB1 (VGA). 116 */ 117 bool is_tv; 118 119 /* This is for current tv format name */ 120 int tv_format_index; 121 122 /** 123 * This is set if we treat the device as HDMI, instead of DVI. 124 */ 125 bool is_hdmi; 126 bool has_hdmi_monitor; 127 bool has_hdmi_audio; 128 129 /** 130 * This is set if we detect output of sdvo device as LVDS and 131 * have a valid fixed mode to use with the panel. 132 */ 133 bool is_lvds; 134 135 /** 136 * This is sdvo fixed pannel mode pointer 137 */ 138 struct drm_display_mode *sdvo_lvds_fixed_mode; 139 140 /* DDC bus used by this SDVO encoder */ 141 uint8_t ddc_bus; 142 143 /* Input timings for adjusted_mode */ 144 struct intel_sdvo_dtd input_dtd; 145 }; 146 147 struct intel_sdvo_connector { 148 struct intel_connector base; 149 150 /* Mark the type of connector */ 151 uint16_t output_flag; 152 153 enum hdmi_force_audio force_audio; 154 155 /* This contains all current supported TV format */ 156 u8 tv_format_supported[TV_FORMAT_NUM]; 157 int format_supported_num; 158 struct drm_property *tv_format; 159 160 /* add the property for the SDVO-TV */ 161 struct drm_property *left; 162 struct drm_property *right; 163 struct drm_property *top; 164 struct drm_property *bottom; 165 struct drm_property *hpos; 166 struct drm_property *vpos; 167 struct drm_property *contrast; 168 struct drm_property *saturation; 169 struct drm_property *hue; 170 struct drm_property *sharpness; 171 struct drm_property *flicker_filter; 172 struct drm_property *flicker_filter_adaptive; 173 struct drm_property *flicker_filter_2d; 174 struct drm_property *tv_chroma_filter; 175 struct drm_property *tv_luma_filter; 176 struct drm_property *dot_crawl; 177 178 /* add the property for the SDVO-TV/LVDS */ 179 struct drm_property *brightness; 180 181 /* Add variable to record current setting for the above property */ 182 u32 left_margin, right_margin, top_margin, bottom_margin; 183 184 /* this is to get the range of margin.*/ 185 u32 max_hscan, max_vscan; 186 u32 max_hpos, cur_hpos; 187 u32 max_vpos, cur_vpos; 188 u32 cur_brightness, max_brightness; 189 u32 cur_contrast, max_contrast; 190 u32 cur_saturation, max_saturation; 191 u32 cur_hue, max_hue; 192 u32 cur_sharpness, max_sharpness; 193 u32 cur_flicker_filter, max_flicker_filter; 194 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive; 195 u32 cur_flicker_filter_2d, max_flicker_filter_2d; 196 u32 cur_tv_chroma_filter, max_tv_chroma_filter; 197 u32 cur_tv_luma_filter, max_tv_luma_filter; 198 u32 cur_dot_crawl, max_dot_crawl; 199 }; 200 201 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder) 202 { 203 return container_of(encoder, struct intel_sdvo, base.base); 204 } 205 206 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector) 207 { 208 return container_of(intel_attached_encoder(connector), 209 struct intel_sdvo, base); 210 } 211 212 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector) 213 { 214 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base); 215 } 216 217 static bool 218 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags); 219 static bool 220 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo, 221 struct intel_sdvo_connector *intel_sdvo_connector, 222 int type); 223 static bool 224 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo, 225 struct intel_sdvo_connector *intel_sdvo_connector); 226 227 /** 228 * Writes the SDVOB or SDVOC with the given value, but always writes both 229 * SDVOB and SDVOC to work around apparent hardware issues (according to 230 * comments in the BIOS). 231 */ 232 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val) 233 { 234 struct drm_device *dev = intel_sdvo->base.base.dev; 235 struct drm_i915_private *dev_priv = dev->dev_private; 236 u32 bval = val, cval = val; 237 int i; 238 239 if (intel_sdvo->sdvo_reg == PCH_SDVOB) { 240 I915_WRITE(intel_sdvo->sdvo_reg, val); 241 I915_READ(intel_sdvo->sdvo_reg); 242 return; 243 } 244 245 if (intel_sdvo->sdvo_reg == SDVOB) { 246 cval = I915_READ(SDVOC); 247 } else { 248 bval = I915_READ(SDVOB); 249 } 250 /* 251 * Write the registers twice for luck. Sometimes, 252 * writing them only once doesn't appear to 'stick'. 253 * The BIOS does this too. Yay, magic 254 */ 255 for (i = 0; i < 2; i++) 256 { 257 I915_WRITE(SDVOB, bval); 258 I915_READ(SDVOB); 259 I915_WRITE(SDVOC, cval); 260 I915_READ(SDVOC); 261 } 262 } 263 264 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch) 265 { 266 struct iic_msg msgs[] = { 267 { 268 .slave = intel_sdvo->slave_addr << 1, 269 .flags = 0, 270 .len = 1, 271 .buf = &addr, 272 }, 273 { 274 .slave = intel_sdvo->slave_addr << 1, 275 .flags = IIC_M_RD, 276 .len = 1, 277 .buf = ch, 278 } 279 }; 280 int ret; 281 282 if ((ret = iicbus_transfer(intel_sdvo->i2c, msgs, 2)) == 0) 283 return true; 284 285 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret); 286 return false; 287 } 288 289 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd} 290 /** Mapping of command numbers to names, for debug output */ 291 static const struct _sdvo_cmd_name { 292 u8 cmd; 293 const char *name; 294 } sdvo_cmd_names[] = { 295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET), 296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS), 297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV), 298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS), 299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS), 300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS), 301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP), 302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP), 303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS), 304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT), 305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG), 306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG), 307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE), 308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT), 309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT), 310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1), 311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2), 312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), 313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2), 314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), 315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1), 316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2), 317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1), 318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2), 319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING), 320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1), 321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2), 322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE), 323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE), 324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS), 325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT), 326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT), 327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS), 328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT), 329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT), 330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES), 331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE), 332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE), 333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE), 334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH), 335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT), 336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT), 337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS), 338 339 /* Add the op code for SDVO enhancements */ 340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS), 341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS), 342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS), 343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS), 344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS), 345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS), 346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION), 347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION), 348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION), 349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE), 350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE), 351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE), 352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST), 353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST), 354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST), 355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS), 356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS), 357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS), 358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H), 359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H), 360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H), 361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V), 362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V), 363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V), 364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER), 365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER), 366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER), 367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE), 368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE), 369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE), 370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D), 371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D), 372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D), 373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS), 374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS), 375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS), 376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL), 377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL), 378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER), 379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER), 380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER), 381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER), 382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER), 383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER), 384 385 /* HDMI op code */ 386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE), 387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE), 388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE), 389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI), 390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI), 391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP), 392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY), 393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY), 394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER), 395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT), 396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT), 397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX), 398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX), 399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO), 400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT), 401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT), 402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE), 403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE), 404 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA), 405 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA), 406 }; 407 408 #define IS_SDVOB(reg) (reg == SDVOB || reg == PCH_SDVOB) 409 #define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC") 410 411 static void 412 intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd, 413 const void *args, int args_len) 414 { 415 int i; 416 417 if ((drm_debug & DRM_DEBUGBITS_KMS) == 0) 418 return; 419 DRM_DEBUG_KMS("%s: W: %02X ", SDVO_NAME(intel_sdvo), cmd); 420 for (i = 0; i < args_len; i++) 421 kprintf("%02X ", ((const u8 *)args)[i]); 422 for (; i < 8; i++) 423 kprintf(" "); 424 for (i = 0; i < DRM_ARRAY_SIZE(sdvo_cmd_names); i++) { 425 if (cmd == sdvo_cmd_names[i].cmd) { 426 kprintf("(%s)", sdvo_cmd_names[i].name); 427 break; 428 } 429 } 430 if (i == DRM_ARRAY_SIZE(sdvo_cmd_names)) 431 kprintf("(%02X)", cmd); 432 kprintf("\n"); 433 } 434 435 static const char *cmd_status_names[] = { 436 "Power on", 437 "Success", 438 "Not supported", 439 "Invalid arg", 440 "Pending", 441 "Target not specified", 442 "Scaling not supported" 443 }; 444 445 static bool 446 intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd, const void *args, 447 int args_len) 448 { 449 u8 buf[args_len*2 + 2], status; 450 struct iic_msg msgs[args_len + 3]; 451 int i, ret; 452 453 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len); 454 455 for (i = 0; i < args_len; i++) { 456 msgs[i].slave = intel_sdvo->slave_addr << 1; 457 msgs[i].flags = 0; 458 msgs[i].len = 2; 459 msgs[i].buf = buf + 2 *i; 460 buf[2*i + 0] = SDVO_I2C_ARG_0 - i; 461 buf[2*i + 1] = ((const u8*)args)[i]; 462 } 463 msgs[i].slave = intel_sdvo->slave_addr << 1; 464 msgs[i].flags = 0; 465 msgs[i].len = 2; 466 msgs[i].buf = buf + 2*i; 467 buf[2*i + 0] = SDVO_I2C_OPCODE; 468 buf[2*i + 1] = cmd; 469 470 /* the following two are to read the response */ 471 status = SDVO_I2C_CMD_STATUS; 472 msgs[i+1].slave = intel_sdvo->slave_addr << 1; 473 msgs[i+1].flags = 0; 474 msgs[i+1].len = 1; 475 msgs[i+1].buf = &status; 476 477 msgs[i+2].slave = intel_sdvo->slave_addr << 1; 478 msgs[i+2].flags = IIC_M_RD; 479 msgs[i+2].len = 1; 480 msgs[i+2].buf = &status; 481 482 ret = iicbus_transfer(intel_sdvo->i2c, msgs, i+3); 483 if (ret != 0) { 484 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret); 485 return (false); 486 } 487 #if 0 488 if (ret != i+3) { 489 /* failure in I2C transfer */ 490 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3); 491 return false; 492 } 493 #endif 494 495 return true; 496 } 497 498 static bool 499 intel_sdvo_read_response(struct intel_sdvo *intel_sdvo, void *response, 500 int response_len) 501 { 502 u8 retry = 5; 503 u8 status; 504 int i; 505 506 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo)); 507 508 /* 509 * The documentation states that all commands will be 510 * processed within 15µs, and that we need only poll 511 * the status byte a maximum of 3 times in order for the 512 * command to be complete. 513 * 514 * Check 5 times in case the hardware failed to read the docs. 515 */ 516 if (!intel_sdvo_read_byte(intel_sdvo, SDVO_I2C_CMD_STATUS, &status)) 517 goto log_fail; 518 519 while (status == SDVO_CMD_STATUS_PENDING && retry--) { 520 DELAY(15); 521 if (!intel_sdvo_read_byte(intel_sdvo, 522 SDVO_I2C_CMD_STATUS, &status)) 523 goto log_fail; 524 } 525 526 if ((drm_debug & DRM_DEBUGBITS_KMS) != 0) { 527 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP) 528 kprintf("(%s)", cmd_status_names[status]); 529 else 530 kprintf("(??? %d)", status); 531 } 532 533 if (status != SDVO_CMD_STATUS_SUCCESS) 534 goto log_fail; 535 536 /* Read the command response */ 537 for (i = 0; i < response_len; i++) { 538 if (!intel_sdvo_read_byte(intel_sdvo, 539 SDVO_I2C_RETURN_0 + i, 540 &((u8 *)response)[i])) 541 goto log_fail; 542 if ((drm_debug & DRM_DEBUGBITS_KMS) != 0) 543 kprintf(" %02X", ((u8 *)response)[i]); 544 } 545 if ((drm_debug & DRM_DEBUGBITS_KMS) != 0) 546 kprintf("\n"); 547 return (true); 548 549 log_fail: 550 if ((drm_debug & DRM_DEBUGBITS_KMS) != 0) 551 kprintf("... failed\n"); 552 return (false); 553 } 554 555 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode) 556 { 557 if (mode->clock >= 100000) 558 return 1; 559 else if (mode->clock >= 50000) 560 return 2; 561 else 562 return 4; 563 } 564 565 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo, 566 u8 ddc_bus) 567 { 568 /* This must be the immediately preceding write before the i2c xfer */ 569 return intel_sdvo_write_cmd(intel_sdvo, 570 SDVO_CMD_SET_CONTROL_BUS_SWITCH, 571 &ddc_bus, 1); 572 } 573 574 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len) 575 { 576 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len)) 577 return false; 578 579 return intel_sdvo_read_response(intel_sdvo, NULL, 0); 580 } 581 582 static bool 583 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len) 584 { 585 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0)) 586 return false; 587 588 return intel_sdvo_read_response(intel_sdvo, value, len); 589 } 590 591 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo) 592 { 593 struct intel_sdvo_set_target_input_args targets = {0}; 594 return intel_sdvo_set_value(intel_sdvo, 595 SDVO_CMD_SET_TARGET_INPUT, 596 &targets, sizeof(targets)); 597 } 598 599 /** 600 * Return whether each input is trained. 601 * 602 * This function is making an assumption about the layout of the response, 603 * which should be checked against the docs. 604 */ 605 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2) 606 { 607 struct intel_sdvo_get_trained_inputs_response response; 608 609 CTASSERT(sizeof(response) == 1); 610 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS, 611 &response, sizeof(response))) 612 return false; 613 614 *input_1 = response.input0_trained; 615 *input_2 = response.input1_trained; 616 return true; 617 } 618 619 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo, 620 u16 outputs) 621 { 622 return intel_sdvo_set_value(intel_sdvo, 623 SDVO_CMD_SET_ACTIVE_OUTPUTS, 624 &outputs, sizeof(outputs)); 625 } 626 627 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo, 628 int mode) 629 { 630 u8 state = SDVO_ENCODER_STATE_ON; 631 632 switch (mode) { 633 case DRM_MODE_DPMS_ON: 634 state = SDVO_ENCODER_STATE_ON; 635 break; 636 case DRM_MODE_DPMS_STANDBY: 637 state = SDVO_ENCODER_STATE_STANDBY; 638 break; 639 case DRM_MODE_DPMS_SUSPEND: 640 state = SDVO_ENCODER_STATE_SUSPEND; 641 break; 642 case DRM_MODE_DPMS_OFF: 643 state = SDVO_ENCODER_STATE_OFF; 644 break; 645 } 646 647 return intel_sdvo_set_value(intel_sdvo, 648 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state)); 649 } 650 651 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo, 652 int *clock_min, 653 int *clock_max) 654 { 655 struct intel_sdvo_pixel_clock_range clocks; 656 657 CTASSERT(sizeof(clocks) == 4); 658 if (!intel_sdvo_get_value(intel_sdvo, 659 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE, 660 &clocks, sizeof(clocks))) 661 return false; 662 663 /* Convert the values from units of 10 kHz to kHz. */ 664 *clock_min = clocks.min * 10; 665 *clock_max = clocks.max * 10; 666 return true; 667 } 668 669 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo, 670 u16 outputs) 671 { 672 return intel_sdvo_set_value(intel_sdvo, 673 SDVO_CMD_SET_TARGET_OUTPUT, 674 &outputs, sizeof(outputs)); 675 } 676 677 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd, 678 struct intel_sdvo_dtd *dtd) 679 { 680 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) && 681 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2)); 682 } 683 684 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo, 685 struct intel_sdvo_dtd *dtd) 686 { 687 return intel_sdvo_set_timing(intel_sdvo, 688 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd); 689 } 690 691 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo, 692 struct intel_sdvo_dtd *dtd) 693 { 694 return intel_sdvo_set_timing(intel_sdvo, 695 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd); 696 } 697 698 static bool 699 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo, 700 uint16_t clock, 701 uint16_t width, 702 uint16_t height) 703 { 704 struct intel_sdvo_preferred_input_timing_args args; 705 706 memset(&args, 0, sizeof(args)); 707 args.clock = clock; 708 args.width = width; 709 args.height = height; 710 args.interlace = 0; 711 712 if (intel_sdvo->is_lvds && 713 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width || 714 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height)) 715 args.scaled = 1; 716 717 return intel_sdvo_set_value(intel_sdvo, 718 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING, 719 &args, sizeof(args)); 720 } 721 722 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo, 723 struct intel_sdvo_dtd *dtd) 724 { 725 CTASSERT(sizeof(dtd->part1) == 8); 726 CTASSERT(sizeof(dtd->part2) == 8); 727 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1, 728 &dtd->part1, sizeof(dtd->part1)) && 729 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2, 730 &dtd->part2, sizeof(dtd->part2)); 731 } 732 733 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val) 734 { 735 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1); 736 } 737 738 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd, 739 const struct drm_display_mode *mode) 740 { 741 uint16_t width, height; 742 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len; 743 uint16_t h_sync_offset, v_sync_offset; 744 int mode_clock; 745 746 width = mode->crtc_hdisplay; 747 height = mode->crtc_vdisplay; 748 749 /* do some mode translations */ 750 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start; 751 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start; 752 753 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start; 754 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start; 755 756 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start; 757 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start; 758 759 mode_clock = mode->clock; 760 mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1; 761 mode_clock /= 10; 762 dtd->part1.clock = mode_clock; 763 764 dtd->part1.h_active = width & 0xff; 765 dtd->part1.h_blank = h_blank_len & 0xff; 766 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) | 767 ((h_blank_len >> 8) & 0xf); 768 dtd->part1.v_active = height & 0xff; 769 dtd->part1.v_blank = v_blank_len & 0xff; 770 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) | 771 ((v_blank_len >> 8) & 0xf); 772 773 dtd->part2.h_sync_off = h_sync_offset & 0xff; 774 dtd->part2.h_sync_width = h_sync_len & 0xff; 775 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 | 776 (v_sync_len & 0xf); 777 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) | 778 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) | 779 ((v_sync_len & 0x30) >> 4); 780 781 dtd->part2.dtd_flags = 0x18; 782 if (mode->flags & DRM_MODE_FLAG_PHSYNC) 783 dtd->part2.dtd_flags |= 0x2; 784 if (mode->flags & DRM_MODE_FLAG_PVSYNC) 785 dtd->part2.dtd_flags |= 0x4; 786 787 dtd->part2.sdvo_flags = 0; 788 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0; 789 dtd->part2.reserved = 0; 790 } 791 792 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode, 793 const struct intel_sdvo_dtd *dtd) 794 { 795 mode->hdisplay = dtd->part1.h_active; 796 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8; 797 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off; 798 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2; 799 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width; 800 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4; 801 mode->htotal = mode->hdisplay + dtd->part1.h_blank; 802 mode->htotal += (dtd->part1.h_high & 0xf) << 8; 803 804 mode->vdisplay = dtd->part1.v_active; 805 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8; 806 mode->vsync_start = mode->vdisplay; 807 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf; 808 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2; 809 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0; 810 mode->vsync_end = mode->vsync_start + 811 (dtd->part2.v_sync_off_width & 0xf); 812 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4; 813 mode->vtotal = mode->vdisplay + dtd->part1.v_blank; 814 mode->vtotal += (dtd->part1.v_high & 0xf) << 8; 815 816 mode->clock = dtd->part1.clock * 10; 817 818 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); 819 if (dtd->part2.dtd_flags & 0x2) 820 mode->flags |= DRM_MODE_FLAG_PHSYNC; 821 if (dtd->part2.dtd_flags & 0x4) 822 mode->flags |= DRM_MODE_FLAG_PVSYNC; 823 } 824 825 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo) 826 { 827 struct intel_sdvo_encode encode; 828 829 CTASSERT(sizeof(encode) == 2); 830 return intel_sdvo_get_value(intel_sdvo, 831 SDVO_CMD_GET_SUPP_ENCODE, 832 &encode, sizeof(encode)); 833 } 834 835 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo, 836 uint8_t mode) 837 { 838 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1); 839 } 840 841 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo, 842 uint8_t mode) 843 { 844 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1); 845 } 846 847 #if 0 848 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo) 849 { 850 int i, j; 851 uint8_t set_buf_index[2]; 852 uint8_t av_split; 853 uint8_t buf_size; 854 uint8_t buf[48]; 855 uint8_t *pos; 856 857 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1); 858 859 for (i = 0; i <= av_split; i++) { 860 set_buf_index[0] = i; set_buf_index[1] = 0; 861 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX, 862 set_buf_index, 2); 863 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0); 864 intel_sdvo_read_response(encoder, &buf_size, 1); 865 866 pos = buf; 867 for (j = 0; j <= buf_size; j += 8) { 868 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA, 869 NULL, 0); 870 intel_sdvo_read_response(encoder, pos, 8); 871 pos += 8; 872 } 873 } 874 } 875 #endif 876 877 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo) 878 { 879 struct dip_infoframe avi_if = { 880 .type = DIP_TYPE_AVI, 881 .ver = DIP_VERSION_AVI, 882 .len = DIP_LEN_AVI, 883 }; 884 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC; 885 uint8_t set_buf_index[2] = { 1, 0 }; 886 uint64_t *data = (uint64_t *)&avi_if; 887 unsigned i; 888 889 intel_dip_infoframe_csum(&avi_if); 890 891 if (!intel_sdvo_set_value(intel_sdvo, 892 SDVO_CMD_SET_HBUF_INDEX, 893 set_buf_index, 2)) 894 return false; 895 896 for (i = 0; i < sizeof(avi_if); i += 8) { 897 if (!intel_sdvo_set_value(intel_sdvo, 898 SDVO_CMD_SET_HBUF_DATA, 899 data, 8)) 900 return false; 901 data++; 902 } 903 904 return intel_sdvo_set_value(intel_sdvo, 905 SDVO_CMD_SET_HBUF_TXRATE, 906 &tx_rate, 1); 907 } 908 909 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo) 910 { 911 struct intel_sdvo_tv_format format; 912 uint32_t format_map; 913 914 format_map = 1 << intel_sdvo->tv_format_index; 915 memset(&format, 0, sizeof(format)); 916 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map))); 917 918 CTASSERT(sizeof(format) == 6); 919 return intel_sdvo_set_value(intel_sdvo, 920 SDVO_CMD_SET_TV_FORMAT, 921 &format, sizeof(format)); 922 } 923 924 static bool 925 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo, 926 const struct drm_display_mode *mode) 927 { 928 struct intel_sdvo_dtd output_dtd; 929 930 if (!intel_sdvo_set_target_output(intel_sdvo, 931 intel_sdvo->attached_output)) 932 return false; 933 934 intel_sdvo_get_dtd_from_mode(&output_dtd, mode); 935 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd)) 936 return false; 937 938 return true; 939 } 940 941 static bool 942 intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo, 943 const struct drm_display_mode *mode, 944 struct drm_display_mode *adjusted_mode) 945 { 946 /* Reset the input timing to the screen. Assume always input 0. */ 947 if (!intel_sdvo_set_target_input(intel_sdvo)) 948 return false; 949 950 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo, 951 mode->clock / 10, 952 mode->hdisplay, 953 mode->vdisplay)) 954 return false; 955 956 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo, 957 &intel_sdvo->input_dtd)) 958 return false; 959 960 intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd); 961 962 return true; 963 } 964 965 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder, 966 const struct drm_display_mode *mode, 967 struct drm_display_mode *adjusted_mode) 968 { 969 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder); 970 int multiplier; 971 972 /* We need to construct preferred input timings based on our 973 * output timings. To do that, we have to set the output 974 * timings, even though this isn't really the right place in 975 * the sequence to do it. Oh well. 976 */ 977 if (intel_sdvo->is_tv) { 978 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode)) 979 return false; 980 981 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo, 982 mode, 983 adjusted_mode); 984 } else if (intel_sdvo->is_lvds) { 985 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, 986 intel_sdvo->sdvo_lvds_fixed_mode)) 987 return false; 988 989 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo, 990 mode, 991 adjusted_mode); 992 } 993 994 /* Make the CRTC code factor in the SDVO pixel multiplier. The 995 * SDVO device will factor out the multiplier during mode_set. 996 */ 997 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode); 998 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier); 999 1000 return true; 1001 } 1002 1003 static void intel_sdvo_mode_set(struct drm_encoder *encoder, 1004 struct drm_display_mode *mode, 1005 struct drm_display_mode *adjusted_mode) 1006 { 1007 struct drm_device *dev = encoder->dev; 1008 struct drm_i915_private *dev_priv = dev->dev_private; 1009 struct drm_crtc *crtc = encoder->crtc; 1010 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 1011 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder); 1012 u32 sdvox; 1013 struct intel_sdvo_in_out_map in_out; 1014 struct intel_sdvo_dtd input_dtd, output_dtd; 1015 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode); 1016 int rate; 1017 1018 if (!mode) 1019 return; 1020 1021 /* First, set the input mapping for the first input to our controlled 1022 * output. This is only correct if we're a single-input device, in 1023 * which case the first input is the output from the appropriate SDVO 1024 * channel on the motherboard. In a two-input device, the first input 1025 * will be SDVOB and the second SDVOC. 1026 */ 1027 in_out.in0 = intel_sdvo->attached_output; 1028 in_out.in1 = 0; 1029 1030 intel_sdvo_set_value(intel_sdvo, 1031 SDVO_CMD_SET_IN_OUT_MAP, 1032 &in_out, sizeof(in_out)); 1033 1034 /* Set the output timings to the screen */ 1035 if (!intel_sdvo_set_target_output(intel_sdvo, 1036 intel_sdvo->attached_output)) 1037 return; 1038 1039 /* lvds has a special fixed output timing. */ 1040 if (intel_sdvo->is_lvds) 1041 intel_sdvo_get_dtd_from_mode(&output_dtd, 1042 intel_sdvo->sdvo_lvds_fixed_mode); 1043 else 1044 intel_sdvo_get_dtd_from_mode(&output_dtd, mode); 1045 (void) intel_sdvo_set_output_timing(intel_sdvo, &output_dtd); 1046 1047 /* Set the input timing to the screen. Assume always input 0. */ 1048 if (!intel_sdvo_set_target_input(intel_sdvo)) 1049 return; 1050 1051 if (intel_sdvo->has_hdmi_monitor) { 1052 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI); 1053 intel_sdvo_set_colorimetry(intel_sdvo, 1054 SDVO_COLORIMETRY_RGB256); 1055 intel_sdvo_set_avi_infoframe(intel_sdvo); 1056 } else 1057 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI); 1058 1059 if (intel_sdvo->is_tv && 1060 !intel_sdvo_set_tv_format(intel_sdvo)) 1061 return; 1062 1063 /* We have tried to get input timing in mode_fixup, and filled into 1064 * adjusted_mode. 1065 */ 1066 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode); 1067 (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd); 1068 1069 switch (pixel_multiplier) { 1070 default: 1071 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break; 1072 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break; 1073 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break; 1074 } 1075 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate)) 1076 return; 1077 1078 /* Set the SDVO control regs. */ 1079 if (INTEL_INFO(dev)->gen >= 4) { 1080 /* The real mode polarity is set by the SDVO commands, using 1081 * struct intel_sdvo_dtd. */ 1082 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH; 1083 if (intel_sdvo->is_hdmi) 1084 sdvox |= intel_sdvo->color_range; 1085 if (INTEL_INFO(dev)->gen < 5) 1086 sdvox |= SDVO_BORDER_ENABLE; 1087 } else { 1088 sdvox = I915_READ(intel_sdvo->sdvo_reg); 1089 switch (intel_sdvo->sdvo_reg) { 1090 case SDVOB: 1091 sdvox &= SDVOB_PRESERVE_MASK; 1092 break; 1093 case SDVOC: 1094 sdvox &= SDVOC_PRESERVE_MASK; 1095 break; 1096 } 1097 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE; 1098 } 1099 1100 if (INTEL_PCH_TYPE(dev) >= PCH_CPT) 1101 sdvox |= TRANSCODER_CPT(intel_crtc->pipe); 1102 else 1103 sdvox |= TRANSCODER(intel_crtc->pipe); 1104 1105 if (intel_sdvo->has_hdmi_audio) 1106 sdvox |= SDVO_AUDIO_ENABLE; 1107 1108 if (INTEL_INFO(dev)->gen >= 4) { 1109 /* done in crtc_mode_set as the dpll_md reg must be written early */ 1110 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) { 1111 /* done in crtc_mode_set as it lives inside the dpll register */ 1112 } else { 1113 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT; 1114 } 1115 1116 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL && 1117 INTEL_INFO(dev)->gen < 5) 1118 sdvox |= SDVO_STALL_SELECT; 1119 intel_sdvo_write_sdvox(intel_sdvo, sdvox); 1120 } 1121 1122 static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode) 1123 { 1124 struct drm_device *dev = encoder->dev; 1125 struct drm_i915_private *dev_priv = dev->dev_private; 1126 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder); 1127 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); 1128 u32 temp; 1129 1130 if (mode != DRM_MODE_DPMS_ON) { 1131 intel_sdvo_set_active_outputs(intel_sdvo, 0); 1132 if (0) 1133 intel_sdvo_set_encoder_power_state(intel_sdvo, mode); 1134 1135 if (mode == DRM_MODE_DPMS_OFF) { 1136 temp = I915_READ(intel_sdvo->sdvo_reg); 1137 if ((temp & SDVO_ENABLE) != 0) { 1138 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE); 1139 } 1140 } 1141 } else { 1142 bool input1, input2; 1143 int i; 1144 u8 status; 1145 1146 temp = I915_READ(intel_sdvo->sdvo_reg); 1147 if ((temp & SDVO_ENABLE) == 0) 1148 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE); 1149 for (i = 0; i < 2; i++) 1150 intel_wait_for_vblank(dev, intel_crtc->pipe); 1151 1152 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2); 1153 /* Warn if the device reported failure to sync. 1154 * A lot of SDVO devices fail to notify of sync, but it's 1155 * a given it the status is a success, we succeeded. 1156 */ 1157 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) { 1158 DRM_DEBUG_KMS("First %s output reported failure to " 1159 "sync\n", SDVO_NAME(intel_sdvo)); 1160 } 1161 1162 if (0) 1163 intel_sdvo_set_encoder_power_state(intel_sdvo, mode); 1164 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output); 1165 } 1166 return; 1167 } 1168 1169 static int intel_sdvo_mode_valid(struct drm_connector *connector, 1170 struct drm_display_mode *mode) 1171 { 1172 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1173 1174 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 1175 return MODE_NO_DBLESCAN; 1176 1177 if (intel_sdvo->pixel_clock_min > mode->clock) 1178 return MODE_CLOCK_LOW; 1179 1180 if (intel_sdvo->pixel_clock_max < mode->clock) 1181 return MODE_CLOCK_HIGH; 1182 1183 if (intel_sdvo->is_lvds) { 1184 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay) 1185 return MODE_PANEL; 1186 1187 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay) 1188 return MODE_PANEL; 1189 } 1190 1191 return MODE_OK; 1192 } 1193 1194 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps) 1195 { 1196 CTASSERT(sizeof(*caps) == 8); 1197 if (!intel_sdvo_get_value(intel_sdvo, 1198 SDVO_CMD_GET_DEVICE_CAPS, 1199 caps, sizeof(*caps))) 1200 return false; 1201 1202 DRM_DEBUG_KMS("SDVO capabilities:\n" 1203 " vendor_id: %d\n" 1204 " device_id: %d\n" 1205 " device_rev_id: %d\n" 1206 " sdvo_version_major: %d\n" 1207 " sdvo_version_minor: %d\n" 1208 " sdvo_inputs_mask: %d\n" 1209 " smooth_scaling: %d\n" 1210 " sharp_scaling: %d\n" 1211 " up_scaling: %d\n" 1212 " down_scaling: %d\n" 1213 " stall_support: %d\n" 1214 " output_flags: %d\n", 1215 caps->vendor_id, 1216 caps->device_id, 1217 caps->device_rev_id, 1218 caps->sdvo_version_major, 1219 caps->sdvo_version_minor, 1220 caps->sdvo_inputs_mask, 1221 caps->smooth_scaling, 1222 caps->sharp_scaling, 1223 caps->up_scaling, 1224 caps->down_scaling, 1225 caps->stall_support, 1226 caps->output_flags); 1227 1228 return true; 1229 } 1230 1231 static int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo) 1232 { 1233 struct drm_device *dev = intel_sdvo->base.base.dev; 1234 u8 response[2]; 1235 1236 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise 1237 * on the line. */ 1238 if (IS_I945G(dev) || IS_I945GM(dev)) 1239 return false; 1240 1241 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, 1242 &response, 2) && response[0]; 1243 } 1244 1245 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder) 1246 { 1247 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base); 1248 1249 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, 1250 &intel_sdvo->hotplug_active, 2); 1251 } 1252 1253 static bool 1254 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo) 1255 { 1256 /* Is there more than one type of output? */ 1257 return bitcount16(intel_sdvo->caps.output_flags) > 1; 1258 } 1259 1260 static struct edid * 1261 intel_sdvo_get_edid(struct drm_connector *connector) 1262 { 1263 struct intel_sdvo *sdvo = intel_attached_sdvo(connector); 1264 return drm_get_edid(connector, sdvo->ddc); 1265 } 1266 1267 /* Mac mini hack -- use the same DDC as the analog connector */ 1268 static struct edid * 1269 intel_sdvo_get_analog_edid(struct drm_connector *connector) 1270 { 1271 struct drm_i915_private *dev_priv = connector->dev->dev_private; 1272 1273 return drm_get_edid(connector, 1274 dev_priv->gmbus[dev_priv->crt_ddc_pin]); 1275 } 1276 1277 static enum drm_connector_status 1278 intel_sdvo_tmds_sink_detect(struct drm_connector *connector) 1279 { 1280 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1281 enum drm_connector_status status; 1282 struct edid *edid; 1283 1284 edid = intel_sdvo_get_edid(connector); 1285 1286 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) { 1287 u8 ddc, saved_ddc = intel_sdvo->ddc_bus; 1288 1289 /* 1290 * Don't use the 1 as the argument of DDC bus switch to get 1291 * the EDID. It is used for SDVO SPD ROM. 1292 */ 1293 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) { 1294 intel_sdvo->ddc_bus = ddc; 1295 edid = intel_sdvo_get_edid(connector); 1296 if (edid) 1297 break; 1298 } 1299 /* 1300 * If we found the EDID on the other bus, 1301 * assume that is the correct DDC bus. 1302 */ 1303 if (edid == NULL) 1304 intel_sdvo->ddc_bus = saved_ddc; 1305 } 1306 1307 /* 1308 * When there is no edid and no monitor is connected with VGA 1309 * port, try to use the CRT ddc to read the EDID for DVI-connector. 1310 */ 1311 if (edid == NULL) 1312 edid = intel_sdvo_get_analog_edid(connector); 1313 1314 status = connector_status_unknown; 1315 if (edid != NULL) { 1316 /* DDC bus is shared, match EDID to connector type */ 1317 if (edid->input & DRM_EDID_INPUT_DIGITAL) { 1318 status = connector_status_connected; 1319 if (intel_sdvo->is_hdmi) { 1320 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid); 1321 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid); 1322 } 1323 } else 1324 status = connector_status_disconnected; 1325 drm_free(edid, DRM_MEM_KMS); 1326 } 1327 1328 if (status == connector_status_connected) { 1329 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1330 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO) 1331 intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON); 1332 } 1333 1334 return status; 1335 } 1336 1337 static bool 1338 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo, 1339 struct edid *edid) 1340 { 1341 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL); 1342 bool connector_is_digital = !!IS_DIGITAL(sdvo); 1343 1344 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n", 1345 connector_is_digital, monitor_is_digital); 1346 return connector_is_digital == monitor_is_digital; 1347 } 1348 1349 static enum drm_connector_status 1350 intel_sdvo_detect(struct drm_connector *connector, bool force) 1351 { 1352 uint16_t response; 1353 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1354 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1355 enum drm_connector_status ret; 1356 1357 if (!intel_sdvo_write_cmd(intel_sdvo, 1358 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0)) 1359 return connector_status_unknown; 1360 1361 /* add 30ms delay when the output type might be TV */ 1362 if (intel_sdvo->caps.output_flags & 1363 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0)) 1364 DELAY(30*1000); 1365 1366 if (!intel_sdvo_read_response(intel_sdvo, &response, 2)) 1367 return connector_status_unknown; 1368 1369 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n", 1370 response & 0xff, response >> 8, 1371 intel_sdvo_connector->output_flag); 1372 1373 if (response == 0) 1374 return connector_status_disconnected; 1375 1376 intel_sdvo->attached_output = response; 1377 1378 intel_sdvo->has_hdmi_monitor = false; 1379 intel_sdvo->has_hdmi_audio = false; 1380 1381 if ((intel_sdvo_connector->output_flag & response) == 0) 1382 ret = connector_status_disconnected; 1383 else if (IS_TMDS(intel_sdvo_connector)) 1384 ret = intel_sdvo_tmds_sink_detect(connector); 1385 else { 1386 struct edid *edid; 1387 1388 /* if we have an edid check it matches the connection */ 1389 edid = intel_sdvo_get_edid(connector); 1390 if (edid == NULL) 1391 edid = intel_sdvo_get_analog_edid(connector); 1392 if (edid != NULL) { 1393 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector, 1394 edid)) 1395 ret = connector_status_connected; 1396 else 1397 ret = connector_status_disconnected; 1398 1399 drm_free(edid, DRM_MEM_KMS); 1400 } else 1401 ret = connector_status_connected; 1402 } 1403 1404 /* May update encoder flag for like clock for SDVO TV, etc.*/ 1405 if (ret == connector_status_connected) { 1406 intel_sdvo->is_tv = false; 1407 intel_sdvo->is_lvds = false; 1408 intel_sdvo->base.needs_tv_clock = false; 1409 1410 if (response & SDVO_TV_MASK) { 1411 intel_sdvo->is_tv = true; 1412 intel_sdvo->base.needs_tv_clock = true; 1413 } 1414 if (response & SDVO_LVDS_MASK) 1415 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL; 1416 } 1417 1418 return ret; 1419 } 1420 1421 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector) 1422 { 1423 struct edid *edid; 1424 1425 /* set the bus switch and get the modes */ 1426 edid = intel_sdvo_get_edid(connector); 1427 1428 /* 1429 * Mac mini hack. On this device, the DVI-I connector shares one DDC 1430 * link between analog and digital outputs. So, if the regular SDVO 1431 * DDC fails, check to see if the analog output is disconnected, in 1432 * which case we'll look there for the digital DDC data. 1433 */ 1434 if (edid == NULL) 1435 edid = intel_sdvo_get_analog_edid(connector); 1436 1437 if (edid != NULL) { 1438 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector), 1439 edid)) { 1440 drm_mode_connector_update_edid_property(connector, edid); 1441 drm_add_edid_modes(connector, edid); 1442 } 1443 1444 drm_free(edid, DRM_MEM_KMS); 1445 } 1446 } 1447 1448 /* 1449 * Set of SDVO TV modes. 1450 * Note! This is in reply order (see loop in get_tv_modes). 1451 * XXX: all 60Hz refresh? 1452 */ 1453 static const struct drm_display_mode sdvo_tv_modes[] = { 1454 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384, 1455 416, 0, 200, 201, 232, 233, 0, 1456 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1457 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384, 1458 416, 0, 240, 241, 272, 273, 0, 1459 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1460 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464, 1461 496, 0, 300, 301, 332, 333, 0, 1462 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1463 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704, 1464 736, 0, 350, 351, 382, 383, 0, 1465 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1466 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704, 1467 736, 0, 400, 401, 432, 433, 0, 1468 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1469 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704, 1470 736, 0, 480, 481, 512, 513, 0, 1471 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1472 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768, 1473 800, 0, 480, 481, 512, 513, 0, 1474 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1475 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768, 1476 800, 0, 576, 577, 608, 609, 0, 1477 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1478 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784, 1479 816, 0, 350, 351, 382, 383, 0, 1480 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1481 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784, 1482 816, 0, 400, 401, 432, 433, 0, 1483 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1484 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784, 1485 816, 0, 480, 481, 512, 513, 0, 1486 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1487 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784, 1488 816, 0, 540, 541, 572, 573, 0, 1489 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1490 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784, 1491 816, 0, 576, 577, 608, 609, 0, 1492 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1493 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832, 1494 864, 0, 576, 577, 608, 609, 0, 1495 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1496 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864, 1497 896, 0, 600, 601, 632, 633, 0, 1498 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1499 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896, 1500 928, 0, 624, 625, 656, 657, 0, 1501 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1502 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984, 1503 1016, 0, 766, 767, 798, 799, 0, 1504 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1505 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088, 1506 1120, 0, 768, 769, 800, 801, 0, 1507 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1508 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344, 1509 1376, 0, 1024, 1025, 1056, 1057, 0, 1510 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1511 }; 1512 1513 static void intel_sdvo_get_tv_modes(struct drm_connector *connector) 1514 { 1515 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1516 struct intel_sdvo_sdtv_resolution_request tv_res; 1517 uint32_t reply = 0, format_map = 0; 1518 int i; 1519 1520 /* Read the list of supported input resolutions for the selected TV 1521 * format. 1522 */ 1523 format_map = 1 << intel_sdvo->tv_format_index; 1524 memcpy(&tv_res, &format_map, 1525 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request))); 1526 1527 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output)) 1528 return; 1529 1530 CTASSERT(sizeof(tv_res) == 3); 1531 if (!intel_sdvo_write_cmd(intel_sdvo, 1532 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT, 1533 &tv_res, sizeof(tv_res))) 1534 return; 1535 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3)) 1536 return; 1537 1538 for (i = 0; i < DRM_ARRAY_SIZE(sdvo_tv_modes); i++) 1539 if (reply & (1 << i)) { 1540 struct drm_display_mode *nmode; 1541 nmode = drm_mode_duplicate(connector->dev, 1542 &sdvo_tv_modes[i]); 1543 if (nmode) 1544 drm_mode_probed_add(connector, nmode); 1545 } 1546 } 1547 1548 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector) 1549 { 1550 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1551 struct drm_i915_private *dev_priv = connector->dev->dev_private; 1552 struct drm_display_mode *newmode; 1553 1554 /* 1555 * Attempt to get the mode list from DDC. 1556 * Assume that the preferred modes are 1557 * arranged in priority order. 1558 */ 1559 intel_ddc_get_modes(connector, intel_sdvo->i2c); 1560 if (!list_empty(&connector->probed_modes)) 1561 goto end; 1562 1563 /* Fetch modes from VBT */ 1564 if (dev_priv->sdvo_lvds_vbt_mode != NULL) { 1565 newmode = drm_mode_duplicate(connector->dev, 1566 dev_priv->sdvo_lvds_vbt_mode); 1567 if (newmode != NULL) { 1568 /* Guarantee the mode is preferred */ 1569 newmode->type = (DRM_MODE_TYPE_PREFERRED | 1570 DRM_MODE_TYPE_DRIVER); 1571 drm_mode_probed_add(connector, newmode); 1572 } 1573 } 1574 1575 end: 1576 list_for_each_entry(newmode, &connector->probed_modes, head) { 1577 if (newmode->type & DRM_MODE_TYPE_PREFERRED) { 1578 intel_sdvo->sdvo_lvds_fixed_mode = 1579 drm_mode_duplicate(connector->dev, newmode); 1580 1581 drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode, 1582 0); 1583 1584 intel_sdvo->is_lvds = true; 1585 break; 1586 } 1587 } 1588 1589 } 1590 1591 static int intel_sdvo_get_modes(struct drm_connector *connector) 1592 { 1593 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1594 1595 if (IS_TV(intel_sdvo_connector)) 1596 intel_sdvo_get_tv_modes(connector); 1597 else if (IS_LVDS(intel_sdvo_connector)) 1598 intel_sdvo_get_lvds_modes(connector); 1599 else 1600 intel_sdvo_get_ddc_modes(connector); 1601 1602 return !list_empty(&connector->probed_modes); 1603 } 1604 1605 static void 1606 intel_sdvo_destroy_enhance_property(struct drm_connector *connector) 1607 { 1608 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1609 struct drm_device *dev = connector->dev; 1610 1611 if (intel_sdvo_connector->left) 1612 drm_property_destroy(dev, intel_sdvo_connector->left); 1613 if (intel_sdvo_connector->right) 1614 drm_property_destroy(dev, intel_sdvo_connector->right); 1615 if (intel_sdvo_connector->top) 1616 drm_property_destroy(dev, intel_sdvo_connector->top); 1617 if (intel_sdvo_connector->bottom) 1618 drm_property_destroy(dev, intel_sdvo_connector->bottom); 1619 if (intel_sdvo_connector->hpos) 1620 drm_property_destroy(dev, intel_sdvo_connector->hpos); 1621 if (intel_sdvo_connector->vpos) 1622 drm_property_destroy(dev, intel_sdvo_connector->vpos); 1623 if (intel_sdvo_connector->saturation) 1624 drm_property_destroy(dev, intel_sdvo_connector->saturation); 1625 if (intel_sdvo_connector->contrast) 1626 drm_property_destroy(dev, intel_sdvo_connector->contrast); 1627 if (intel_sdvo_connector->hue) 1628 drm_property_destroy(dev, intel_sdvo_connector->hue); 1629 if (intel_sdvo_connector->sharpness) 1630 drm_property_destroy(dev, intel_sdvo_connector->sharpness); 1631 if (intel_sdvo_connector->flicker_filter) 1632 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter); 1633 if (intel_sdvo_connector->flicker_filter_2d) 1634 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d); 1635 if (intel_sdvo_connector->flicker_filter_adaptive) 1636 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive); 1637 if (intel_sdvo_connector->tv_luma_filter) 1638 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter); 1639 if (intel_sdvo_connector->tv_chroma_filter) 1640 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter); 1641 if (intel_sdvo_connector->dot_crawl) 1642 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl); 1643 if (intel_sdvo_connector->brightness) 1644 drm_property_destroy(dev, intel_sdvo_connector->brightness); 1645 } 1646 1647 static void intel_sdvo_destroy(struct drm_connector *connector) 1648 { 1649 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1650 1651 if (intel_sdvo_connector->tv_format) 1652 drm_property_destroy(connector->dev, 1653 intel_sdvo_connector->tv_format); 1654 1655 intel_sdvo_destroy_enhance_property(connector); 1656 #if 0 1657 drm_sysfs_connector_remove(connector); 1658 #endif 1659 drm_connector_cleanup(connector); 1660 drm_free(connector, DRM_MEM_KMS); 1661 } 1662 1663 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector) 1664 { 1665 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1666 struct edid *edid; 1667 bool has_audio = false; 1668 1669 if (!intel_sdvo->is_hdmi) 1670 return false; 1671 1672 edid = intel_sdvo_get_edid(connector); 1673 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL) 1674 has_audio = drm_detect_monitor_audio(edid); 1675 1676 return has_audio; 1677 } 1678 1679 static int 1680 intel_sdvo_set_property(struct drm_connector *connector, 1681 struct drm_property *property, 1682 uint64_t val) 1683 { 1684 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1685 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1686 struct drm_i915_private *dev_priv = connector->dev->dev_private; 1687 uint16_t temp_value; 1688 uint8_t cmd; 1689 int ret; 1690 1691 ret = drm_object_property_set_value(&connector->base, property, val); 1692 if (ret) 1693 return ret; 1694 1695 if (property == dev_priv->force_audio_property) { 1696 int i = val; 1697 bool has_audio; 1698 1699 if (i == intel_sdvo_connector->force_audio) 1700 return 0; 1701 1702 intel_sdvo_connector->force_audio = i; 1703 1704 if (i == HDMI_AUDIO_AUTO) 1705 has_audio = intel_sdvo_detect_hdmi_audio(connector); 1706 else 1707 has_audio = (i == HDMI_AUDIO_ON); 1708 1709 if (has_audio == intel_sdvo->has_hdmi_audio) 1710 return 0; 1711 1712 intel_sdvo->has_hdmi_audio = has_audio; 1713 goto done; 1714 } 1715 1716 if (property == dev_priv->broadcast_rgb_property) { 1717 if (val == !!intel_sdvo->color_range) 1718 return 0; 1719 1720 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0; 1721 goto done; 1722 } 1723 1724 #define CHECK_PROPERTY(name, NAME) \ 1725 if (intel_sdvo_connector->name == property) { \ 1726 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \ 1727 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \ 1728 cmd = SDVO_CMD_SET_##NAME; \ 1729 intel_sdvo_connector->cur_##name = temp_value; \ 1730 goto set_value; \ 1731 } 1732 1733 if (property == intel_sdvo_connector->tv_format) { 1734 if (val >= TV_FORMAT_NUM) 1735 return -EINVAL; 1736 1737 if (intel_sdvo->tv_format_index == 1738 intel_sdvo_connector->tv_format_supported[val]) 1739 return 0; 1740 1741 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val]; 1742 goto done; 1743 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) { 1744 temp_value = val; 1745 if (intel_sdvo_connector->left == property) { 1746 drm_object_property_set_value(&connector->base, 1747 intel_sdvo_connector->right, val); 1748 if (intel_sdvo_connector->left_margin == temp_value) 1749 return 0; 1750 1751 intel_sdvo_connector->left_margin = temp_value; 1752 intel_sdvo_connector->right_margin = temp_value; 1753 temp_value = intel_sdvo_connector->max_hscan - 1754 intel_sdvo_connector->left_margin; 1755 cmd = SDVO_CMD_SET_OVERSCAN_H; 1756 goto set_value; 1757 } else if (intel_sdvo_connector->right == property) { 1758 drm_object_property_set_value(&connector->base, 1759 intel_sdvo_connector->left, val); 1760 if (intel_sdvo_connector->right_margin == temp_value) 1761 return 0; 1762 1763 intel_sdvo_connector->left_margin = temp_value; 1764 intel_sdvo_connector->right_margin = temp_value; 1765 temp_value = intel_sdvo_connector->max_hscan - 1766 intel_sdvo_connector->left_margin; 1767 cmd = SDVO_CMD_SET_OVERSCAN_H; 1768 goto set_value; 1769 } else if (intel_sdvo_connector->top == property) { 1770 drm_object_property_set_value(&connector->base, 1771 intel_sdvo_connector->bottom, val); 1772 if (intel_sdvo_connector->top_margin == temp_value) 1773 return 0; 1774 1775 intel_sdvo_connector->top_margin = temp_value; 1776 intel_sdvo_connector->bottom_margin = temp_value; 1777 temp_value = intel_sdvo_connector->max_vscan - 1778 intel_sdvo_connector->top_margin; 1779 cmd = SDVO_CMD_SET_OVERSCAN_V; 1780 goto set_value; 1781 } else if (intel_sdvo_connector->bottom == property) { 1782 drm_object_property_set_value(&connector->base, 1783 intel_sdvo_connector->top, val); 1784 if (intel_sdvo_connector->bottom_margin == temp_value) 1785 return 0; 1786 1787 intel_sdvo_connector->top_margin = temp_value; 1788 intel_sdvo_connector->bottom_margin = temp_value; 1789 temp_value = intel_sdvo_connector->max_vscan - 1790 intel_sdvo_connector->top_margin; 1791 cmd = SDVO_CMD_SET_OVERSCAN_V; 1792 goto set_value; 1793 } 1794 CHECK_PROPERTY(hpos, HPOS) 1795 CHECK_PROPERTY(vpos, VPOS) 1796 CHECK_PROPERTY(saturation, SATURATION) 1797 CHECK_PROPERTY(contrast, CONTRAST) 1798 CHECK_PROPERTY(hue, HUE) 1799 CHECK_PROPERTY(brightness, BRIGHTNESS) 1800 CHECK_PROPERTY(sharpness, SHARPNESS) 1801 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER) 1802 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D) 1803 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE) 1804 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER) 1805 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER) 1806 CHECK_PROPERTY(dot_crawl, DOT_CRAWL) 1807 } 1808 1809 return -EINVAL; /* unknown property */ 1810 1811 set_value: 1812 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2)) 1813 return -EIO; 1814 1815 1816 done: 1817 if (intel_sdvo->base.base.crtc) { 1818 struct drm_crtc *crtc = intel_sdvo->base.base.crtc; 1819 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x, 1820 crtc->y, crtc->fb); 1821 } 1822 1823 return 0; 1824 #undef CHECK_PROPERTY 1825 } 1826 1827 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = { 1828 .dpms = intel_sdvo_dpms, 1829 .mode_fixup = intel_sdvo_mode_fixup, 1830 .prepare = intel_encoder_prepare, 1831 .mode_set = intel_sdvo_mode_set, 1832 .commit = intel_encoder_commit, 1833 }; 1834 1835 static const struct drm_connector_funcs intel_sdvo_connector_funcs = { 1836 .dpms = drm_helper_connector_dpms, 1837 .detect = intel_sdvo_detect, 1838 .fill_modes = drm_helper_probe_single_connector_modes, 1839 .set_property = intel_sdvo_set_property, 1840 .destroy = intel_sdvo_destroy, 1841 }; 1842 1843 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = { 1844 .get_modes = intel_sdvo_get_modes, 1845 .mode_valid = intel_sdvo_mode_valid, 1846 .best_encoder = intel_best_encoder, 1847 }; 1848 1849 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder) 1850 { 1851 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder); 1852 1853 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL) 1854 drm_mode_destroy(encoder->dev, 1855 intel_sdvo->sdvo_lvds_fixed_mode); 1856 1857 device_delete_child(intel_sdvo->base.base.dev->dev, 1858 intel_sdvo->ddc_iic_bus); 1859 intel_encoder_destroy(encoder); 1860 } 1861 1862 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = { 1863 .destroy = intel_sdvo_enc_destroy, 1864 }; 1865 1866 static void 1867 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo) 1868 { 1869 uint16_t mask = 0; 1870 unsigned int num_bits; 1871 1872 /* Make a mask of outputs less than or equal to our own priority in the 1873 * list. 1874 */ 1875 switch (sdvo->controlled_output) { 1876 case SDVO_OUTPUT_LVDS1: 1877 mask |= SDVO_OUTPUT_LVDS1; 1878 case SDVO_OUTPUT_LVDS0: 1879 mask |= SDVO_OUTPUT_LVDS0; 1880 case SDVO_OUTPUT_TMDS1: 1881 mask |= SDVO_OUTPUT_TMDS1; 1882 case SDVO_OUTPUT_TMDS0: 1883 mask |= SDVO_OUTPUT_TMDS0; 1884 case SDVO_OUTPUT_RGB1: 1885 mask |= SDVO_OUTPUT_RGB1; 1886 case SDVO_OUTPUT_RGB0: 1887 mask |= SDVO_OUTPUT_RGB0; 1888 break; 1889 } 1890 1891 /* Count bits to find what number we are in the priority list. */ 1892 mask &= sdvo->caps.output_flags; 1893 num_bits = bitcount16(mask); 1894 /* If more than 3 outputs, default to DDC bus 3 for now. */ 1895 if (num_bits > 3) 1896 num_bits = 3; 1897 1898 /* Corresponds to SDVO_CONTROL_BUS_DDCx */ 1899 sdvo->ddc_bus = 1 << num_bits; 1900 } 1901 1902 /** 1903 * Choose the appropriate DDC bus for control bus switch command for this 1904 * SDVO output based on the controlled output. 1905 * 1906 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS 1907 * outputs, then LVDS outputs. 1908 */ 1909 static void 1910 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv, 1911 struct intel_sdvo *sdvo, u32 reg) 1912 { 1913 struct sdvo_device_mapping *mapping; 1914 1915 if (IS_SDVOB(reg)) 1916 mapping = &(dev_priv->sdvo_mappings[0]); 1917 else 1918 mapping = &(dev_priv->sdvo_mappings[1]); 1919 1920 if (mapping->initialized) 1921 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4); 1922 else 1923 intel_sdvo_guess_ddc_bus(sdvo); 1924 } 1925 1926 static void 1927 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv, 1928 struct intel_sdvo *sdvo, u32 reg) 1929 { 1930 struct sdvo_device_mapping *mapping; 1931 u8 pin; 1932 1933 if (IS_SDVOB(reg)) 1934 mapping = &dev_priv->sdvo_mappings[0]; 1935 else 1936 mapping = &dev_priv->sdvo_mappings[1]; 1937 1938 pin = GMBUS_PORT_DPB; 1939 if (mapping->initialized) 1940 pin = mapping->i2c_pin; 1941 1942 if (pin < GMBUS_NUM_PORTS) { 1943 sdvo->i2c = dev_priv->gmbus[pin]; 1944 intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ); 1945 intel_gmbus_force_bit(sdvo->i2c, true); 1946 } else { 1947 sdvo->i2c = dev_priv->gmbus[GMBUS_PORT_DPB]; 1948 } 1949 } 1950 1951 static bool 1952 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device) 1953 { 1954 return intel_sdvo_check_supp_encode(intel_sdvo); 1955 } 1956 1957 static u8 1958 intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg) 1959 { 1960 struct drm_i915_private *dev_priv = dev->dev_private; 1961 struct sdvo_device_mapping *my_mapping, *other_mapping; 1962 1963 if (IS_SDVOB(sdvo_reg)) { 1964 my_mapping = &dev_priv->sdvo_mappings[0]; 1965 other_mapping = &dev_priv->sdvo_mappings[1]; 1966 } else { 1967 my_mapping = &dev_priv->sdvo_mappings[1]; 1968 other_mapping = &dev_priv->sdvo_mappings[0]; 1969 } 1970 1971 /* If the BIOS described our SDVO device, take advantage of it. */ 1972 if (my_mapping->slave_addr) 1973 return my_mapping->slave_addr; 1974 1975 /* If the BIOS only described a different SDVO device, use the 1976 * address that it isn't using. 1977 */ 1978 if (other_mapping->slave_addr) { 1979 if (other_mapping->slave_addr == 0x70) 1980 return 0x72; 1981 else 1982 return 0x70; 1983 } 1984 1985 /* No SDVO device info is found for another DVO port, 1986 * so use mapping assumption we had before BIOS parsing. 1987 */ 1988 if (IS_SDVOB(sdvo_reg)) 1989 return 0x70; 1990 else 1991 return 0x72; 1992 } 1993 1994 static void 1995 intel_sdvo_connector_init(struct intel_sdvo_connector *connector, 1996 struct intel_sdvo *encoder) 1997 { 1998 drm_connector_init(encoder->base.base.dev, 1999 &connector->base.base, 2000 &intel_sdvo_connector_funcs, 2001 connector->base.base.connector_type); 2002 2003 drm_connector_helper_add(&connector->base.base, 2004 &intel_sdvo_connector_helper_funcs); 2005 2006 connector->base.base.interlace_allowed = 1; 2007 connector->base.base.doublescan_allowed = 0; 2008 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB; 2009 2010 intel_connector_attach_encoder(&connector->base, &encoder->base); 2011 #if 0 2012 drm_sysfs_connector_add(&connector->base.base); 2013 #endif 2014 } 2015 2016 static void 2017 intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector) 2018 { 2019 struct drm_device *dev = connector->base.base.dev; 2020 2021 intel_attach_force_audio_property(&connector->base.base); 2022 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) 2023 intel_attach_broadcast_rgb_property(&connector->base.base); 2024 } 2025 2026 static bool 2027 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device) 2028 { 2029 struct drm_encoder *encoder = &intel_sdvo->base.base; 2030 struct drm_connector *connector; 2031 struct intel_encoder *intel_encoder = to_intel_encoder(encoder); 2032 struct intel_connector *intel_connector; 2033 struct intel_sdvo_connector *intel_sdvo_connector; 2034 2035 intel_sdvo_connector = kmalloc(sizeof(struct intel_sdvo_connector), 2036 DRM_MEM_KMS, M_WAITOK | M_ZERO); 2037 2038 if (device == 0) { 2039 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0; 2040 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0; 2041 } else if (device == 1) { 2042 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1; 2043 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1; 2044 } 2045 2046 intel_connector = &intel_sdvo_connector->base; 2047 connector = &intel_connector->base; 2048 if (intel_sdvo_supports_hotplug(intel_sdvo) & (1 << device)) { 2049 connector->polled = DRM_CONNECTOR_POLL_HPD; 2050 intel_sdvo->hotplug_active[0] |= 1 << device; 2051 /* Some SDVO devices have one-shot hotplug interrupts. 2052 * Ensure that they get re-enabled when an interrupt happens. 2053 */ 2054 intel_encoder->hot_plug = intel_sdvo_enable_hotplug; 2055 intel_sdvo_enable_hotplug(intel_encoder); 2056 } 2057 else 2058 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT; 2059 encoder->encoder_type = DRM_MODE_ENCODER_TMDS; 2060 connector->connector_type = DRM_MODE_CONNECTOR_DVID; 2061 2062 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) { 2063 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA; 2064 intel_sdvo->is_hdmi = true; 2065 } 2066 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) | 2067 (1 << INTEL_ANALOG_CLONE_BIT)); 2068 2069 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo); 2070 if (intel_sdvo->is_hdmi) 2071 intel_sdvo_add_hdmi_properties(intel_sdvo_connector); 2072 2073 return true; 2074 } 2075 2076 static bool 2077 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type) 2078 { 2079 struct drm_encoder *encoder = &intel_sdvo->base.base; 2080 struct drm_connector *connector; 2081 struct intel_connector *intel_connector; 2082 struct intel_sdvo_connector *intel_sdvo_connector; 2083 2084 intel_sdvo_connector = kmalloc(sizeof(struct intel_sdvo_connector), 2085 DRM_MEM_KMS, M_WAITOK | M_ZERO); 2086 if (!intel_sdvo_connector) 2087 return false; 2088 2089 intel_connector = &intel_sdvo_connector->base; 2090 connector = &intel_connector->base; 2091 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC; 2092 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO; 2093 2094 intel_sdvo->controlled_output |= type; 2095 intel_sdvo_connector->output_flag = type; 2096 2097 intel_sdvo->is_tv = true; 2098 intel_sdvo->base.needs_tv_clock = true; 2099 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT; 2100 2101 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo); 2102 2103 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type)) 2104 goto err; 2105 2106 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector)) 2107 goto err; 2108 2109 return true; 2110 2111 err: 2112 intel_sdvo_destroy(connector); 2113 return false; 2114 } 2115 2116 static bool 2117 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device) 2118 { 2119 struct drm_encoder *encoder = &intel_sdvo->base.base; 2120 struct drm_connector *connector; 2121 struct intel_connector *intel_connector; 2122 struct intel_sdvo_connector *intel_sdvo_connector; 2123 2124 intel_sdvo_connector = kmalloc(sizeof(struct intel_sdvo_connector), 2125 DRM_MEM_KMS, M_WAITOK | M_ZERO); 2126 2127 intel_connector = &intel_sdvo_connector->base; 2128 connector = &intel_connector->base; 2129 connector->polled = DRM_CONNECTOR_POLL_CONNECT; 2130 encoder->encoder_type = DRM_MODE_ENCODER_DAC; 2131 connector->connector_type = DRM_MODE_CONNECTOR_VGA; 2132 2133 if (device == 0) { 2134 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0; 2135 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0; 2136 } else if (device == 1) { 2137 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1; 2138 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1; 2139 } 2140 2141 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) | 2142 (1 << INTEL_ANALOG_CLONE_BIT)); 2143 2144 intel_sdvo_connector_init(intel_sdvo_connector, 2145 intel_sdvo); 2146 return true; 2147 } 2148 2149 static bool 2150 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device) 2151 { 2152 struct drm_encoder *encoder = &intel_sdvo->base.base; 2153 struct drm_connector *connector; 2154 struct intel_connector *intel_connector; 2155 struct intel_sdvo_connector *intel_sdvo_connector; 2156 2157 intel_sdvo_connector = kmalloc(sizeof(struct intel_sdvo_connector), 2158 DRM_MEM_KMS, M_WAITOK | M_ZERO); 2159 2160 intel_connector = &intel_sdvo_connector->base; 2161 connector = &intel_connector->base; 2162 encoder->encoder_type = DRM_MODE_ENCODER_LVDS; 2163 connector->connector_type = DRM_MODE_CONNECTOR_LVDS; 2164 2165 if (device == 0) { 2166 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0; 2167 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0; 2168 } else if (device == 1) { 2169 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1; 2170 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1; 2171 } 2172 2173 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) | 2174 (1 << INTEL_SDVO_LVDS_CLONE_BIT)); 2175 2176 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo); 2177 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector)) 2178 goto err; 2179 2180 return true; 2181 2182 err: 2183 intel_sdvo_destroy(connector); 2184 return false; 2185 } 2186 2187 static bool 2188 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags) 2189 { 2190 intel_sdvo->is_tv = false; 2191 intel_sdvo->base.needs_tv_clock = false; 2192 intel_sdvo->is_lvds = false; 2193 2194 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/ 2195 2196 if (flags & SDVO_OUTPUT_TMDS0) 2197 if (!intel_sdvo_dvi_init(intel_sdvo, 0)) 2198 return false; 2199 2200 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK) 2201 if (!intel_sdvo_dvi_init(intel_sdvo, 1)) 2202 return false; 2203 2204 /* TV has no XXX1 function block */ 2205 if (flags & SDVO_OUTPUT_SVID0) 2206 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0)) 2207 return false; 2208 2209 if (flags & SDVO_OUTPUT_CVBS0) 2210 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0)) 2211 return false; 2212 2213 if (flags & SDVO_OUTPUT_RGB0) 2214 if (!intel_sdvo_analog_init(intel_sdvo, 0)) 2215 return false; 2216 2217 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK) 2218 if (!intel_sdvo_analog_init(intel_sdvo, 1)) 2219 return false; 2220 2221 if (flags & SDVO_OUTPUT_LVDS0) 2222 if (!intel_sdvo_lvds_init(intel_sdvo, 0)) 2223 return false; 2224 2225 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK) 2226 if (!intel_sdvo_lvds_init(intel_sdvo, 1)) 2227 return false; 2228 2229 if ((flags & SDVO_OUTPUT_MASK) == 0) { 2230 unsigned char bytes[2]; 2231 2232 intel_sdvo->controlled_output = 0; 2233 memcpy(bytes, &intel_sdvo->caps.output_flags, 2); 2234 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n", 2235 SDVO_NAME(intel_sdvo), 2236 bytes[0], bytes[1]); 2237 return false; 2238 } 2239 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); 2240 2241 return true; 2242 } 2243 2244 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo, 2245 struct intel_sdvo_connector *intel_sdvo_connector, 2246 int type) 2247 { 2248 struct drm_device *dev = intel_sdvo->base.base.dev; 2249 struct intel_sdvo_tv_format format; 2250 uint32_t format_map, i; 2251 2252 if (!intel_sdvo_set_target_output(intel_sdvo, type)) 2253 return false; 2254 2255 CTASSERT(sizeof(format) == 6); 2256 if (!intel_sdvo_get_value(intel_sdvo, 2257 SDVO_CMD_GET_SUPPORTED_TV_FORMATS, 2258 &format, sizeof(format))) 2259 return false; 2260 2261 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format))); 2262 2263 if (format_map == 0) 2264 return false; 2265 2266 intel_sdvo_connector->format_supported_num = 0; 2267 for (i = 0 ; i < TV_FORMAT_NUM; i++) 2268 if (format_map & (1 << i)) 2269 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i; 2270 2271 2272 intel_sdvo_connector->tv_format = 2273 drm_property_create(dev, DRM_MODE_PROP_ENUM, 2274 "mode", intel_sdvo_connector->format_supported_num); 2275 if (!intel_sdvo_connector->tv_format) 2276 return false; 2277 2278 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++) 2279 drm_property_add_enum( 2280 intel_sdvo_connector->tv_format, i, 2281 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]); 2282 2283 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0]; 2284 drm_object_attach_property(&intel_sdvo_connector->base.base.base, 2285 intel_sdvo_connector->tv_format, 0); 2286 return true; 2287 2288 } 2289 2290 #define ENHANCEMENT(name, NAME) do { \ 2291 if (enhancements.name) { \ 2292 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \ 2293 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \ 2294 return false; \ 2295 intel_sdvo_connector->max_##name = data_value[0]; \ 2296 intel_sdvo_connector->cur_##name = response; \ 2297 intel_sdvo_connector->name = \ 2298 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \ 2299 if (!intel_sdvo_connector->name) return false; \ 2300 drm_object_attach_property(&connector->base, \ 2301 intel_sdvo_connector->name, \ 2302 intel_sdvo_connector->cur_##name); \ 2303 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \ 2304 data_value[0], data_value[1], response); \ 2305 } \ 2306 } while (0) 2307 2308 static bool 2309 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo, 2310 struct intel_sdvo_connector *intel_sdvo_connector, 2311 struct intel_sdvo_enhancements_reply enhancements) 2312 { 2313 struct drm_device *dev = intel_sdvo->base.base.dev; 2314 struct drm_connector *connector = &intel_sdvo_connector->base.base; 2315 uint16_t response, data_value[2]; 2316 2317 /* when horizontal overscan is supported, Add the left/right property */ 2318 if (enhancements.overscan_h) { 2319 if (!intel_sdvo_get_value(intel_sdvo, 2320 SDVO_CMD_GET_MAX_OVERSCAN_H, 2321 &data_value, 4)) 2322 return false; 2323 2324 if (!intel_sdvo_get_value(intel_sdvo, 2325 SDVO_CMD_GET_OVERSCAN_H, 2326 &response, 2)) 2327 return false; 2328 2329 intel_sdvo_connector->max_hscan = data_value[0]; 2330 intel_sdvo_connector->left_margin = data_value[0] - response; 2331 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin; 2332 intel_sdvo_connector->left = 2333 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]); 2334 if (!intel_sdvo_connector->left) 2335 return false; 2336 2337 drm_object_attach_property(&connector->base, 2338 intel_sdvo_connector->left, 2339 intel_sdvo_connector->left_margin); 2340 2341 intel_sdvo_connector->right = 2342 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]); 2343 if (!intel_sdvo_connector->right) 2344 return false; 2345 2346 drm_object_attach_property(&connector->base, 2347 intel_sdvo_connector->right, 2348 intel_sdvo_connector->right_margin); 2349 DRM_DEBUG_KMS("h_overscan: max %d, " 2350 "default %d, current %d\n", 2351 data_value[0], data_value[1], response); 2352 } 2353 2354 if (enhancements.overscan_v) { 2355 if (!intel_sdvo_get_value(intel_sdvo, 2356 SDVO_CMD_GET_MAX_OVERSCAN_V, 2357 &data_value, 4)) 2358 return false; 2359 2360 if (!intel_sdvo_get_value(intel_sdvo, 2361 SDVO_CMD_GET_OVERSCAN_V, 2362 &response, 2)) 2363 return false; 2364 2365 intel_sdvo_connector->max_vscan = data_value[0]; 2366 intel_sdvo_connector->top_margin = data_value[0] - response; 2367 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin; 2368 intel_sdvo_connector->top = 2369 drm_property_create_range(dev, 0, 2370 "top_margin", 0, data_value[0]); 2371 if (!intel_sdvo_connector->top) 2372 return false; 2373 2374 drm_object_attach_property(&connector->base, 2375 intel_sdvo_connector->top, 2376 intel_sdvo_connector->top_margin); 2377 2378 intel_sdvo_connector->bottom = 2379 drm_property_create_range(dev, 0, 2380 "bottom_margin", 0, data_value[0]); 2381 if (!intel_sdvo_connector->bottom) 2382 return false; 2383 2384 drm_object_attach_property(&connector->base, 2385 intel_sdvo_connector->bottom, 2386 intel_sdvo_connector->bottom_margin); 2387 DRM_DEBUG_KMS("v_overscan: max %d, " 2388 "default %d, current %d\n", 2389 data_value[0], data_value[1], response); 2390 } 2391 2392 ENHANCEMENT(hpos, HPOS); 2393 ENHANCEMENT(vpos, VPOS); 2394 ENHANCEMENT(saturation, SATURATION); 2395 ENHANCEMENT(contrast, CONTRAST); 2396 ENHANCEMENT(hue, HUE); 2397 ENHANCEMENT(sharpness, SHARPNESS); 2398 ENHANCEMENT(brightness, BRIGHTNESS); 2399 ENHANCEMENT(flicker_filter, FLICKER_FILTER); 2400 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE); 2401 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D); 2402 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER); 2403 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER); 2404 2405 if (enhancements.dot_crawl) { 2406 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2)) 2407 return false; 2408 2409 intel_sdvo_connector->max_dot_crawl = 1; 2410 intel_sdvo_connector->cur_dot_crawl = response & 0x1; 2411 intel_sdvo_connector->dot_crawl = 2412 drm_property_create_range(dev, 0, "dot_crawl", 0, 1); 2413 if (!intel_sdvo_connector->dot_crawl) 2414 return false; 2415 2416 drm_object_attach_property(&connector->base, 2417 intel_sdvo_connector->dot_crawl, 2418 intel_sdvo_connector->cur_dot_crawl); 2419 DRM_DEBUG_KMS("dot crawl: current %d\n", response); 2420 } 2421 2422 return true; 2423 } 2424 2425 static bool 2426 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo, 2427 struct intel_sdvo_connector *intel_sdvo_connector, 2428 struct intel_sdvo_enhancements_reply enhancements) 2429 { 2430 struct drm_device *dev = intel_sdvo->base.base.dev; 2431 struct drm_connector *connector = &intel_sdvo_connector->base.base; 2432 uint16_t response, data_value[2]; 2433 2434 ENHANCEMENT(brightness, BRIGHTNESS); 2435 2436 return true; 2437 } 2438 #undef ENHANCEMENT 2439 2440 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo, 2441 struct intel_sdvo_connector *intel_sdvo_connector) 2442 { 2443 union { 2444 struct intel_sdvo_enhancements_reply reply; 2445 uint16_t response; 2446 } enhancements; 2447 2448 CTASSERT(sizeof(enhancements) == 2); 2449 2450 enhancements.response = 0; 2451 intel_sdvo_get_value(intel_sdvo, 2452 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS, 2453 &enhancements, sizeof(enhancements)); 2454 if (enhancements.response == 0) { 2455 DRM_DEBUG_KMS("No enhancement is supported\n"); 2456 return true; 2457 } 2458 2459 if (IS_TV(intel_sdvo_connector)) 2460 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply); 2461 else if (IS_LVDS(intel_sdvo_connector)) 2462 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply); 2463 else 2464 return true; 2465 } 2466 2467 struct intel_sdvo_ddc_proxy_sc { 2468 struct intel_sdvo *intel_sdvo; 2469 device_t port; 2470 }; 2471 2472 static int 2473 intel_sdvo_ddc_proxy_probe(device_t idev) 2474 { 2475 2476 return (BUS_PROBE_DEFAULT); 2477 } 2478 2479 static int 2480 intel_sdvo_ddc_proxy_attach(device_t idev) 2481 { 2482 struct intel_sdvo_ddc_proxy_sc *sc; 2483 2484 sc = device_get_softc(idev); 2485 sc->port = device_add_child(idev, "iicbus", -1); 2486 if (sc->port == NULL) 2487 return (ENXIO); 2488 device_quiet(sc->port); 2489 bus_generic_attach(idev); 2490 return (0); 2491 } 2492 2493 static int 2494 intel_sdvo_ddc_proxy_detach(device_t idev) 2495 { 2496 struct intel_sdvo_ddc_proxy_sc *sc; 2497 device_t port; 2498 2499 sc = device_get_softc(idev); 2500 port = sc->port; 2501 bus_generic_detach(idev); 2502 if (port != NULL) 2503 device_delete_child(idev, port); 2504 return (0); 2505 } 2506 2507 static int 2508 intel_sdvo_ddc_proxy_reset(device_t idev, u_char speed, u_char addr, 2509 u_char *oldaddr) 2510 { 2511 struct intel_sdvo_ddc_proxy_sc *sc; 2512 struct intel_sdvo *sdvo; 2513 2514 sc = device_get_softc(idev); 2515 sdvo = sc->intel_sdvo; 2516 2517 return (IICBUS_RESET(device_get_parent(sdvo->i2c), speed, addr, 2518 oldaddr)); 2519 } 2520 2521 static int 2522 intel_sdvo_ddc_proxy_transfer(device_t idev, struct iic_msg *msgs, uint32_t num) 2523 { 2524 struct intel_sdvo_ddc_proxy_sc *sc; 2525 struct intel_sdvo *sdvo; 2526 2527 sc = device_get_softc(idev); 2528 sdvo = sc->intel_sdvo; 2529 2530 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus)) 2531 return (EIO); 2532 2533 return (iicbus_transfer(sdvo->i2c, msgs, num)); 2534 } 2535 2536 static bool 2537 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo, struct drm_device *dev, 2538 int sdvo_reg) 2539 { 2540 struct intel_sdvo_ddc_proxy_sc *sc; 2541 int ret; 2542 2543 sdvo->ddc_iic_bus = device_add_child(dev->dev, 2544 "intel_sdvo_ddc_proxy", sdvo_reg); 2545 if (sdvo->ddc_iic_bus == NULL) { 2546 DRM_ERROR("cannot create ddc proxy bus %d\n", sdvo_reg); 2547 return (false); 2548 } 2549 device_quiet(sdvo->ddc_iic_bus); 2550 ret = device_probe_and_attach(sdvo->ddc_iic_bus); 2551 if (ret != 0) { 2552 DRM_ERROR("cannot attach proxy bus %d error %d\n", 2553 sdvo_reg, ret); 2554 device_delete_child(dev->dev, sdvo->ddc_iic_bus); 2555 return (false); 2556 } 2557 sc = device_get_softc(sdvo->ddc_iic_bus); 2558 sc->intel_sdvo = sdvo; 2559 2560 sdvo->ddc = sc->port; 2561 return (true); 2562 } 2563 2564 static device_method_t intel_sdvo_ddc_proxy_methods[] = { 2565 DEVMETHOD(device_probe, intel_sdvo_ddc_proxy_probe), 2566 DEVMETHOD(device_attach, intel_sdvo_ddc_proxy_attach), 2567 DEVMETHOD(device_detach, intel_sdvo_ddc_proxy_detach), 2568 DEVMETHOD(iicbus_reset, intel_sdvo_ddc_proxy_reset), 2569 DEVMETHOD(iicbus_transfer, intel_sdvo_ddc_proxy_transfer), 2570 DEVMETHOD_END 2571 }; 2572 static driver_t intel_sdvo_ddc_proxy_driver = { 2573 "intel_sdvo_ddc_proxy", 2574 intel_sdvo_ddc_proxy_methods, 2575 sizeof(struct intel_sdvo_ddc_proxy_sc) 2576 }; 2577 static devclass_t intel_sdvo_devclass; 2578 DRIVER_MODULE_ORDERED(intel_sdvo_ddc_proxy, drm, intel_sdvo_ddc_proxy_driver, 2579 intel_sdvo_devclass, 0, 0, SI_ORDER_FIRST); 2580 2581 2582 bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg) 2583 { 2584 struct drm_i915_private *dev_priv = dev->dev_private; 2585 struct intel_encoder *intel_encoder; 2586 struct intel_sdvo *intel_sdvo; 2587 int i; 2588 2589 intel_sdvo = kmalloc(sizeof(struct intel_sdvo), DRM_MEM_KMS, 2590 M_WAITOK | M_ZERO); 2591 2592 intel_sdvo->sdvo_reg = sdvo_reg; 2593 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1; 2594 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg); 2595 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev, sdvo_reg)) { 2596 drm_free(intel_sdvo, DRM_MEM_KMS); 2597 return false; 2598 } 2599 2600 /* encoder type will be decided later */ 2601 intel_encoder = &intel_sdvo->base; 2602 intel_encoder->type = INTEL_OUTPUT_SDVO; 2603 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0); 2604 2605 /* Read the regs to test if we can talk to the device */ 2606 for (i = 0; i < 0x40; i++) { 2607 u8 byte; 2608 2609 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) { 2610 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n", 2611 IS_SDVOB(sdvo_reg) ? 'B' : 'C'); 2612 goto err; 2613 } 2614 } 2615 2616 if (IS_SDVOB(sdvo_reg)) 2617 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS_I915; 2618 else 2619 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS_I915; 2620 2621 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs); 2622 2623 /* In default case sdvo lvds is false */ 2624 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps)) 2625 goto err; 2626 2627 /* Set up hotplug command - note paranoia about contents of reply. 2628 * We assume that the hardware is in a sane state, and only touch 2629 * the bits we think we understand. 2630 */ 2631 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, 2632 &intel_sdvo->hotplug_active, 2); 2633 intel_sdvo->hotplug_active[0] &= ~0x3; 2634 2635 if (!intel_sdvo_output_setup(intel_sdvo, 2636 intel_sdvo->caps.output_flags)) { 2637 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n", 2638 IS_SDVOB(sdvo_reg) ? 'B' : 'C'); 2639 goto err; 2640 } 2641 2642 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg); 2643 2644 /* Set the input timing to the screen. Assume always input 0. */ 2645 if (!intel_sdvo_set_target_input(intel_sdvo)) 2646 goto err; 2647 2648 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo, 2649 &intel_sdvo->pixel_clock_min, 2650 &intel_sdvo->pixel_clock_max)) 2651 goto err; 2652 2653 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, " 2654 "clock range %dMHz - %dMHz, " 2655 "input 1: %c, input 2: %c, " 2656 "output 1: %c, output 2: %c\n", 2657 SDVO_NAME(intel_sdvo), 2658 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id, 2659 intel_sdvo->caps.device_rev_id, 2660 intel_sdvo->pixel_clock_min / 1000, 2661 intel_sdvo->pixel_clock_max / 1000, 2662 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N', 2663 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N', 2664 /* check currently supported outputs */ 2665 intel_sdvo->caps.output_flags & 2666 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N', 2667 intel_sdvo->caps.output_flags & 2668 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N'); 2669 return true; 2670 2671 err: 2672 drm_encoder_cleanup(&intel_encoder->base); 2673 drm_free(intel_sdvo, DRM_MEM_KMS); 2674 2675 return false; 2676 } 2677