1 /* 2 * Copyright © 2016 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 * 23 */ 24 25 #include "intel_uc.h" 26 #include "i915_drv.h" 27 #include "i915_guc_submission.h" 28 29 /* Reset GuC providing us with fresh state for both GuC and HuC. 30 */ 31 static int __intel_uc_reset_hw(struct drm_i915_private *dev_priv) 32 { 33 int ret; 34 u32 guc_status; 35 36 ret = intel_guc_reset(dev_priv); 37 if (ret) { 38 DRM_ERROR("GuC reset failed, ret = %d\n", ret); 39 return ret; 40 } 41 42 guc_status = I915_READ(GUC_STATUS); 43 WARN(!(guc_status & GS_MIA_IN_RESET), 44 "GuC status: 0x%x, MIA core expected to be in reset\n", 45 guc_status); 46 47 return ret; 48 } 49 50 void intel_uc_sanitize_options(struct drm_i915_private *dev_priv) 51 { 52 if (!HAS_GUC(dev_priv)) { 53 if (i915_modparams.enable_guc_loading > 0 || 54 i915_modparams.enable_guc_submission > 0) 55 DRM_INFO("Ignoring GuC options, no hardware\n"); 56 57 i915_modparams.enable_guc_loading = 0; 58 i915_modparams.enable_guc_submission = 0; 59 return; 60 } 61 62 /* A negative value means "use platform default" */ 63 if (i915_modparams.enable_guc_loading < 0) 64 i915_modparams.enable_guc_loading = HAS_GUC_UCODE(dev_priv); 65 66 /* Verify firmware version */ 67 if (i915_modparams.enable_guc_loading) { 68 if (HAS_HUC_UCODE(dev_priv)) 69 intel_huc_select_fw(&dev_priv->huc); 70 71 if (intel_guc_fw_select(&dev_priv->guc)) 72 i915_modparams.enable_guc_loading = 0; 73 } 74 75 /* Can't enable guc submission without guc loaded */ 76 if (!i915_modparams.enable_guc_loading) 77 i915_modparams.enable_guc_submission = 0; 78 79 /* A negative value means "use platform default" */ 80 if (i915_modparams.enable_guc_submission < 0) 81 i915_modparams.enable_guc_submission = HAS_GUC_SCHED(dev_priv); 82 } 83 84 void intel_uc_init_early(struct drm_i915_private *dev_priv) 85 { 86 intel_guc_init_early(&dev_priv->guc); 87 } 88 89 void intel_uc_init_fw(struct drm_i915_private *dev_priv) 90 { 91 intel_uc_fw_fetch(dev_priv, &dev_priv->huc.fw); 92 intel_uc_fw_fetch(dev_priv, &dev_priv->guc.fw); 93 } 94 95 void intel_uc_fini_fw(struct drm_i915_private *dev_priv) 96 { 97 intel_uc_fw_fini(&dev_priv->guc.fw); 98 intel_uc_fw_fini(&dev_priv->huc.fw); 99 } 100 101 /** 102 * intel_uc_init_mmio - setup uC MMIO access 103 * 104 * @dev_priv: device private 105 * 106 * Setup minimal state necessary for MMIO accesses later in the 107 * initialization sequence. 108 */ 109 void intel_uc_init_mmio(struct drm_i915_private *dev_priv) 110 { 111 intel_guc_init_send_regs(&dev_priv->guc); 112 } 113 114 static void guc_capture_load_err_log(struct intel_guc *guc) 115 { 116 if (!guc->log.vma || i915_modparams.guc_log_level < 0) 117 return; 118 119 if (!guc->load_err_log) 120 guc->load_err_log = i915_gem_object_get(guc->log.vma->obj); 121 122 return; 123 } 124 125 static void guc_free_load_err_log(struct intel_guc *guc) 126 { 127 if (guc->load_err_log) 128 i915_gem_object_put(guc->load_err_log); 129 } 130 131 static int guc_enable_communication(struct intel_guc *guc) 132 { 133 struct drm_i915_private *dev_priv = guc_to_i915(guc); 134 135 if (HAS_GUC_CT(dev_priv)) 136 return intel_guc_enable_ct(guc); 137 138 guc->send = intel_guc_send_mmio; 139 return 0; 140 } 141 142 static void guc_disable_communication(struct intel_guc *guc) 143 { 144 struct drm_i915_private *dev_priv = guc_to_i915(guc); 145 146 if (HAS_GUC_CT(dev_priv)) 147 intel_guc_disable_ct(guc); 148 149 guc->send = intel_guc_send_nop; 150 } 151 152 int intel_uc_init_hw(struct drm_i915_private *dev_priv) 153 { 154 struct intel_guc *guc = &dev_priv->guc; 155 int ret, attempts; 156 157 if (!i915_modparams.enable_guc_loading) 158 return 0; 159 160 guc_disable_communication(guc); 161 gen9_reset_guc_interrupts(dev_priv); 162 163 /* We need to notify the guc whenever we change the GGTT */ 164 i915_ggtt_enable_guc(dev_priv); 165 166 if (i915_modparams.enable_guc_submission) { 167 /* 168 * This is stuff we need to have available at fw load time 169 * if we are planning to enable submission later 170 */ 171 ret = i915_guc_submission_init(dev_priv); 172 if (ret) 173 goto err_guc; 174 } 175 176 /* init WOPCM */ 177 I915_WRITE(GUC_WOPCM_SIZE, intel_guc_wopcm_size(dev_priv)); 178 I915_WRITE(DMA_GUC_WOPCM_OFFSET, 179 GUC_WOPCM_OFFSET_VALUE | HUC_LOADING_AGENT_GUC); 180 181 /* WaEnableuKernelHeaderValidFix:skl */ 182 /* WaEnableGuCBootHashCheckNotSet:skl,bxt,kbl */ 183 if (IS_GEN9(dev_priv)) 184 attempts = 3; 185 else 186 attempts = 1; 187 188 while (attempts--) { 189 /* 190 * Always reset the GuC just before (re)loading, so 191 * that the state and timing are fairly predictable 192 */ 193 ret = __intel_uc_reset_hw(dev_priv); 194 if (ret) 195 goto err_submission; 196 197 intel_huc_init_hw(&dev_priv->huc); 198 intel_guc_init_params(guc); 199 ret = intel_guc_fw_upload(guc); 200 if (ret == 0 || ret != -EAGAIN) 201 break; 202 203 DRM_DEBUG_DRIVER("GuC fw load failed: %d; will reset and " 204 "retry %d more time(s)\n", ret, attempts); 205 } 206 207 /* Did we succeded or run out of retries? */ 208 if (ret) 209 goto err_log_capture; 210 211 ret = guc_enable_communication(guc); 212 if (ret) 213 goto err_log_capture; 214 215 intel_huc_auth(&dev_priv->huc); 216 if (i915_modparams.enable_guc_submission) { 217 if (i915_modparams.guc_log_level >= 0) 218 gen9_enable_guc_interrupts(dev_priv); 219 220 ret = i915_guc_submission_enable(dev_priv); 221 if (ret) 222 goto err_interrupts; 223 } 224 225 dev_info(dev_priv->drm.dev, "GuC %s (firmware %s [version %u.%u])\n", 226 i915_modparams.enable_guc_submission ? "submission enabled" : 227 "loaded", 228 guc->fw.path, 229 guc->fw.major_ver_found, guc->fw.minor_ver_found); 230 231 return 0; 232 233 /* 234 * We've failed to load the firmware :( 235 * 236 * Decide whether to disable GuC submission and fall back to 237 * execlist mode, and whether to hide the error by returning 238 * zero or to return -EIO, which the caller will treat as a 239 * nonfatal error (i.e. it doesn't prevent driver load, but 240 * marks the GPU as wedged until reset). 241 */ 242 err_interrupts: 243 guc_disable_communication(guc); 244 gen9_disable_guc_interrupts(dev_priv); 245 err_log_capture: 246 guc_capture_load_err_log(guc); 247 err_submission: 248 if (i915_modparams.enable_guc_submission) 249 i915_guc_submission_fini(dev_priv); 250 err_guc: 251 i915_ggtt_disable_guc(dev_priv); 252 253 if (i915_modparams.enable_guc_loading > 1 || 254 i915_modparams.enable_guc_submission > 1) { 255 DRM_ERROR("GuC init failed. Firmware loading disabled.\n"); 256 ret = -EIO; 257 } else { 258 DRM_NOTE("GuC init failed. Firmware loading disabled.\n"); 259 ret = 0; 260 } 261 262 if (i915_modparams.enable_guc_submission) { 263 i915_modparams.enable_guc_submission = 0; 264 DRM_NOTE("Falling back from GuC submission to execlist mode\n"); 265 } 266 267 i915_modparams.enable_guc_loading = 0; 268 269 return ret; 270 } 271 272 void intel_uc_fini_hw(struct drm_i915_private *dev_priv) 273 { 274 guc_free_load_err_log(&dev_priv->guc); 275 276 if (!i915_modparams.enable_guc_loading) 277 return; 278 279 if (i915_modparams.enable_guc_submission) 280 i915_guc_submission_disable(dev_priv); 281 282 guc_disable_communication(&dev_priv->guc); 283 284 if (i915_modparams.enable_guc_submission) { 285 gen9_disable_guc_interrupts(dev_priv); 286 i915_guc_submission_fini(dev_priv); 287 } 288 289 i915_ggtt_disable_guc(dev_priv); 290 } 291