1 /* 2 * Copyright (c) 2014-2016 François Tigeot 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice unmodified, this list of conditions, and the following 10 * disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #ifndef _ASM_IO_H_ 28 #define _ASM_IO_H_ 29 30 #include <machine/pmap.h> 31 #include <vm/pmap.h> 32 #include <vm/vm.h> 33 34 #include <linux/types.h> 35 #include <asm/page.h> 36 37 #undef writeb 38 static inline void 39 writeb(u8 value, volatile void __iomem *addr) 40 { 41 *(volatile uint8_t *)addr = value; 42 } 43 44 #undef writew 45 static inline void 46 writew(u16 value, volatile void __iomem *addr) 47 { 48 *(volatile uint16_t *)addr = value; 49 } 50 51 #undef writel 52 static inline void 53 writel(u32 value, volatile void __iomem *addr) 54 { 55 *(volatile uint32_t *)addr = value; 56 } 57 58 #undef writeq 59 static inline void 60 writeq(u64 value, volatile void __iomem *addr) 61 { 62 *(volatile uint64_t *)addr = value; 63 } 64 65 #define ioread8(addr) *(volatile uint8_t *)((char *)addr) 66 #define ioread16(addr) *(volatile uint16_t *)((char *)addr) 67 #define ioread32(addr) *(volatile uint32_t *)((char *)addr) 68 69 #define iowrite8(data, addr) \ 70 do { \ 71 *(volatile uint8_t *)((char *)addr) = data; \ 72 } while (0) 73 74 #define iowrite16(data, addr) \ 75 do { \ 76 *(volatile uint16_t *)((char *)addr) = data; \ 77 } while (0) 78 79 #define iowrite32(data, addr) \ 80 do { \ 81 *(volatile uint32_t *)((char *)addr) = data; \ 82 } while (0) 83 84 #include <linux/vmalloc.h> 85 86 /* ioremap function family: map bus addresses into CPU space */ 87 88 struct iomap { 89 vm_paddr_t paddr; 90 int npages; 91 void *pmap_addr; 92 SLIST_ENTRY(iomap) im_iomaps; 93 }; 94 95 void __iomem * 96 __ioremap_common(unsigned long phys_addr, unsigned long size, int cache_mode); 97 98 static inline void __iomem * 99 ioremap_nocache(resource_size_t phys_addr, unsigned long size) 100 { 101 return __ioremap_common(phys_addr, size, PAT_UNCACHEABLE); 102 } 103 104 static inline void __iomem * 105 ioremap(resource_size_t offset, unsigned long size) 106 { 107 return ioremap_nocache(offset, size); 108 } 109 110 static inline void __iomem * 111 ioremap_wc(resource_size_t phys_addr, unsigned long size) 112 { 113 return __ioremap_common(phys_addr, size, PAT_WRITE_COMBINING); 114 } 115 116 static inline void __iomem * 117 ioremap_wt(resource_size_t phys_addr, unsigned long size) 118 { 119 return __ioremap_common(phys_addr, size, PAT_WRITE_THROUGH); 120 } 121 122 void iounmap(void __iomem *ptr); 123 124 /* XXX these should have volatile */ 125 #define memset_io(a, b, c) memset((a), (b), (c)) 126 #define memcpy_fromio(a, b, c) memcpy((a), (b), (c)) 127 #define memcpy_toio(a, b, c) memcpy((a), (b), (c)) 128 129 #define mmiowb cpu_sfence 130 131 #endif /* _ASM_IO_H_ */ 132