1 /* 2 * Copyright (c) 2014-2020 François Tigeot <ftigeot@wolfpond.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice unmodified, this list of conditions, and the following 10 * disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #ifndef _ASM_IO_H_ 28 #define _ASM_IO_H_ 29 30 #include <machine/pmap.h> 31 #include <vm/pmap.h> 32 #include <vm/vm.h> 33 34 #include <asm/page.h> 35 #include <linux/string.h> 36 #include <linux/types.h> 37 38 #undef readb 39 static inline u8 40 readb(const volatile void __iomem *addr) 41 { 42 return *(const volatile u8*)addr; 43 } 44 45 #undef readw 46 static inline u16 47 readw(const volatile void __iomem *addr) 48 { 49 return *(const volatile u16*)addr; 50 } 51 52 #undef readl 53 static inline u32 54 readl(const volatile void __iomem *addr) 55 { 56 return *(const volatile u32*)addr; 57 } 58 59 #undef writeb 60 static inline void 61 writeb(u8 value, volatile void __iomem *addr) 62 { 63 *(volatile uint8_t *)addr = value; 64 } 65 66 #undef writew 67 static inline void 68 writew(u16 value, volatile void __iomem *addr) 69 { 70 *(volatile uint16_t *)addr = value; 71 } 72 73 #undef writel 74 static inline void 75 writel(u32 value, volatile void __iomem *addr) 76 { 77 *(volatile uint32_t *)addr = value; 78 } 79 80 #define writel_relaxed(v, a) writel(v, a) 81 82 #undef writeq 83 static inline void 84 writeq(u64 value, volatile void __iomem *addr) 85 { 86 *(volatile uint64_t *)addr = value; 87 } 88 89 #define ioread8(addr) *(volatile uint8_t *)((char *)addr) 90 #define ioread16(addr) *(volatile uint16_t *)((char *)addr) 91 #define ioread32(addr) *(volatile uint32_t *)((char *)addr) 92 93 #define iowrite8(data, addr) \ 94 do { \ 95 *(volatile uint8_t *)((char *)addr) = data; \ 96 } while (0) 97 98 #define iowrite16(data, addr) \ 99 do { \ 100 *(volatile uint16_t *)((char *)addr) = data; \ 101 } while (0) 102 103 #define iowrite32(data, addr) \ 104 do { \ 105 *(volatile uint32_t *)((char *)addr) = data; \ 106 } while (0) 107 108 #include <linux/vmalloc.h> 109 110 /* ioremap function family: map bus addresses into CPU space */ 111 112 struct iomap { 113 vm_paddr_t paddr; 114 int npages; 115 void *pmap_addr; 116 SLIST_ENTRY(iomap) im_iomaps; 117 }; 118 119 void __iomem * 120 __ioremap_common(unsigned long phys_addr, unsigned long size, int cache_mode); 121 122 static inline void __iomem * 123 ioremap_nocache(resource_size_t phys_addr, unsigned long size) 124 { 125 return __ioremap_common(phys_addr, size, PAT_UNCACHEABLE); 126 } 127 128 static inline void __iomem * 129 ioremap(resource_size_t offset, unsigned long size) 130 { 131 return ioremap_nocache(offset, size); 132 } 133 134 static inline void __iomem * 135 ioremap_wc(resource_size_t phys_addr, unsigned long size) 136 { 137 return __ioremap_common(phys_addr, size, PAT_WRITE_COMBINING); 138 } 139 140 static inline void __iomem * 141 ioremap_wt(resource_size_t phys_addr, unsigned long size) 142 { 143 return __ioremap_common(phys_addr, size, PAT_WRITE_THROUGH); 144 } 145 146 void iounmap(void __iomem *ptr); 147 148 /* XXX these should have volatile */ 149 #define memset_io(a, b, c) memset((a), (b), (c)) 150 #define memcpy_fromio(a, b, c) memcpy((a), (b), (c)) 151 #define memcpy_toio(a, b, c) memcpy((a), (b), (c)) 152 153 #define mmiowb cpu_sfence 154 155 int arch_io_reserve_memtype_wc(resource_size_t start, resource_size_t size); 156 157 static inline void 158 arch_io_free_memtype_wc(resource_size_t start, resource_size_t size) 159 { 160 } 161 162 #undef outb 163 static inline void 164 outb(u8 value, u_int port) 165 { 166 outbv(port, value); 167 } 168 169 #endif /* _ASM_IO_H_ */ 170