1 /*
2  * Copyright © 2016 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  */
22 
23 #ifndef DRM_DP_DUAL_MODE_HELPER_H
24 #define DRM_DP_DUAL_MODE_HELPER_H
25 
26 #include <linux/types.h>
27 
28 /*
29  * Optional for type 1 DVI adaptors
30  * Mandatory for type 1 HDMI and type 2 adaptors
31  */
32 #define DP_DUAL_MODE_HDMI_ID 0x00 /* 00-0f */
33 #define  DP_DUAL_MODE_HDMI_ID_LEN 16
34 /*
35  * Optional for type 1 adaptors
36  * Mandatory for type 2 adaptors
37  */
38 #define DP_DUAL_MODE_ADAPTOR_ID 0x10
39 #define  DP_DUAL_MODE_REV_MASK 0x07
40 #define  DP_DUAL_MODE_REV_TYPE2 0x00
41 #define  DP_DUAL_MODE_TYPE_MASK 0xf0
42 #define  DP_DUAL_MODE_TYPE_TYPE2 0xa0
43 /* This field is marked reserved in dual mode spec, used in LSPCON */
44 #define  DP_DUAL_MODE_TYPE_HAS_DPCD 0x08
45 #define DP_DUAL_MODE_IEEE_OUI 0x11 /* 11-13*/
46 #define  DP_DUAL_IEEE_OUI_LEN 3
47 #define DP_DUAL_DEVICE_ID 0x14 /* 14-19 */
48 #define  DP_DUAL_DEVICE_ID_LEN 6
49 #define DP_DUAL_MODE_HARDWARE_REV 0x1a
50 #define DP_DUAL_MODE_FIRMWARE_MAJOR_REV 0x1b
51 #define DP_DUAL_MODE_FIRMWARE_MINOR_REV 0x1c
52 #define DP_DUAL_MODE_MAX_TMDS_CLOCK 0x1d
53 #define DP_DUAL_MODE_I2C_SPEED_CAP 0x1e
54 #define DP_DUAL_MODE_TMDS_OEN 0x20
55 #define  DP_DUAL_MODE_TMDS_DISABLE 0x01
56 #define DP_DUAL_MODE_HDMI_PIN_CTRL 0x21
57 #define  DP_DUAL_MODE_CEC_ENABLE 0x01
58 #define DP_DUAL_MODE_I2C_SPEED_CTRL 0x22
59 
60 /* LSPCON specific registers, defined by MCA */
61 #define DP_DUAL_MODE_LSPCON_MODE_CHANGE		0x40
62 #define DP_DUAL_MODE_LSPCON_CURRENT_MODE		0x41
63 #define  DP_DUAL_MODE_LSPCON_MODE_PCON			0x1
64 
65 struct i2c_adapter;
66 
67 ssize_t drm_dp_dual_mode_read(struct i2c_adapter *adapter,
68 			      u8 offset, void *buffer, size_t size);
69 ssize_t drm_dp_dual_mode_write(struct i2c_adapter *adapter,
70 			       u8 offset, const void *buffer, size_t size);
71 
72 /**
73  * enum drm_lspcon_mode
74  * @DRM_LSPCON_MODE_INVALID: No LSPCON.
75  * @DRM_LSPCON_MODE_LS: Level shifter mode of LSPCON
76  *	which drives DP++ to HDMI 1.4 conversion.
77  * @DRM_LSPCON_MODE_PCON: Protocol converter mode of LSPCON
78  *	which drives DP++ to HDMI 2.0 active conversion.
79  */
80 enum drm_lspcon_mode {
81 	DRM_LSPCON_MODE_INVALID,
82 	DRM_LSPCON_MODE_LS,
83 	DRM_LSPCON_MODE_PCON,
84 };
85 
86 /**
87  * enum drm_dp_dual_mode_type - Type of the DP dual mode adaptor
88  * @DRM_DP_DUAL_MODE_NONE: No DP dual mode adaptor
89  * @DRM_DP_DUAL_MODE_UNKNOWN: Could be either none or type 1 DVI adaptor
90  * @DRM_DP_DUAL_MODE_TYPE1_DVI: Type 1 DVI adaptor
91  * @DRM_DP_DUAL_MODE_TYPE1_HDMI: Type 1 HDMI adaptor
92  * @DRM_DP_DUAL_MODE_TYPE2_DVI: Type 2 DVI adaptor
93  * @DRM_DP_DUAL_MODE_TYPE2_HDMI: Type 2 HDMI adaptor
94  * @DRM_DP_DUAL_MODE_LSPCON: Level shifter / protocol converter
95  */
96 enum drm_dp_dual_mode_type {
97 	DRM_DP_DUAL_MODE_NONE,
98 	DRM_DP_DUAL_MODE_UNKNOWN,
99 	DRM_DP_DUAL_MODE_TYPE1_DVI,
100 	DRM_DP_DUAL_MODE_TYPE1_HDMI,
101 	DRM_DP_DUAL_MODE_TYPE2_DVI,
102 	DRM_DP_DUAL_MODE_TYPE2_HDMI,
103 	DRM_DP_DUAL_MODE_LSPCON,
104 };
105 
106 enum drm_dp_dual_mode_type drm_dp_dual_mode_detect(struct i2c_adapter *adapter);
107 int drm_dp_dual_mode_max_tmds_clock(enum drm_dp_dual_mode_type type,
108 				    struct i2c_adapter *adapter);
109 int drm_dp_dual_mode_get_tmds_output(enum drm_dp_dual_mode_type type,
110 				     struct i2c_adapter *adapter, bool *enabled);
111 int drm_dp_dual_mode_set_tmds_output(enum drm_dp_dual_mode_type type,
112 				     struct i2c_adapter *adapter, bool enable);
113 const char *drm_dp_get_dual_mode_type_name(enum drm_dp_dual_mode_type type);
114 
115 int drm_lspcon_get_mode(struct i2c_adapter *adapter,
116 			enum drm_lspcon_mode *current_mode);
117 int drm_lspcon_set_mode(struct i2c_adapter *adapter,
118 			enum drm_lspcon_mode reqd_mode);
119 #endif
120