1 /* 2 * Copyright 2015 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24 #ifndef _DRM_GPU_SCHEDULER_H_ 25 #define _DRM_GPU_SCHEDULER_H_ 26 27 #include <drm/spsc_queue.h> 28 #include <linux/dma-fence.h> 29 30 #define MAX_WAIT_SCHED_ENTITY_Q_EMPTY msecs_to_jiffies(1000) 31 32 struct drm_gpu_scheduler; 33 struct drm_sched_rq; 34 35 enum drm_sched_priority { 36 DRM_SCHED_PRIORITY_MIN, 37 DRM_SCHED_PRIORITY_LOW = DRM_SCHED_PRIORITY_MIN, 38 DRM_SCHED_PRIORITY_NORMAL, 39 DRM_SCHED_PRIORITY_HIGH_SW, 40 DRM_SCHED_PRIORITY_HIGH_HW, 41 DRM_SCHED_PRIORITY_KERNEL, 42 DRM_SCHED_PRIORITY_MAX, 43 DRM_SCHED_PRIORITY_INVALID = -1, 44 DRM_SCHED_PRIORITY_UNSET = -2 45 }; 46 47 /** 48 * struct drm_sched_entity - A wrapper around a job queue (typically 49 * attached to the DRM file_priv). 50 * 51 * @list: used to append this struct to the list of entities in the 52 * runqueue. 53 * @rq: runqueue to which this entity belongs. 54 * @rq_lock: lock to modify the runqueue to which this entity belongs. 55 * @job_queue: the list of jobs of this entity. 56 * @fence_seq: a linearly increasing seqno incremented with each 57 * new &drm_sched_fence which is part of the entity. 58 * @fence_context: a unique context for all the fences which belong 59 * to this entity. 60 * The &drm_sched_fence.scheduled uses the 61 * fence_context but &drm_sched_fence.finished uses 62 * fence_context + 1. 63 * @dependency: the dependency fence of the job which is on the top 64 * of the job queue. 65 * @cb: callback for the dependency fence above. 66 * @guilty: points to ctx's guilty. 67 * @fini_status: contains the exit status in case the process was signalled. 68 * @last_scheduled: points to the finished fence of the last scheduled job. 69 * @last_user: last group leader pushing a job into the entity. 70 * 71 * Entities will emit jobs in order to their corresponding hardware 72 * ring, and the scheduler will alternate between entities based on 73 * scheduling policy. 74 */ 75 struct drm_sched_entity { 76 struct list_head list; 77 struct drm_sched_rq *rq; 78 struct spinlock rq_lock; 79 80 struct spsc_queue job_queue; 81 82 atomic_t fence_seq; 83 uint64_t fence_context; 84 85 struct dma_fence *dependency; 86 struct dma_fence_cb cb; 87 atomic_t *guilty; 88 struct dma_fence *last_scheduled; 89 struct task_struct *last_user; 90 }; 91 92 /** 93 * struct drm_sched_rq - queue of entities to be scheduled. 94 * 95 * @lock: to modify the entities list. 96 * @sched: the scheduler to which this rq belongs to. 97 * @entities: list of the entities to be scheduled. 98 * @current_entity: the entity which is to be scheduled. 99 * 100 * Run queue is a set of entities scheduling command submissions for 101 * one specific ring. It implements the scheduling policy that selects 102 * the next entity to emit commands from. 103 */ 104 struct drm_sched_rq { 105 struct spinlock lock; 106 struct drm_gpu_scheduler *sched; 107 struct list_head entities; 108 struct drm_sched_entity *current_entity; 109 }; 110 111 /** 112 * struct drm_sched_fence - fences corresponding to the scheduling of a job. 113 */ 114 struct drm_sched_fence { 115 /** 116 * @scheduled: this fence is what will be signaled by the scheduler 117 * when the job is scheduled. 118 */ 119 struct dma_fence scheduled; 120 121 /** 122 * @finished: this fence is what will be signaled by the scheduler 123 * when the job is completed. 124 * 125 * When setting up an out fence for the job, you should use 126 * this, since it's available immediately upon 127 * drm_sched_job_init(), and the fence returned by the driver 128 * from run_job() won't be created until the dependencies have 129 * resolved. 130 */ 131 struct dma_fence finished; 132 133 /** 134 * @cb: the callback for the parent fence below. 135 */ 136 struct dma_fence_cb cb; 137 /** 138 * @parent: the fence returned by &drm_sched_backend_ops.run_job 139 * when scheduling the job on hardware. We signal the 140 * &drm_sched_fence.finished fence once parent is signalled. 141 */ 142 struct dma_fence *parent; 143 /** 144 * @sched: the scheduler instance to which the job having this struct 145 * belongs to. 146 */ 147 struct drm_gpu_scheduler *sched; 148 /** 149 * @lock: the lock used by the scheduled and the finished fences. 150 */ 151 spinlock_t lock; 152 /** 153 * @owner: job owner for debugging 154 */ 155 void *owner; 156 }; 157 158 struct drm_sched_fence *to_drm_sched_fence(struct dma_fence *f); 159 160 /** 161 * struct drm_sched_job - A job to be run by an entity. 162 * 163 * @queue_node: used to append this struct to the queue of jobs in an entity. 164 * @sched: the scheduler instance on which this job is scheduled. 165 * @s_fence: contains the fences for the scheduling of job. 166 * @finish_cb: the callback for the finished fence. 167 * @finish_work: schedules the function @drm_sched_job_finish once the job has 168 * finished to remove the job from the 169 * @drm_gpu_scheduler.ring_mirror_list. 170 * @node: used to append this struct to the @drm_gpu_scheduler.ring_mirror_list. 171 * @work_tdr: schedules a delayed call to @drm_sched_job_timedout after the timeout 172 * interval is over. 173 * @id: a unique id assigned to each job scheduled on the scheduler. 174 * @karma: increment on every hang caused by this job. If this exceeds the hang 175 * limit of the scheduler then the job is marked guilty and will not 176 * be scheduled further. 177 * @s_priority: the priority of the job. 178 * @entity: the entity to which this job belongs. 179 * 180 * A job is created by the driver using drm_sched_job_init(), and 181 * should call drm_sched_entity_push_job() once it wants the scheduler 182 * to schedule the job. 183 */ 184 struct drm_sched_job { 185 struct spsc_node queue_node; 186 struct drm_gpu_scheduler *sched; 187 struct drm_sched_fence *s_fence; 188 struct dma_fence_cb finish_cb; 189 struct work_struct finish_work; 190 struct list_head node; 191 struct delayed_work work_tdr; 192 uint64_t id; 193 atomic_t karma; 194 enum drm_sched_priority s_priority; 195 struct drm_sched_entity *entity; 196 }; 197 198 static inline bool drm_sched_invalidate_job(struct drm_sched_job *s_job, 199 int threshold) 200 { 201 return (s_job && atomic_inc_return(&s_job->karma) > threshold); 202 } 203 204 /** 205 * struct drm_sched_backend_ops 206 * 207 * Define the backend operations called by the scheduler, 208 * these functions should be implemented in driver side. 209 */ 210 struct drm_sched_backend_ops { 211 /** 212 * @dependency: Called when the scheduler is considering scheduling 213 * this job next, to get another struct dma_fence for this job to 214 * block on. Once it returns NULL, run_job() may be called. 215 */ 216 struct dma_fence *(*dependency)(struct drm_sched_job *sched_job, 217 struct drm_sched_entity *s_entity); 218 219 /** 220 * @run_job: Called to execute the job once all of the dependencies 221 * have been resolved. This may be called multiple times, if 222 * timedout_job() has happened and drm_sched_job_recovery() 223 * decides to try it again. 224 */ 225 struct dma_fence *(*run_job)(struct drm_sched_job *sched_job); 226 227 /** 228 * @timedout_job: Called when a job has taken too long to execute, 229 * to trigger GPU recovery. 230 */ 231 void (*timedout_job)(struct drm_sched_job *sched_job); 232 233 /** 234 * @free_job: Called once the job's finished fence has been signaled 235 * and it's time to clean it up. 236 */ 237 void (*free_job)(struct drm_sched_job *sched_job); 238 }; 239 240 /** 241 * struct drm_gpu_scheduler 242 * 243 * @ops: backend operations provided by the driver. 244 * @hw_submission_limit: the max size of the hardware queue. 245 * @timeout: the time after which a job is removed from the scheduler. 246 * @name: name of the ring for which this scheduler is being used. 247 * @sched_rq: priority wise array of run queues. 248 * @wake_up_worker: the wait queue on which the scheduler sleeps until a job 249 * is ready to be scheduled. 250 * @job_scheduled: once @drm_sched_entity_do_release is called the scheduler 251 * waits on this wait queue until all the scheduled jobs are 252 * finished. 253 * @hw_rq_count: the number of jobs currently in the hardware queue. 254 * @job_id_count: used to assign unique id to the each job. 255 * @thread: the kthread on which the scheduler which run. 256 * @ring_mirror_list: the list of jobs which are currently in the job queue. 257 * @job_list_lock: lock to protect the ring_mirror_list. 258 * @hang_limit: once the hangs by a job crosses this limit then it is marked 259 * guilty and it will be considered for scheduling further. 260 * 261 * One scheduler is implemented for each hardware ring. 262 */ 263 struct drm_gpu_scheduler { 264 const struct drm_sched_backend_ops *ops; 265 uint32_t hw_submission_limit; 266 long timeout; 267 const char *name; 268 struct drm_sched_rq sched_rq[DRM_SCHED_PRIORITY_MAX]; 269 wait_queue_head_t wake_up_worker; 270 wait_queue_head_t job_scheduled; 271 atomic_t hw_rq_count; 272 atomic64_t job_id_count; 273 struct task_struct *thread; 274 struct list_head ring_mirror_list; 275 struct spinlock job_list_lock; 276 int hang_limit; 277 }; 278 279 int drm_sched_init(struct drm_gpu_scheduler *sched, 280 const struct drm_sched_backend_ops *ops, 281 uint32_t hw_submission, unsigned hang_limit, long timeout, 282 const char *name); 283 void drm_sched_fini(struct drm_gpu_scheduler *sched); 284 285 int drm_sched_entity_init(struct drm_sched_entity *entity, 286 struct drm_sched_rq **rq_list, 287 unsigned int num_rq_list, 288 atomic_t *guilty); 289 long drm_sched_entity_flush(struct drm_sched_entity *entity, long timeout); 290 void drm_sched_entity_fini(struct drm_sched_entity *entity); 291 void drm_sched_entity_destroy(struct drm_sched_entity *entity); 292 void drm_sched_entity_push_job(struct drm_sched_job *sched_job, 293 struct drm_sched_entity *entity); 294 void drm_sched_entity_set_rq(struct drm_sched_entity *entity, 295 struct drm_sched_rq *rq); 296 297 struct drm_sched_fence *drm_sched_fence_create( 298 struct drm_sched_entity *s_entity, void *owner); 299 void drm_sched_fence_scheduled(struct drm_sched_fence *fence); 300 void drm_sched_fence_finished(struct drm_sched_fence *fence); 301 int drm_sched_job_init(struct drm_sched_job *job, 302 struct drm_sched_entity *entity, 303 void *owner); 304 void drm_sched_hw_job_reset(struct drm_gpu_scheduler *sched, 305 struct drm_sched_job *job); 306 void drm_sched_job_recovery(struct drm_gpu_scheduler *sched); 307 bool drm_sched_dependency_optimized(struct dma_fence* fence, 308 struct drm_sched_entity *entity); 309 void drm_sched_job_kickout(struct drm_sched_job *s_job); 310 311 #endif 312