1 /* 2 * Copyright (c) 2014-2018 François Tigeot <ftigeot@wolfpond.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice unmodified, this list of conditions, and the following 10 * disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #ifndef LINUX_PCI_H 28 #define LINUX_PCI_H 29 30 #define PCI_ANY_ID (~0u) 31 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/pciio.h> 35 #include <sys/rman.h> 36 #include <bus/pci/pcivar.h> 37 #include <bus/pci/pcireg.h> 38 39 #include <linux/types.h> 40 #include <linux/list.h> 41 #include <linux/compiler.h> 42 #include <linux/errno.h> 43 #include <linux/kobject.h> 44 #include <linux/atomic.h> 45 #include <linux/device.h> 46 #include <linux/io.h> 47 #include <uapi/linux/pci.h> 48 49 #include <linux/pci_ids.h> 50 51 struct pci_bus; 52 53 struct pci_device_id { 54 uint32_t vendor; 55 uint32_t device; 56 uint32_t subvendor; 57 uint32_t subdevice; 58 uint32_t class; 59 uint32_t class_mask; 60 unsigned long driver_data; 61 }; 62 63 struct pci_dev { 64 struct pci_bus *bus; /* bus device is nailed to */ 65 struct device dev; 66 67 uint32_t devfn; 68 uint16_t vendor; /* vendor ID */ 69 uint16_t device; /* device ID */ 70 uint16_t subsystem_vendor; 71 uint16_t subsystem_device; 72 73 uint8_t revision; /* revision ID */ 74 75 unsigned int irq; /* handle with care */ 76 void *pci_dev_data; 77 78 /* DragonFly-specific data */ 79 int _irq_type; 80 struct resource *_irqr; 81 int _irqrid; 82 }; 83 84 struct pci_bus { 85 struct pci_dev *self; /* handle to pdev self */ 86 struct device *dev; /* handle to dev */ 87 88 unsigned char number; /* bus addr number */ 89 }; 90 91 struct pci_driver { 92 }; 93 94 #define PCI_DMA_BIDIRECTIONAL 0 95 96 /* extracted from radeon/si.c radeon/cik.c */ 97 #define PCI_EXP_LNKCTL PCIER_LINKCTRL /* 16 */ 98 #define PCI_EXP_LNKCTL2 48 99 #define PCI_EXP_LNKCTL_HAWD PCIEM_LNKCTL_HAWD /* 0x0200 */ 100 #define PCI_EXP_DEVSTA PCIER_DEVSTS /* 10 */ 101 #define PCI_EXP_DEVSTA_TRPND 0x0020 102 #define PCI_EXP_LNKCAP_CLKPM 0x00040000 103 104 static inline int 105 pci_read_config_byte(struct pci_dev *pdev, int where, u8 *val) 106 { 107 *val = (u8)pci_read_config(pdev->dev.bsddev, where, 1); 108 return 0; 109 } 110 111 static inline int 112 pci_read_config_word(struct pci_dev *pdev, int where, u16 *val) 113 { 114 *val = (u16)pci_read_config(pdev->dev.bsddev, where, 2); 115 return 0; 116 } 117 118 static inline int 119 pci_read_config_dword(struct pci_dev *pdev, int where, u32 *val) 120 { 121 *val = (u32)pci_read_config(pdev->dev.bsddev, where, 4); 122 return 0; 123 } 124 125 static inline int 126 pci_write_config_byte(struct pci_dev *pdev, int where, u8 val) 127 { 128 pci_write_config(pdev->dev.bsddev, where, val, 1); 129 return 0; 130 } 131 132 static inline int 133 pci_write_config_word(struct pci_dev *pdev, int where, u16 val) 134 { 135 pci_write_config(pdev->dev.bsddev, where, val, 2); 136 return 0; 137 } 138 139 static inline int 140 pci_write_config_dword(struct pci_dev *pdev, int where, u32 val) 141 { 142 pci_write_config(pdev->dev.bsddev, where, val, 4); 143 return 0; 144 } 145 146 /* extracted from drm/radeon/evergreen.c */ 147 static inline int 148 pcie_get_readrq(struct pci_dev *pdev) 149 { 150 u16 ctl; 151 int err, cap; 152 153 err = pci_find_extcap(pdev->dev.bsddev, PCIY_EXPRESS, &cap); 154 155 cap += PCIER_DEVCTRL; 156 157 ctl = pci_read_config(pdev->dev.bsddev, cap, 2); 158 159 return 128 << ((ctl & PCIEM_DEVCTL_MAX_READRQ_MASK) >> 12); 160 } 161 162 /* valid rq sizes: 128, 256, 512, 1024, 2048, 4096 (^2N) */ 163 static inline int 164 pcie_set_readrq(struct pci_dev *pdev, int rq) 165 { 166 u16 ctl; 167 int err, cap; 168 169 if (rq < 128 || rq > 4096 || !is_power_of_2(rq)) 170 return -EINVAL; 171 172 err = pci_find_extcap(pdev->dev.bsddev, PCIY_EXPRESS, &cap); 173 if (err) 174 return (-1); 175 176 cap += PCIER_DEVCTRL; 177 178 ctl = pci_read_config(pdev->dev.bsddev, cap, 2); 179 ctl &= ~PCIEM_DEVCTL_MAX_READRQ_MASK; 180 ctl |= ((ffs(rq) - 8) << 12); 181 pci_write_config(pdev->dev.bsddev, cap, ctl, 2); 182 return 0; 183 } 184 185 static inline struct pci_dev * 186 pci_dev_get(struct pci_dev *dev) 187 { 188 /* Linux increments a reference count here */ 189 return dev; 190 } 191 192 static inline struct pci_dev * 193 pci_dev_put(struct pci_dev *dev) 194 { 195 /* Linux decrements a reference count here */ 196 return dev; 197 } 198 199 200 static inline int 201 pci_set_dma_mask(struct pci_dev *dev, u64 mask) 202 { 203 return -EIO; 204 } 205 206 static inline int 207 pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask) 208 { 209 return -EIO; 210 } 211 212 typedef int pci_power_t; 213 214 #define PCI_D0 0 215 #define PCI_D1 1 216 #define PCI_D2 2 217 #define PCI_D3hot 3 218 #define PCI_D3cold 4 219 220 #include <asm/pci.h> 221 222 static inline struct resource_list_entry* 223 _pci_get_rle(struct pci_dev *pdev, int bar) 224 { 225 struct pci_devinfo *dinfo; 226 device_t dev = pdev->dev.bsddev; 227 struct resource_list_entry *rle; 228 229 dinfo = device_get_ivars(dev); 230 231 /* Some child devices don't have registered resources, they 232 * are only present in the parent */ 233 if (dinfo == NULL) 234 dev = device_get_parent(dev); 235 dinfo = device_get_ivars(dev); 236 if (dinfo == NULL) 237 return NULL; 238 239 rle = resource_list_find(&dinfo->resources, SYS_RES_MEMORY, PCIR_BAR(bar)); 240 if (rle == NULL) { 241 rle = resource_list_find(&dinfo->resources, 242 SYS_RES_IOPORT, PCIR_BAR(bar)); 243 } 244 245 return rle; 246 } 247 248 /* 249 * Returns the first address (memory address or I/O port number) 250 * associated with one of the PCI I/O regions.The region is selected by 251 * the integer bar (the base address register), ranging from 0–5 (inclusive). 252 * The return value can be used by ioremap() 253 */ 254 static inline phys_addr_t 255 pci_resource_start(struct pci_dev *pdev, int bar) 256 { 257 struct resource *res; 258 int rid; 259 260 rid = PCIR_BAR(bar); 261 res = bus_alloc_resource_any(pdev->dev.bsddev, SYS_RES_MEMORY, &rid, RF_SHAREABLE); 262 if (res == NULL) { 263 kprintf("pci_resource_start(0x%p, 0x%x) failed\n", pdev, PCIR_BAR(bar)); 264 return -1; 265 } 266 267 return rman_get_start(res); 268 } 269 270 static inline phys_addr_t 271 pci_resource_len(struct pci_dev *pdev, int bar) 272 { 273 struct resource_list_entry *rle; 274 275 rle = _pci_get_rle(pdev, bar); 276 if (rle == NULL) 277 return -1; 278 279 return rman_get_size(rle->res); 280 } 281 282 static inline void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen) 283 { 284 resource_size_t base, size; 285 286 base = pci_resource_start(dev, bar); 287 size = pci_resource_len(dev, bar); 288 289 if (base == 0) 290 return NULL; 291 292 if (maxlen && size > maxlen) 293 size = maxlen; 294 295 return ioremap(base, size); 296 } 297 298 static inline int 299 pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn, int where, u8 *val) 300 { 301 const struct pci_dev *pdev = container_of(&bus, struct pci_dev, bus); 302 303 *val = (u8)pci_read_config(pdev->dev.bsddev, where, 1); 304 return 0; 305 } 306 307 static inline int 308 pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn, int where, u16 *val) 309 { 310 const struct pci_dev *pdev = container_of(&bus, struct pci_dev, bus); 311 312 *val = (u16)pci_read_config(pdev->dev.bsddev, where, 2); 313 return 0; 314 } 315 316 static inline void * 317 pci_get_drvdata(struct pci_dev *pdev) 318 { 319 return pdev->pci_dev_data; 320 } 321 322 static inline void 323 pci_set_drvdata(struct pci_dev *pdev, void *data) 324 { 325 pdev->pci_dev_data = data; 326 } 327 328 static inline int 329 pci_register_driver(struct pci_driver *drv) 330 { 331 return 0; 332 } 333 334 #endif /* LINUX_PCI_H */ 335