1 /* 2 * Copyright (c) 2014-2017 François Tigeot <ftigeot@wolfpond.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice unmodified, this list of conditions, and the following 10 * disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #ifndef LINUX_PCI_H 28 #define LINUX_PCI_H 29 30 #define PCI_ANY_ID (~0u) 31 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/pciio.h> 35 #include <sys/rman.h> 36 #include <bus/pci/pcivar.h> 37 #include <bus/pci/pcireg.h> 38 39 #include <linux/types.h> 40 #include <linux/list.h> 41 #include <linux/compiler.h> 42 #include <linux/errno.h> 43 #include <linux/kobject.h> 44 #include <linux/atomic.h> 45 #include <linux/device.h> 46 #include <linux/io.h> 47 48 #include <linux/pci_ids.h> 49 50 struct pci_bus; 51 52 struct pci_device_id { 53 uint32_t vendor; 54 uint32_t device; 55 uint32_t subvendor; 56 uint32_t subdevice; 57 uint32_t class; 58 uint32_t class_mask; 59 unsigned long driver_data; 60 }; 61 62 struct pci_dev { 63 struct pci_bus *bus; /* bus device is nailed to */ 64 struct device dev; 65 66 uint16_t vendor; /* vendor ID */ 67 uint16_t device; /* device ID */ 68 uint16_t subsystem_vendor; 69 uint16_t subsystem_device; 70 71 uint8_t revision; /* revision ID */ 72 73 unsigned int irq; /* handle with care */ 74 void *pci_dev_data; 75 }; 76 77 struct pci_bus { 78 struct pci_dev *self; /* handle to pdev self */ 79 struct device *dev; /* handle to dev */ 80 81 unsigned char number; /* bus addr number */ 82 }; 83 84 struct pci_driver { 85 }; 86 87 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07)) 88 89 #define PCI_DMA_BIDIRECTIONAL 0 90 91 /* extracted from radeon/si.c radeon/cik.c */ 92 #define PCI_EXP_LNKCTL PCIER_LINKCTRL /* 16 */ 93 #define PCI_EXP_LNKCTL2 48 94 #define PCI_EXP_LNKCTL_HAWD PCIEM_LNKCTL_HAWD /* 0x0200 */ 95 #define PCI_EXP_DEVSTA PCIER_DEVSTS /* 10 */ 96 #define PCI_EXP_DEVSTA_TRPND 0x0020 97 #define PCI_EXP_LNKCAP_CLKPM 0x00040000 98 99 static inline int 100 pci_read_config_byte(struct pci_dev *pdev, int where, u8 *val) 101 { 102 *val = (u8)pci_read_config(pdev->dev.bsddev, where, 1); 103 return 0; 104 } 105 106 static inline int 107 pci_read_config_word(struct pci_dev *pdev, int where, u16 *val) 108 { 109 *val = (u16)pci_read_config(pdev->dev.bsddev, where, 2); 110 return 0; 111 } 112 113 static inline int 114 pci_read_config_dword(struct pci_dev *pdev, int where, u32 *val) 115 { 116 *val = (u32)pci_read_config(pdev->dev.bsddev, where, 4); 117 return 0; 118 } 119 120 static inline int 121 pci_write_config_byte(struct pci_dev *pdev, int where, u8 val) 122 { 123 pci_write_config(pdev->dev.bsddev, where, val, 1); 124 return 0; 125 } 126 127 static inline int 128 pci_write_config_word(struct pci_dev *pdev, int where, u16 val) 129 { 130 pci_write_config(pdev->dev.bsddev, where, val, 2); 131 return 0; 132 } 133 134 static inline int 135 pci_write_config_dword(struct pci_dev *pdev, int where, u32 val) 136 { 137 pci_write_config(pdev->dev.bsddev, where, val, 4); 138 return 0; 139 } 140 141 /* extracted from drm/radeon/evergreen.c */ 142 static inline int 143 pcie_get_readrq(struct pci_dev *pdev) 144 { 145 u16 ctl; 146 int err, cap; 147 148 err = pci_find_extcap(pdev->dev.bsddev, PCIY_EXPRESS, &cap); 149 150 cap += PCIER_DEVCTRL; 151 152 ctl = pci_read_config(pdev->dev.bsddev, cap, 2); 153 154 return 128 << ((ctl & PCIEM_DEVCTL_MAX_READRQ_MASK) >> 12); 155 } 156 157 /* valid rq sizes: 128, 256, 512, 1024, 2048, 4096 (^2N) */ 158 static inline int 159 pcie_set_readrq(struct pci_dev *pdev, int rq) 160 { 161 u16 ctl; 162 int err, cap; 163 164 if (rq < 128 || rq > 4096 || !is_power_of_2(rq)) 165 return -EINVAL; 166 167 err = pci_find_extcap(pdev->dev.bsddev, PCIY_EXPRESS, &cap); 168 if (err) 169 return (-1); 170 171 cap += PCIER_DEVCTRL; 172 173 ctl = pci_read_config(pdev->dev.bsddev, cap, 2); 174 ctl &= ~PCIEM_DEVCTL_MAX_READRQ_MASK; 175 ctl |= ((ffs(rq) - 8) << 12); 176 pci_write_config(pdev->dev.bsddev, cap, ctl, 2); 177 return 0; 178 } 179 180 static inline struct pci_dev * 181 pci_dev_get(struct pci_dev *dev) 182 { 183 /* Linux increments a reference count here */ 184 return dev; 185 } 186 187 static inline struct pci_dev * 188 pci_dev_put(struct pci_dev *dev) 189 { 190 /* Linux decrements a reference count here */ 191 return dev; 192 } 193 194 195 static inline int 196 pci_set_dma_mask(struct pci_dev *dev, u64 mask) 197 { 198 return -EIO; 199 } 200 201 static inline int 202 pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask) 203 { 204 return -EIO; 205 } 206 207 typedef int pci_power_t; 208 209 #define PCI_D0 0 210 #define PCI_D1 1 211 #define PCI_D2 2 212 #define PCI_D3hot 3 213 #define PCI_D3cold 4 214 215 #include <asm/pci.h> 216 217 static inline struct resource_list_entry* 218 _pci_get_rle(struct pci_dev *pdev, int bar) 219 { 220 struct pci_devinfo *dinfo; 221 device_t dev = pdev->dev.bsddev; 222 struct resource_list_entry *rle; 223 224 dinfo = device_get_ivars(dev); 225 226 /* Some child devices don't have registered resources, they 227 * are only present in the parent */ 228 if (dinfo == NULL) 229 dev = device_get_parent(dev); 230 dinfo = device_get_ivars(dev); 231 if (dinfo == NULL) 232 return NULL; 233 234 rle = resource_list_find(&dinfo->resources, SYS_RES_MEMORY, PCIR_BAR(bar)); 235 if (rle == NULL) { 236 rle = resource_list_find(&dinfo->resources, 237 SYS_RES_IOPORT, PCIR_BAR(bar)); 238 } 239 240 return rle; 241 } 242 243 /* 244 * Returns the first address (memory address or I/O port number) 245 * associated with one of the PCI I/O regions.The region is selected by 246 * the integer bar (the base address register), ranging from 0–5 (inclusive). 247 * The return value can be used by ioremap() 248 */ 249 static inline phys_addr_t 250 pci_resource_start(struct pci_dev *pdev, int bar) 251 { 252 struct resource *res; 253 int rid; 254 255 rid = PCIR_BAR(bar); 256 res = bus_alloc_resource_any(pdev->dev.bsddev, SYS_RES_MEMORY, &rid, RF_SHAREABLE); 257 if (res == NULL) { 258 kprintf("pci_resource_start(0x%p, 0x%x) failed\n", pdev, PCIR_BAR(bar)); 259 return -1; 260 } 261 262 return rman_get_start(res); 263 } 264 265 static inline phys_addr_t 266 pci_resource_len(struct pci_dev *pdev, int bar) 267 { 268 struct resource_list_entry *rle; 269 270 rle = _pci_get_rle(pdev, bar); 271 if (rle == NULL) 272 return -1; 273 274 return rman_get_size(rle->res); 275 } 276 277 static inline void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen) 278 { 279 resource_size_t base, size; 280 281 base = pci_resource_start(dev, bar); 282 size = pci_resource_len(dev, bar); 283 284 if (base == 0) 285 return NULL; 286 287 if (maxlen && size > maxlen) 288 size = maxlen; 289 290 return ioremap(base, size); 291 } 292 293 static inline int 294 pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn, int where, u8 *val) 295 { 296 const struct pci_dev *pdev = container_of(&bus, struct pci_dev, bus); 297 298 *val = (u8)pci_read_config(pdev->dev.bsddev, where, 1); 299 return 0; 300 } 301 302 static inline int 303 pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn, int where, u16 *val) 304 { 305 const struct pci_dev *pdev = container_of(&bus, struct pci_dev, bus); 306 307 *val = (u16)pci_read_config(pdev->dev.bsddev, where, 2); 308 return 0; 309 } 310 311 static inline void * 312 pci_get_drvdata(struct pci_dev *pdev) 313 { 314 return pdev->pci_dev_data; 315 } 316 317 static inline void 318 pci_set_drvdata(struct pci_dev *pdev, void *data) 319 { 320 pdev->pci_dev_data = data; 321 } 322 323 static inline int 324 pci_register_driver(struct pci_driver *drv) 325 { 326 return 0; 327 } 328 329 #endif /* LINUX_PCI_H */ 330