1 /* 2 * Copyright (c) 2014-2018 François Tigeot <ftigeot@wolfpond.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice unmodified, this list of conditions, and the following 10 * disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #ifndef LINUX_PCI_H 28 #define LINUX_PCI_H 29 30 #define PCI_ANY_ID (~0u) 31 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/pciio.h> 35 #include <sys/rman.h> 36 #include <bus/pci/pcivar.h> 37 #include <bus/pci/pcireg.h> 38 39 #include <linux/types.h> 40 #include <linux/list.h> 41 #include <linux/compiler.h> 42 #include <linux/errno.h> 43 #include <linux/kobject.h> 44 #include <linux/atomic.h> 45 #include <linux/device.h> 46 #include <linux/io.h> 47 48 #include <linux/pci_ids.h> 49 50 struct pci_bus; 51 52 struct pci_device_id { 53 uint32_t vendor; 54 uint32_t device; 55 uint32_t subvendor; 56 uint32_t subdevice; 57 uint32_t class; 58 uint32_t class_mask; 59 unsigned long driver_data; 60 }; 61 62 struct pci_dev { 63 struct pci_bus *bus; /* bus device is nailed to */ 64 struct device dev; 65 66 uint32_t devfn; 67 uint16_t vendor; /* vendor ID */ 68 uint16_t device; /* device ID */ 69 uint16_t subsystem_vendor; 70 uint16_t subsystem_device; 71 72 uint8_t revision; /* revision ID */ 73 74 unsigned int irq; /* handle with care */ 75 void *pci_dev_data; 76 77 /* DragonFly-specific data */ 78 int _irq_type; 79 struct resource *_irqr; 80 int _irqrid; 81 }; 82 83 struct pci_bus { 84 struct pci_dev *self; /* handle to pdev self */ 85 struct device *dev; /* handle to dev */ 86 87 unsigned char number; /* bus addr number */ 88 }; 89 90 struct pci_driver { 91 }; 92 93 /* XXX: should be in uapi_linux/pci.h */ 94 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07)) 95 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f) 96 #define PCI_FUNC(devfn) ((devfn) & 0x07) 97 98 #define PCI_DMA_BIDIRECTIONAL 0 99 100 /* extracted from radeon/si.c radeon/cik.c */ 101 #define PCI_EXP_LNKCTL PCIER_LINKCTRL /* 16 */ 102 #define PCI_EXP_LNKCTL2 48 103 #define PCI_EXP_LNKCTL_HAWD PCIEM_LNKCTL_HAWD /* 0x0200 */ 104 #define PCI_EXP_DEVSTA PCIER_DEVSTS /* 10 */ 105 #define PCI_EXP_DEVSTA_TRPND 0x0020 106 #define PCI_EXP_LNKCAP_CLKPM 0x00040000 107 108 static inline int 109 pci_read_config_byte(struct pci_dev *pdev, int where, u8 *val) 110 { 111 *val = (u8)pci_read_config(pdev->dev.bsddev, where, 1); 112 return 0; 113 } 114 115 static inline int 116 pci_read_config_word(struct pci_dev *pdev, int where, u16 *val) 117 { 118 *val = (u16)pci_read_config(pdev->dev.bsddev, where, 2); 119 return 0; 120 } 121 122 static inline int 123 pci_read_config_dword(struct pci_dev *pdev, int where, u32 *val) 124 { 125 *val = (u32)pci_read_config(pdev->dev.bsddev, where, 4); 126 return 0; 127 } 128 129 static inline int 130 pci_write_config_byte(struct pci_dev *pdev, int where, u8 val) 131 { 132 pci_write_config(pdev->dev.bsddev, where, val, 1); 133 return 0; 134 } 135 136 static inline int 137 pci_write_config_word(struct pci_dev *pdev, int where, u16 val) 138 { 139 pci_write_config(pdev->dev.bsddev, where, val, 2); 140 return 0; 141 } 142 143 static inline int 144 pci_write_config_dword(struct pci_dev *pdev, int where, u32 val) 145 { 146 pci_write_config(pdev->dev.bsddev, where, val, 4); 147 return 0; 148 } 149 150 /* extracted from drm/radeon/evergreen.c */ 151 static inline int 152 pcie_get_readrq(struct pci_dev *pdev) 153 { 154 u16 ctl; 155 int err, cap; 156 157 err = pci_find_extcap(pdev->dev.bsddev, PCIY_EXPRESS, &cap); 158 159 cap += PCIER_DEVCTRL; 160 161 ctl = pci_read_config(pdev->dev.bsddev, cap, 2); 162 163 return 128 << ((ctl & PCIEM_DEVCTL_MAX_READRQ_MASK) >> 12); 164 } 165 166 /* valid rq sizes: 128, 256, 512, 1024, 2048, 4096 (^2N) */ 167 static inline int 168 pcie_set_readrq(struct pci_dev *pdev, int rq) 169 { 170 u16 ctl; 171 int err, cap; 172 173 if (rq < 128 || rq > 4096 || !is_power_of_2(rq)) 174 return -EINVAL; 175 176 err = pci_find_extcap(pdev->dev.bsddev, PCIY_EXPRESS, &cap); 177 if (err) 178 return (-1); 179 180 cap += PCIER_DEVCTRL; 181 182 ctl = pci_read_config(pdev->dev.bsddev, cap, 2); 183 ctl &= ~PCIEM_DEVCTL_MAX_READRQ_MASK; 184 ctl |= ((ffs(rq) - 8) << 12); 185 pci_write_config(pdev->dev.bsddev, cap, ctl, 2); 186 return 0; 187 } 188 189 static inline struct pci_dev * 190 pci_dev_get(struct pci_dev *dev) 191 { 192 /* Linux increments a reference count here */ 193 return dev; 194 } 195 196 static inline struct pci_dev * 197 pci_dev_put(struct pci_dev *dev) 198 { 199 /* Linux decrements a reference count here */ 200 return dev; 201 } 202 203 204 static inline int 205 pci_set_dma_mask(struct pci_dev *dev, u64 mask) 206 { 207 return -EIO; 208 } 209 210 static inline int 211 pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask) 212 { 213 return -EIO; 214 } 215 216 typedef int pci_power_t; 217 218 #define PCI_D0 0 219 #define PCI_D1 1 220 #define PCI_D2 2 221 #define PCI_D3hot 3 222 #define PCI_D3cold 4 223 224 #include <asm/pci.h> 225 226 static inline struct resource_list_entry* 227 _pci_get_rle(struct pci_dev *pdev, int bar) 228 { 229 struct pci_devinfo *dinfo; 230 device_t dev = pdev->dev.bsddev; 231 struct resource_list_entry *rle; 232 233 dinfo = device_get_ivars(dev); 234 235 /* Some child devices don't have registered resources, they 236 * are only present in the parent */ 237 if (dinfo == NULL) 238 dev = device_get_parent(dev); 239 dinfo = device_get_ivars(dev); 240 if (dinfo == NULL) 241 return NULL; 242 243 rle = resource_list_find(&dinfo->resources, SYS_RES_MEMORY, PCIR_BAR(bar)); 244 if (rle == NULL) { 245 rle = resource_list_find(&dinfo->resources, 246 SYS_RES_IOPORT, PCIR_BAR(bar)); 247 } 248 249 return rle; 250 } 251 252 /* 253 * Returns the first address (memory address or I/O port number) 254 * associated with one of the PCI I/O regions.The region is selected by 255 * the integer bar (the base address register), ranging from 0–5 (inclusive). 256 * The return value can be used by ioremap() 257 */ 258 static inline phys_addr_t 259 pci_resource_start(struct pci_dev *pdev, int bar) 260 { 261 struct resource *res; 262 int rid; 263 264 rid = PCIR_BAR(bar); 265 res = bus_alloc_resource_any(pdev->dev.bsddev, SYS_RES_MEMORY, &rid, RF_SHAREABLE); 266 if (res == NULL) { 267 kprintf("pci_resource_start(0x%p, 0x%x) failed\n", pdev, PCIR_BAR(bar)); 268 return -1; 269 } 270 271 return rman_get_start(res); 272 } 273 274 static inline phys_addr_t 275 pci_resource_len(struct pci_dev *pdev, int bar) 276 { 277 struct resource_list_entry *rle; 278 279 rle = _pci_get_rle(pdev, bar); 280 if (rle == NULL) 281 return -1; 282 283 return rman_get_size(rle->res); 284 } 285 286 static inline void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen) 287 { 288 resource_size_t base, size; 289 290 base = pci_resource_start(dev, bar); 291 size = pci_resource_len(dev, bar); 292 293 if (base == 0) 294 return NULL; 295 296 if (maxlen && size > maxlen) 297 size = maxlen; 298 299 return ioremap(base, size); 300 } 301 302 static inline int 303 pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn, int where, u8 *val) 304 { 305 const struct pci_dev *pdev = container_of(&bus, struct pci_dev, bus); 306 307 *val = (u8)pci_read_config(pdev->dev.bsddev, where, 1); 308 return 0; 309 } 310 311 static inline int 312 pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn, int where, u16 *val) 313 { 314 const struct pci_dev *pdev = container_of(&bus, struct pci_dev, bus); 315 316 *val = (u16)pci_read_config(pdev->dev.bsddev, where, 2); 317 return 0; 318 } 319 320 static inline void * 321 pci_get_drvdata(struct pci_dev *pdev) 322 { 323 return pdev->pci_dev_data; 324 } 325 326 static inline void 327 pci_set_drvdata(struct pci_dev *pdev, void *data) 328 { 329 pdev->pci_dev_data = data; 330 } 331 332 static inline int 333 pci_register_driver(struct pci_driver *drv) 334 { 335 return 0; 336 } 337 338 #endif /* LINUX_PCI_H */ 339