1 /* 2 * Copyright (c) 2014-2015 François Tigeot 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice unmodified, this list of conditions, and the following 10 * disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #ifndef LINUX_PCI_H 28 #define LINUX_PCI_H 29 30 #define PCI_ANY_ID (~0u) 31 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/pciio.h> 35 #include <sys/rman.h> 36 #include <bus/pci/pcivar.h> 37 #include <bus/pci/pcireg.h> 38 39 #include <linux/types.h> 40 #include <linux/device.h> 41 #include <linux/io.h> 42 43 #include <linux/pci_ids.h> 44 45 struct pci_device_id { 46 uint32_t class; 47 uint32_t class_mask; 48 uint32_t vendor; 49 uint32_t device; 50 uint32_t subvendor; 51 uint32_t subdevice; 52 unsigned long driver_data; 53 }; 54 55 struct pci_dev { 56 struct device *dev; 57 unsigned short device; 58 }; 59 60 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07)) 61 62 #define PCI_DMA_BIDIRECTIONAL 0 63 64 static inline int 65 pci_read_config_byte(struct pci_dev *pdev, int where, u8 *val) 66 { 67 *val = (u16)pci_read_config(pdev->dev, where, 1); 68 return 0; 69 } 70 71 static inline int 72 pci_read_config_word(struct pci_dev *pdev, int where, u16 *val) 73 { 74 *val = (u16)pci_read_config(pdev->dev, where, 2); 75 return 0; 76 } 77 78 static inline int 79 pci_read_config_dword(struct pci_dev *pdev, int where, u32 *val) 80 { 81 *val = (u32)pci_read_config(pdev->dev, where, 4); 82 return 0; 83 } 84 85 static inline int 86 pci_write_config_byte(struct pci_dev *pdev, int where, u8 val) 87 { 88 pci_write_config(pdev->dev, where, val, 1); 89 return 0; 90 } 91 92 static inline int 93 pci_write_config_word(struct pci_dev *pdev, int where, u16 val) 94 { 95 pci_write_config(pdev->dev, where, val, 2); 96 return 0; 97 } 98 99 static inline int 100 pci_write_config_dword(struct pci_dev *pdev, int where, u32 val) 101 { 102 pci_write_config(pdev->dev, where, val, 4); 103 return 0; 104 } 105 106 107 static inline struct pci_dev * 108 pci_dev_get(struct pci_dev *dev) 109 { 110 /* Linux increments a reference count here */ 111 return dev; 112 } 113 114 static inline struct pci_dev * 115 pci_dev_put(struct pci_dev *dev) 116 { 117 /* Linux decrements a reference count here */ 118 return dev; 119 } 120 121 122 static inline int 123 pci_set_dma_mask(struct pci_dev *dev, u64 mask) 124 { 125 return -EIO; 126 } 127 128 static inline int 129 pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask) 130 { 131 return -EIO; 132 } 133 134 typedef int pci_power_t; 135 136 #define PCI_D0 0 137 #define PCI_D1 1 138 #define PCI_D2 2 139 #define PCI_D3hot 3 140 #define PCI_D3cold 4 141 142 #include <asm/pci.h> 143 144 static inline struct resource_list_entry* 145 _pci_get_rle(struct pci_dev *pdev, int bar) 146 { 147 struct pci_devinfo *dinfo; 148 struct device *dev = pdev->dev; 149 struct resource_list_entry *rle; 150 151 dinfo = device_get_ivars(dev); 152 153 /* Some child devices don't have registered resources, they 154 * are only present in the parent */ 155 if (dinfo == NULL) { 156 kprintf("_pci_get_rle: dinfo was NULL, trying again with parent\n"); 157 dev = device_get_parent(dev); 158 } 159 dinfo = device_get_ivars(dev); 160 if (dinfo == NULL) 161 return NULL; 162 163 rle = resource_list_find(&dinfo->resources, SYS_RES_MEMORY, PCIR_BAR(bar)); 164 if (rle == NULL) { 165 rle = resource_list_find(&dinfo->resources, 166 SYS_RES_IOPORT, PCIR_BAR(bar)); 167 } 168 169 return rle; 170 } 171 172 /* 173 * Returns the first address (memory address or I/O port number) 174 * associated with one of the PCI I/O regions.The region is selected by 175 * the integer bar (the base address register), ranging from 0–5 (inclusive). 176 * The return value can be used by ioremap() 177 */ 178 static inline phys_addr_t 179 pci_resource_start(struct pci_dev *pdev, int bar) 180 { 181 struct resource_list_entry *rle; 182 183 rle = _pci_get_rle(pdev, bar); 184 if (rle == NULL) 185 return -1; 186 187 kprintf("pci_resource_start(0x%x, 0x%x) = 0x%lx\n", 188 pdev->device, PCIR_BAR(bar), rman_get_start(rle->res)); 189 190 return rman_get_start(rle->res); 191 } 192 193 static inline phys_addr_t 194 pci_resource_len(struct pci_dev *pdev, int bar) 195 { 196 struct resource_list_entry *rle; 197 198 rle = _pci_get_rle(pdev, bar); 199 if (rle == NULL) 200 return -1; 201 202 kprintf("pci_resource_len(0x%x, 0x%x) = 0x%lx\n", 203 pdev->device, PCIR_BAR(bar), rman_get_size(rle->res)); 204 205 return rman_get_size(rle->res); 206 } 207 208 #endif /* LINUX_PCI_H */ 209