1 /* 2 * Copyright 2008 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Author: Stanislaw Skowronek 23 * 24 * $FreeBSD: head/sys/dev/drm2/radeon/atom.c 254894 2013-08-26 06:31:57Z dumbbell $ 25 */ 26 27 #define ATOM_DEBUG 28 29 #include "atom.h" 30 #include "atom-names.h" 31 #include "atom-bits.h" 32 #include "radeon.h" 33 34 #define ATOM_COND_ABOVE 0 35 #define ATOM_COND_ABOVEOREQUAL 1 36 #define ATOM_COND_ALWAYS 2 37 #define ATOM_COND_BELOW 3 38 #define ATOM_COND_BELOWOREQUAL 4 39 #define ATOM_COND_EQUAL 5 40 #define ATOM_COND_NOTEQUAL 6 41 42 #define ATOM_PORT_ATI 0 43 #define ATOM_PORT_PCI 1 44 #define ATOM_PORT_SYSIO 2 45 46 #define ATOM_UNIT_MICROSEC 0 47 #define ATOM_UNIT_MILLISEC 1 48 49 #define PLL_INDEX 2 50 #define PLL_DATA 3 51 52 typedef struct { 53 struct atom_context *ctx; 54 uint32_t *ps, *ws; 55 int ps_shift; 56 uint16_t start; 57 unsigned last_jump; 58 unsigned long last_jump_jiffies; 59 bool abort; 60 } atom_exec_context; 61 62 int atom_debug = 0; 63 static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params); 64 65 static uint32_t atom_arg_mask[8] = 66 { 0xFFFFFFFF, 0xFFFF, 0xFFFF00, 0xFFFF0000, 0xFF, 0xFF00, 0xFF0000, 67 0xFF000000 }; 68 static int atom_arg_shift[8] = { 0, 0, 8, 16, 0, 8, 16, 24 }; 69 70 static int atom_dst_to_src[8][4] = { 71 /* translate destination alignment field to the source alignment encoding */ 72 {0, 0, 0, 0}, 73 {1, 2, 3, 0}, 74 {1, 2, 3, 0}, 75 {1, 2, 3, 0}, 76 {4, 5, 6, 7}, 77 {4, 5, 6, 7}, 78 {4, 5, 6, 7}, 79 {4, 5, 6, 7}, 80 }; 81 static int atom_def_dst[8] = { 0, 0, 1, 2, 0, 1, 2, 3 }; 82 83 static int debug_depth = 0; 84 #ifdef ATOM_DEBUG 85 static void debug_print_spaces(int n) 86 { 87 while (n--) 88 kprintf(" "); 89 } 90 91 #define ATOM_DEBUG_PRINT(...) do if (atom_debug) { kprintf(__FILE__ __VA_ARGS__); } while (0) 92 #define ATOM_SDEBUG_PRINT(...) do if (atom_debug) { kprintf(__FILE__); debug_print_spaces(debug_depth); kprintf(__VA_ARGS__); } while (0) 93 #else 94 #define ATOM_DEBUG_PRINT(...) do { } while (0) 95 #define ATOM_SDEBUG_PRINT(...) do { } while (0) 96 #endif 97 98 static uint32_t atom_iio_execute(struct atom_context *ctx, int base, 99 uint32_t index, uint32_t data) 100 { 101 struct radeon_device *rdev = ctx->card->dev->dev_private; 102 uint32_t temp = 0xCDCDCDCD; 103 104 while (1) 105 switch (CU8(base)) { 106 case ATOM_IIO_NOP: 107 base++; 108 break; 109 case ATOM_IIO_READ: 110 temp = ctx->card->ioreg_read(ctx->card, CU16(base + 1)); 111 base += 3; 112 break; 113 case ATOM_IIO_WRITE: 114 if (rdev->family == CHIP_RV515) 115 (void)ctx->card->ioreg_read(ctx->card, CU16(base + 1)); 116 ctx->card->ioreg_write(ctx->card, CU16(base + 1), temp); 117 base += 3; 118 break; 119 case ATOM_IIO_CLEAR: 120 temp &= 121 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) << 122 CU8(base + 2)); 123 base += 3; 124 break; 125 case ATOM_IIO_SET: 126 temp |= 127 (0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base + 128 2); 129 base += 3; 130 break; 131 case ATOM_IIO_MOVE_INDEX: 132 temp &= 133 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) << 134 CU8(base + 3)); 135 temp |= 136 ((index >> CU8(base + 2)) & 137 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base + 138 3); 139 base += 4; 140 break; 141 case ATOM_IIO_MOVE_DATA: 142 temp &= 143 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) << 144 CU8(base + 3)); 145 temp |= 146 ((data >> CU8(base + 2)) & 147 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base + 148 3); 149 base += 4; 150 break; 151 case ATOM_IIO_MOVE_ATTR: 152 temp &= 153 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) << 154 CU8(base + 3)); 155 temp |= 156 ((ctx-> 157 io_attr >> CU8(base + 2)) & (0xFFFFFFFF >> (32 - 158 CU8 159 (base 160 + 161 1)))) 162 << CU8(base + 3); 163 base += 4; 164 break; 165 case ATOM_IIO_END: 166 return temp; 167 default: 168 DRM_INFO("Unknown IIO opcode.\n"); 169 return 0; 170 } 171 } 172 173 static uint32_t atom_get_src_int(atom_exec_context *ctx, uint8_t attr, 174 int *ptr, uint32_t *saved, int print) 175 { 176 uint32_t idx, val = 0xCDCDCDCD, align, arg; 177 struct atom_context *gctx = ctx->ctx; 178 arg = attr & 7; 179 align = (attr >> 3) & 7; 180 switch (arg) { 181 case ATOM_ARG_REG: 182 idx = U16(*ptr); 183 (*ptr) += 2; 184 if (print) 185 ATOM_DEBUG_PRINT("REG[0x%04X]", idx); 186 idx += gctx->reg_block; 187 switch (gctx->io_mode) { 188 case ATOM_IO_MM: 189 val = gctx->card->reg_read(gctx->card, idx); 190 break; 191 case ATOM_IO_PCI: 192 DRM_INFO( 193 "PCI registers are not implemented.\n"); 194 return 0; 195 case ATOM_IO_SYSIO: 196 DRM_INFO( 197 "SYSIO registers are not implemented.\n"); 198 return 0; 199 default: 200 if (!(gctx->io_mode & 0x80)) { 201 DRM_INFO("Bad IO mode.\n"); 202 return 0; 203 } 204 if (!gctx->iio[gctx->io_mode & 0x7F]) { 205 DRM_INFO( 206 "Undefined indirect IO read method %d.\n", 207 gctx->io_mode & 0x7F); 208 return 0; 209 } 210 val = 211 atom_iio_execute(gctx, 212 gctx->iio[gctx->io_mode & 0x7F], 213 idx, 0); 214 } 215 break; 216 case ATOM_ARG_PS: 217 idx = U8(*ptr); 218 (*ptr)++; 219 /* get_unaligned_le32 avoids unaligned accesses from atombios 220 * tables, noticed on a DEC Alpha. */ 221 val = get_unaligned_le32((u32 *)&ctx->ps[idx]); 222 if (print) 223 ATOM_DEBUG_PRINT("PS[0x%02X,0x%04X]", idx, val); 224 break; 225 case ATOM_ARG_WS: 226 idx = U8(*ptr); 227 (*ptr)++; 228 if (print) 229 ATOM_DEBUG_PRINT("WS[0x%02X]", idx); 230 switch (idx) { 231 case ATOM_WS_QUOTIENT: 232 val = gctx->divmul[0]; 233 break; 234 case ATOM_WS_REMAINDER: 235 val = gctx->divmul[1]; 236 break; 237 case ATOM_WS_DATAPTR: 238 val = gctx->data_block; 239 break; 240 case ATOM_WS_SHIFT: 241 val = gctx->shift; 242 break; 243 case ATOM_WS_OR_MASK: 244 val = 1 << gctx->shift; 245 break; 246 case ATOM_WS_AND_MASK: 247 val = ~(1 << gctx->shift); 248 break; 249 case ATOM_WS_FB_WINDOW: 250 val = gctx->fb_base; 251 break; 252 case ATOM_WS_ATTRIBUTES: 253 val = gctx->io_attr; 254 break; 255 case ATOM_WS_REGPTR: 256 val = gctx->reg_block; 257 break; 258 default: 259 val = ctx->ws[idx]; 260 } 261 break; 262 case ATOM_ARG_ID: 263 idx = U16(*ptr); 264 (*ptr) += 2; 265 if (print) { 266 if (gctx->data_block) 267 ATOM_DEBUG_PRINT("ID[0x%04X+%04X]", idx, gctx->data_block); 268 else 269 ATOM_DEBUG_PRINT("ID[0x%04X]", idx); 270 } 271 val = U32(idx + gctx->data_block); 272 break; 273 case ATOM_ARG_FB: 274 idx = U8(*ptr); 275 (*ptr)++; 276 if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) { 277 DRM_ERROR("ATOM: fb read beyond scratch region: %d vs. %d\n", 278 gctx->fb_base + (idx * 4), gctx->scratch_size_bytes); 279 val = 0; 280 } else 281 val = gctx->scratch[(gctx->fb_base / 4) + idx]; 282 if (print) 283 ATOM_DEBUG_PRINT("FB[0x%02X]", idx); 284 break; 285 case ATOM_ARG_IMM: 286 switch (align) { 287 case ATOM_SRC_DWORD: 288 val = U32(*ptr); 289 (*ptr) += 4; 290 if (print) 291 ATOM_DEBUG_PRINT("IMM 0x%08X\n", val); 292 return val; 293 case ATOM_SRC_WORD0: 294 case ATOM_SRC_WORD8: 295 case ATOM_SRC_WORD16: 296 val = U16(*ptr); 297 (*ptr) += 2; 298 if (print) 299 ATOM_DEBUG_PRINT("IMM 0x%04X\n", val); 300 return val; 301 case ATOM_SRC_BYTE0: 302 case ATOM_SRC_BYTE8: 303 case ATOM_SRC_BYTE16: 304 case ATOM_SRC_BYTE24: 305 val = U8(*ptr); 306 (*ptr)++; 307 if (print) 308 ATOM_DEBUG_PRINT("IMM 0x%02X\n", val); 309 return val; 310 } 311 return 0; 312 case ATOM_ARG_PLL: 313 idx = U8(*ptr); 314 (*ptr)++; 315 if (print) 316 ATOM_DEBUG_PRINT("PLL[0x%02X]", idx); 317 val = gctx->card->pll_read(gctx->card, idx); 318 break; 319 case ATOM_ARG_MC: 320 idx = U8(*ptr); 321 (*ptr)++; 322 if (print) 323 ATOM_DEBUG_PRINT("MC[0x%02X]", idx); 324 val = gctx->card->mc_read(gctx->card, idx); 325 break; 326 } 327 if (saved) 328 *saved = val; 329 val &= atom_arg_mask[align]; 330 val >>= atom_arg_shift[align]; 331 if (print) 332 switch (align) { 333 case ATOM_SRC_DWORD: 334 ATOM_DEBUG_PRINT(".[31:0] -> 0x%08X\n", val); 335 break; 336 case ATOM_SRC_WORD0: 337 ATOM_DEBUG_PRINT(".[15:0] -> 0x%04X\n", val); 338 break; 339 case ATOM_SRC_WORD8: 340 ATOM_DEBUG_PRINT(".[23:8] -> 0x%04X\n", val); 341 break; 342 case ATOM_SRC_WORD16: 343 ATOM_DEBUG_PRINT(".[31:16] -> 0x%04X\n", val); 344 break; 345 case ATOM_SRC_BYTE0: 346 ATOM_DEBUG_PRINT(".[7:0] -> 0x%02X\n", val); 347 break; 348 case ATOM_SRC_BYTE8: 349 ATOM_DEBUG_PRINT(".[15:8] -> 0x%02X\n", val); 350 break; 351 case ATOM_SRC_BYTE16: 352 ATOM_DEBUG_PRINT(".[23:16] -> 0x%02X\n", val); 353 break; 354 case ATOM_SRC_BYTE24: 355 ATOM_DEBUG_PRINT(".[31:24] -> 0x%02X\n", val); 356 break; 357 } 358 return val; 359 } 360 361 static void atom_skip_src_int(atom_exec_context *ctx, uint8_t attr, int *ptr) 362 { 363 uint32_t align = (attr >> 3) & 7, arg = attr & 7; 364 switch (arg) { 365 case ATOM_ARG_REG: 366 case ATOM_ARG_ID: 367 (*ptr) += 2; 368 break; 369 case ATOM_ARG_PLL: 370 case ATOM_ARG_MC: 371 case ATOM_ARG_PS: 372 case ATOM_ARG_WS: 373 case ATOM_ARG_FB: 374 (*ptr)++; 375 break; 376 case ATOM_ARG_IMM: 377 switch (align) { 378 case ATOM_SRC_DWORD: 379 (*ptr) += 4; 380 return; 381 case ATOM_SRC_WORD0: 382 case ATOM_SRC_WORD8: 383 case ATOM_SRC_WORD16: 384 (*ptr) += 2; 385 return; 386 case ATOM_SRC_BYTE0: 387 case ATOM_SRC_BYTE8: 388 case ATOM_SRC_BYTE16: 389 case ATOM_SRC_BYTE24: 390 (*ptr)++; 391 return; 392 } 393 return; 394 } 395 } 396 397 static uint32_t atom_get_src(atom_exec_context *ctx, uint8_t attr, int *ptr) 398 { 399 return atom_get_src_int(ctx, attr, ptr, NULL, 1); 400 } 401 402 static uint32_t atom_get_src_direct(atom_exec_context *ctx, uint8_t align, int *ptr) 403 { 404 uint32_t val = 0xCDCDCDCD; 405 406 switch (align) { 407 case ATOM_SRC_DWORD: 408 val = U32(*ptr); 409 (*ptr) += 4; 410 break; 411 case ATOM_SRC_WORD0: 412 case ATOM_SRC_WORD8: 413 case ATOM_SRC_WORD16: 414 val = U16(*ptr); 415 (*ptr) += 2; 416 break; 417 case ATOM_SRC_BYTE0: 418 case ATOM_SRC_BYTE8: 419 case ATOM_SRC_BYTE16: 420 case ATOM_SRC_BYTE24: 421 val = U8(*ptr); 422 (*ptr)++; 423 break; 424 } 425 return val; 426 } 427 428 static uint32_t atom_get_dst(atom_exec_context *ctx, int arg, uint8_t attr, 429 int *ptr, uint32_t *saved, int print) 430 { 431 return atom_get_src_int(ctx, 432 arg | atom_dst_to_src[(attr >> 3) & 433 7][(attr >> 6) & 3] << 3, 434 ptr, saved, print); 435 } 436 437 static void atom_skip_dst(atom_exec_context *ctx, int arg, uint8_t attr, int *ptr) 438 { 439 atom_skip_src_int(ctx, 440 arg | atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 441 3] << 3, ptr); 442 } 443 444 static void atom_put_dst(atom_exec_context *ctx, int arg, uint8_t attr, 445 int *ptr, uint32_t val, uint32_t saved) 446 { 447 uint32_t align = 448 atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3], old_val = 449 val, idx; 450 struct atom_context *gctx = ctx->ctx; 451 old_val &= atom_arg_mask[align] >> atom_arg_shift[align]; 452 val <<= atom_arg_shift[align]; 453 val &= atom_arg_mask[align]; 454 saved &= ~atom_arg_mask[align]; 455 val |= saved; 456 switch (arg) { 457 case ATOM_ARG_REG: 458 idx = U16(*ptr); 459 (*ptr) += 2; 460 ATOM_DEBUG_PRINT("REG[0x%04X]", idx); 461 idx += gctx->reg_block; 462 switch (gctx->io_mode) { 463 case ATOM_IO_MM: 464 if (idx == 0) 465 gctx->card->reg_write(gctx->card, idx, 466 val << 2); 467 else 468 gctx->card->reg_write(gctx->card, idx, val); 469 break; 470 case ATOM_IO_PCI: 471 DRM_INFO( 472 "PCI registers are not implemented.\n"); 473 return; 474 case ATOM_IO_SYSIO: 475 DRM_INFO( 476 "SYSIO registers are not implemented.\n"); 477 return; 478 default: 479 if (!(gctx->io_mode & 0x80)) { 480 DRM_INFO("Bad IO mode.\n"); 481 return; 482 } 483 if (!gctx->iio[gctx->io_mode & 0xFF]) { 484 DRM_INFO( 485 "Undefined indirect IO write method %d.\n", 486 gctx->io_mode & 0x7F); 487 return; 488 } 489 atom_iio_execute(gctx, gctx->iio[gctx->io_mode & 0xFF], 490 idx, val); 491 } 492 break; 493 case ATOM_ARG_PS: 494 idx = U8(*ptr); 495 (*ptr)++; 496 ATOM_DEBUG_PRINT("PS[0x%02X]", idx); 497 ctx->ps[idx] = cpu_to_le32(val); 498 break; 499 case ATOM_ARG_WS: 500 idx = U8(*ptr); 501 (*ptr)++; 502 ATOM_DEBUG_PRINT("WS[0x%02X]", idx); 503 switch (idx) { 504 case ATOM_WS_QUOTIENT: 505 gctx->divmul[0] = val; 506 break; 507 case ATOM_WS_REMAINDER: 508 gctx->divmul[1] = val; 509 break; 510 case ATOM_WS_DATAPTR: 511 gctx->data_block = val; 512 break; 513 case ATOM_WS_SHIFT: 514 gctx->shift = val; 515 break; 516 case ATOM_WS_OR_MASK: 517 case ATOM_WS_AND_MASK: 518 break; 519 case ATOM_WS_FB_WINDOW: 520 gctx->fb_base = val; 521 break; 522 case ATOM_WS_ATTRIBUTES: 523 gctx->io_attr = val; 524 break; 525 case ATOM_WS_REGPTR: 526 gctx->reg_block = val; 527 break; 528 default: 529 ctx->ws[idx] = val; 530 } 531 break; 532 case ATOM_ARG_FB: 533 idx = U8(*ptr); 534 (*ptr)++; 535 if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) { 536 DRM_ERROR("ATOM: fb write beyond scratch region: %d vs. %d\n", 537 gctx->fb_base + (idx * 4), gctx->scratch_size_bytes); 538 } else 539 gctx->scratch[(gctx->fb_base / 4) + idx] = val; 540 ATOM_DEBUG_PRINT("FB[0x%02X]", idx); 541 break; 542 case ATOM_ARG_PLL: 543 idx = U8(*ptr); 544 (*ptr)++; 545 ATOM_DEBUG_PRINT("PLL[0x%02X]", idx); 546 gctx->card->pll_write(gctx->card, idx, val); 547 break; 548 case ATOM_ARG_MC: 549 idx = U8(*ptr); 550 (*ptr)++; 551 ATOM_DEBUG_PRINT("MC[0x%02X]", idx); 552 gctx->card->mc_write(gctx->card, idx, val); 553 return; 554 } 555 switch (align) { 556 case ATOM_SRC_DWORD: 557 ATOM_DEBUG_PRINT(".[31:0] <- 0x%08X\n", old_val); 558 break; 559 case ATOM_SRC_WORD0: 560 ATOM_DEBUG_PRINT(".[15:0] <- 0x%04X\n", old_val); 561 break; 562 case ATOM_SRC_WORD8: 563 ATOM_DEBUG_PRINT(".[23:8] <- 0x%04X\n", old_val); 564 break; 565 case ATOM_SRC_WORD16: 566 ATOM_DEBUG_PRINT(".[31:16] <- 0x%04X\n", old_val); 567 break; 568 case ATOM_SRC_BYTE0: 569 ATOM_DEBUG_PRINT(".[7:0] <- 0x%02X\n", old_val); 570 break; 571 case ATOM_SRC_BYTE8: 572 ATOM_DEBUG_PRINT(".[15:8] <- 0x%02X\n", old_val); 573 break; 574 case ATOM_SRC_BYTE16: 575 ATOM_DEBUG_PRINT(".[23:16] <- 0x%02X\n", old_val); 576 break; 577 case ATOM_SRC_BYTE24: 578 ATOM_DEBUG_PRINT(".[31:24] <- 0x%02X\n", old_val); 579 break; 580 } 581 } 582 583 static void atom_op_add(atom_exec_context *ctx, int *ptr, int arg) 584 { 585 uint8_t attr = U8((*ptr)++); 586 uint32_t dst, src, saved; 587 int dptr = *ptr; 588 ATOM_SDEBUG_PRINT(" dst: "); 589 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); 590 ATOM_SDEBUG_PRINT(" src: "); 591 src = atom_get_src(ctx, attr, ptr); 592 dst += src; 593 ATOM_SDEBUG_PRINT(" dst: "); 594 atom_put_dst(ctx, arg, attr, &dptr, dst, saved); 595 } 596 597 static void atom_op_and(atom_exec_context *ctx, int *ptr, int arg) 598 { 599 uint8_t attr = U8((*ptr)++); 600 uint32_t dst, src, saved; 601 int dptr = *ptr; 602 ATOM_SDEBUG_PRINT(" dst: "); 603 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); 604 ATOM_SDEBUG_PRINT(" src: "); 605 src = atom_get_src(ctx, attr, ptr); 606 dst &= src; 607 ATOM_SDEBUG_PRINT(" dst: "); 608 atom_put_dst(ctx, arg, attr, &dptr, dst, saved); 609 } 610 611 static void atom_op_beep(atom_exec_context *ctx, int *ptr, int arg) 612 { 613 DRM_INFO("ATOM BIOS beeped!\n"); 614 } 615 616 static void atom_op_calltable(atom_exec_context *ctx, int *ptr, int arg) 617 { 618 int idx = U8((*ptr)++); 619 int r = 0; 620 621 if (idx < ATOM_TABLE_NAMES_CNT) 622 ATOM_SDEBUG_PRINT(" table: %d (%s)\n", idx, atom_table_names[idx]); 623 else 624 ATOM_SDEBUG_PRINT(" table: %d\n", idx); 625 if (U16(ctx->ctx->cmd_table + 4 + 2 * idx)) 626 r = atom_execute_table_locked(ctx->ctx, idx, ctx->ps + ctx->ps_shift); 627 if (r) { 628 ctx->abort = true; 629 } 630 } 631 632 static void atom_op_clear(atom_exec_context *ctx, int *ptr, int arg) 633 { 634 uint8_t attr = U8((*ptr)++); 635 uint32_t saved; 636 int dptr = *ptr; 637 attr &= 0x38; 638 attr |= atom_def_dst[attr >> 3] << 6; 639 atom_get_dst(ctx, arg, attr, ptr, &saved, 0); 640 ATOM_SDEBUG_PRINT(" dst: "); 641 atom_put_dst(ctx, arg, attr, &dptr, 0, saved); 642 } 643 644 static void atom_op_compare(atom_exec_context *ctx, int *ptr, int arg) 645 { 646 uint8_t attr = U8((*ptr)++); 647 uint32_t dst, src; 648 ATOM_SDEBUG_PRINT(" src1: "); 649 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1); 650 ATOM_SDEBUG_PRINT(" src2: "); 651 src = atom_get_src(ctx, attr, ptr); 652 ctx->ctx->cs_equal = (dst == src); 653 ctx->ctx->cs_above = (dst > src); 654 ATOM_SDEBUG_PRINT(" result: %s %s\n", ctx->ctx->cs_equal ? "EQ" : "NE", 655 ctx->ctx->cs_above ? "GT" : "LE"); 656 } 657 658 static void atom_op_delay(atom_exec_context *ctx, int *ptr, int arg) 659 { 660 unsigned count = U8((*ptr)++); 661 ATOM_SDEBUG_PRINT(" count: %d\n", count); 662 if (arg == ATOM_UNIT_MICROSEC) 663 DRM_UDELAY(count); 664 else if (!drm_can_sleep()) 665 DRM_MDELAY(count); 666 else 667 DRM_MSLEEP(count); 668 } 669 670 static void atom_op_div(atom_exec_context *ctx, int *ptr, int arg) 671 { 672 uint8_t attr = U8((*ptr)++); 673 uint32_t dst, src; 674 ATOM_SDEBUG_PRINT(" src1: "); 675 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1); 676 ATOM_SDEBUG_PRINT(" src2: "); 677 src = atom_get_src(ctx, attr, ptr); 678 if (src != 0) { 679 ctx->ctx->divmul[0] = dst / src; 680 ctx->ctx->divmul[1] = dst % src; 681 } else { 682 ctx->ctx->divmul[0] = 0; 683 ctx->ctx->divmul[1] = 0; 684 } 685 } 686 687 static void atom_op_eot(atom_exec_context *ctx, int *ptr, int arg) 688 { 689 /* functionally, a nop */ 690 } 691 692 static void atom_op_jump(atom_exec_context *ctx, int *ptr, int arg) 693 { 694 int execute = 0, target = U16(*ptr); 695 unsigned long cjiffies; 696 697 (*ptr) += 2; 698 switch (arg) { 699 case ATOM_COND_ABOVE: 700 execute = ctx->ctx->cs_above; 701 break; 702 case ATOM_COND_ABOVEOREQUAL: 703 execute = ctx->ctx->cs_above || ctx->ctx->cs_equal; 704 break; 705 case ATOM_COND_ALWAYS: 706 execute = 1; 707 break; 708 case ATOM_COND_BELOW: 709 execute = !(ctx->ctx->cs_above || ctx->ctx->cs_equal); 710 break; 711 case ATOM_COND_BELOWOREQUAL: 712 execute = !ctx->ctx->cs_above; 713 break; 714 case ATOM_COND_EQUAL: 715 execute = ctx->ctx->cs_equal; 716 break; 717 case ATOM_COND_NOTEQUAL: 718 execute = !ctx->ctx->cs_equal; 719 break; 720 } 721 if (arg != ATOM_COND_ALWAYS) 722 ATOM_SDEBUG_PRINT(" taken: %s\n", execute ? "yes" : "no"); 723 ATOM_SDEBUG_PRINT(" target: 0x%04X\n", target); 724 if (execute) { 725 if (ctx->last_jump == (ctx->start + target)) { 726 cjiffies = jiffies; 727 if (time_after(cjiffies, ctx->last_jump_jiffies)) { 728 cjiffies -= ctx->last_jump_jiffies; 729 if ((jiffies_to_msecs(cjiffies) > 5000)) { 730 DRM_ERROR("atombios stuck in loop for more than 5secs aborting\n"); 731 ctx->abort = true; 732 } 733 } else { 734 /* jiffies wrap around we will just wait a little longer */ 735 ctx->last_jump_jiffies = jiffies; 736 } 737 } else { 738 ctx->last_jump = ctx->start + target; 739 ctx->last_jump_jiffies = jiffies; 740 } 741 *ptr = ctx->start + target; 742 } 743 } 744 745 static void atom_op_mask(atom_exec_context *ctx, int *ptr, int arg) 746 { 747 uint8_t attr = U8((*ptr)++); 748 uint32_t dst, mask, src, saved; 749 int dptr = *ptr; 750 ATOM_SDEBUG_PRINT(" dst: "); 751 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); 752 mask = atom_get_src_direct(ctx, ((attr >> 3) & 7), ptr); 753 ATOM_SDEBUG_PRINT(" mask: 0x%08x", mask); 754 ATOM_SDEBUG_PRINT(" src: "); 755 src = atom_get_src(ctx, attr, ptr); 756 dst &= mask; 757 dst |= src; 758 ATOM_SDEBUG_PRINT(" dst: "); 759 atom_put_dst(ctx, arg, attr, &dptr, dst, saved); 760 } 761 762 static void atom_op_move(atom_exec_context *ctx, int *ptr, int arg) 763 { 764 uint8_t attr = U8((*ptr)++); 765 uint32_t src, saved; 766 int dptr = *ptr; 767 if (((attr >> 3) & 7) != ATOM_SRC_DWORD) 768 atom_get_dst(ctx, arg, attr, ptr, &saved, 0); 769 else { 770 atom_skip_dst(ctx, arg, attr, ptr); 771 saved = 0xCDCDCDCD; 772 } 773 ATOM_SDEBUG_PRINT(" src: "); 774 src = atom_get_src(ctx, attr, ptr); 775 ATOM_SDEBUG_PRINT(" dst: "); 776 atom_put_dst(ctx, arg, attr, &dptr, src, saved); 777 } 778 779 static void atom_op_mul(atom_exec_context *ctx, int *ptr, int arg) 780 { 781 uint8_t attr = U8((*ptr)++); 782 uint32_t dst, src; 783 ATOM_SDEBUG_PRINT(" src1: "); 784 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1); 785 ATOM_SDEBUG_PRINT(" src2: "); 786 src = atom_get_src(ctx, attr, ptr); 787 ctx->ctx->divmul[0] = dst * src; 788 } 789 790 static void atom_op_nop(atom_exec_context *ctx, int *ptr, int arg) 791 { 792 /* nothing */ 793 } 794 795 static void atom_op_or(atom_exec_context *ctx, int *ptr, int arg) 796 { 797 uint8_t attr = U8((*ptr)++); 798 uint32_t dst, src, saved; 799 int dptr = *ptr; 800 ATOM_SDEBUG_PRINT(" dst: "); 801 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); 802 ATOM_SDEBUG_PRINT(" src: "); 803 src = atom_get_src(ctx, attr, ptr); 804 dst |= src; 805 ATOM_SDEBUG_PRINT(" dst: "); 806 atom_put_dst(ctx, arg, attr, &dptr, dst, saved); 807 } 808 809 static void atom_op_postcard(atom_exec_context *ctx, int *ptr, int arg) 810 { 811 uint8_t val = U8((*ptr)++); 812 ATOM_SDEBUG_PRINT("POST card output: 0x%02X\n", val); 813 } 814 815 static void atom_op_repeat(atom_exec_context *ctx, int *ptr, int arg) 816 { 817 DRM_INFO("unimplemented!\n"); 818 } 819 820 static void atom_op_restorereg(atom_exec_context *ctx, int *ptr, int arg) 821 { 822 DRM_INFO("unimplemented!\n"); 823 } 824 825 static void atom_op_savereg(atom_exec_context *ctx, int *ptr, int arg) 826 { 827 DRM_INFO("unimplemented!\n"); 828 } 829 830 static void atom_op_setdatablock(atom_exec_context *ctx, int *ptr, int arg) 831 { 832 int idx = U8(*ptr); 833 (*ptr)++; 834 ATOM_SDEBUG_PRINT(" block: %d\n", idx); 835 if (!idx) 836 ctx->ctx->data_block = 0; 837 else if (idx == 255) 838 ctx->ctx->data_block = ctx->start; 839 else 840 ctx->ctx->data_block = U16(ctx->ctx->data_table + 4 + 2 * idx); 841 ATOM_SDEBUG_PRINT(" base: 0x%04X\n", ctx->ctx->data_block); 842 } 843 844 static void atom_op_setfbbase(atom_exec_context *ctx, int *ptr, int arg) 845 { 846 uint8_t attr = U8((*ptr)++); 847 ATOM_SDEBUG_PRINT(" fb_base: "); 848 ctx->ctx->fb_base = atom_get_src(ctx, attr, ptr); 849 } 850 851 static void atom_op_setport(atom_exec_context *ctx, int *ptr, int arg) 852 { 853 int port; 854 switch (arg) { 855 case ATOM_PORT_ATI: 856 port = U16(*ptr); 857 if (port < ATOM_IO_NAMES_CNT) 858 ATOM_SDEBUG_PRINT(" port: %d (%s)\n", port, atom_io_names[port]); 859 else 860 ATOM_SDEBUG_PRINT(" port: %d\n", port); 861 if (!port) 862 ctx->ctx->io_mode = ATOM_IO_MM; 863 else 864 ctx->ctx->io_mode = ATOM_IO_IIO | port; 865 (*ptr) += 2; 866 break; 867 case ATOM_PORT_PCI: 868 ctx->ctx->io_mode = ATOM_IO_PCI; 869 (*ptr)++; 870 break; 871 case ATOM_PORT_SYSIO: 872 ctx->ctx->io_mode = ATOM_IO_SYSIO; 873 (*ptr)++; 874 break; 875 } 876 } 877 878 static void atom_op_setregblock(atom_exec_context *ctx, int *ptr, int arg) 879 { 880 ctx->ctx->reg_block = U16(*ptr); 881 (*ptr) += 2; 882 ATOM_SDEBUG_PRINT(" base: 0x%04X\n", ctx->ctx->reg_block); 883 } 884 885 static void atom_op_shift_left(atom_exec_context *ctx, int *ptr, int arg) 886 { 887 uint8_t attr = U8((*ptr)++), shift; 888 uint32_t saved, dst; 889 int dptr = *ptr; 890 attr &= 0x38; 891 attr |= atom_def_dst[attr >> 3] << 6; 892 ATOM_SDEBUG_PRINT(" dst: "); 893 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); 894 shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr); 895 ATOM_SDEBUG_PRINT(" shift: %d\n", shift); 896 dst <<= shift; 897 ATOM_SDEBUG_PRINT(" dst: "); 898 atom_put_dst(ctx, arg, attr, &dptr, dst, saved); 899 } 900 901 static void atom_op_shift_right(atom_exec_context *ctx, int *ptr, int arg) 902 { 903 uint8_t attr = U8((*ptr)++), shift; 904 uint32_t saved, dst; 905 int dptr = *ptr; 906 attr &= 0x38; 907 attr |= atom_def_dst[attr >> 3] << 6; 908 ATOM_SDEBUG_PRINT(" dst: "); 909 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); 910 shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr); 911 ATOM_SDEBUG_PRINT(" shift: %d\n", shift); 912 dst >>= shift; 913 ATOM_SDEBUG_PRINT(" dst: "); 914 atom_put_dst(ctx, arg, attr, &dptr, dst, saved); 915 } 916 917 static void atom_op_shl(atom_exec_context *ctx, int *ptr, int arg) 918 { 919 uint8_t attr = U8((*ptr)++), shift; 920 uint32_t saved, dst; 921 int dptr = *ptr; 922 uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3]; 923 ATOM_SDEBUG_PRINT(" dst: "); 924 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); 925 /* op needs to full dst value */ 926 dst = saved; 927 shift = atom_get_src(ctx, attr, ptr); 928 ATOM_SDEBUG_PRINT(" shift: %d\n", shift); 929 dst <<= shift; 930 dst &= atom_arg_mask[dst_align]; 931 dst >>= atom_arg_shift[dst_align]; 932 ATOM_SDEBUG_PRINT(" dst: "); 933 atom_put_dst(ctx, arg, attr, &dptr, dst, saved); 934 } 935 936 static void atom_op_shr(atom_exec_context *ctx, int *ptr, int arg) 937 { 938 uint8_t attr = U8((*ptr)++), shift; 939 uint32_t saved, dst; 940 int dptr = *ptr; 941 uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3]; 942 ATOM_SDEBUG_PRINT(" dst: "); 943 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); 944 /* op needs to full dst value */ 945 dst = saved; 946 shift = atom_get_src(ctx, attr, ptr); 947 ATOM_SDEBUG_PRINT(" shift: %d\n", shift); 948 dst >>= shift; 949 dst &= atom_arg_mask[dst_align]; 950 dst >>= atom_arg_shift[dst_align]; 951 ATOM_SDEBUG_PRINT(" dst: "); 952 atom_put_dst(ctx, arg, attr, &dptr, dst, saved); 953 } 954 955 static void atom_op_sub(atom_exec_context *ctx, int *ptr, int arg) 956 { 957 uint8_t attr = U8((*ptr)++); 958 uint32_t dst, src, saved; 959 int dptr = *ptr; 960 ATOM_SDEBUG_PRINT(" dst: "); 961 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); 962 ATOM_SDEBUG_PRINT(" src: "); 963 src = atom_get_src(ctx, attr, ptr); 964 dst -= src; 965 ATOM_SDEBUG_PRINT(" dst: "); 966 atom_put_dst(ctx, arg, attr, &dptr, dst, saved); 967 } 968 969 static void atom_op_switch(atom_exec_context *ctx, int *ptr, int arg) 970 { 971 uint8_t attr = U8((*ptr)++); 972 uint32_t src, val, target; 973 ATOM_SDEBUG_PRINT(" switch: "); 974 src = atom_get_src(ctx, attr, ptr); 975 while (U16(*ptr) != ATOM_CASE_END) 976 if (U8(*ptr) == ATOM_CASE_MAGIC) { 977 (*ptr)++; 978 ATOM_SDEBUG_PRINT(" case: "); 979 val = 980 atom_get_src(ctx, (attr & 0x38) | ATOM_ARG_IMM, 981 ptr); 982 target = U16(*ptr); 983 if (val == src) { 984 ATOM_SDEBUG_PRINT(" target: %04X\n", target); 985 *ptr = ctx->start + target; 986 return; 987 } 988 (*ptr) += 2; 989 } else { 990 DRM_INFO("Bad case.\n"); 991 return; 992 } 993 (*ptr) += 2; 994 } 995 996 static void atom_op_test(atom_exec_context *ctx, int *ptr, int arg) 997 { 998 uint8_t attr = U8((*ptr)++); 999 uint32_t dst, src; 1000 ATOM_SDEBUG_PRINT(" src1: "); 1001 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1); 1002 ATOM_SDEBUG_PRINT(" src2: "); 1003 src = atom_get_src(ctx, attr, ptr); 1004 ctx->ctx->cs_equal = ((dst & src) == 0); 1005 ATOM_SDEBUG_PRINT(" result: %s\n", ctx->ctx->cs_equal ? "EQ" : "NE"); 1006 } 1007 1008 static void atom_op_xor(atom_exec_context *ctx, int *ptr, int arg) 1009 { 1010 uint8_t attr = U8((*ptr)++); 1011 uint32_t dst, src, saved; 1012 int dptr = *ptr; 1013 ATOM_SDEBUG_PRINT(" dst: "); 1014 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); 1015 ATOM_SDEBUG_PRINT(" src: "); 1016 src = atom_get_src(ctx, attr, ptr); 1017 dst ^= src; 1018 ATOM_SDEBUG_PRINT(" dst: "); 1019 atom_put_dst(ctx, arg, attr, &dptr, dst, saved); 1020 } 1021 1022 static void atom_op_debug(atom_exec_context *ctx, int *ptr, int arg) 1023 { 1024 DRM_INFO("unimplemented!\n"); 1025 } 1026 1027 static struct { 1028 void (*func) (atom_exec_context *, int *, int); 1029 int arg; 1030 } opcode_table[ATOM_OP_CNT] = { 1031 { 1032 NULL, 0}, { 1033 atom_op_move, ATOM_ARG_REG}, { 1034 atom_op_move, ATOM_ARG_PS}, { 1035 atom_op_move, ATOM_ARG_WS}, { 1036 atom_op_move, ATOM_ARG_FB}, { 1037 atom_op_move, ATOM_ARG_PLL}, { 1038 atom_op_move, ATOM_ARG_MC}, { 1039 atom_op_and, ATOM_ARG_REG}, { 1040 atom_op_and, ATOM_ARG_PS}, { 1041 atom_op_and, ATOM_ARG_WS}, { 1042 atom_op_and, ATOM_ARG_FB}, { 1043 atom_op_and, ATOM_ARG_PLL}, { 1044 atom_op_and, ATOM_ARG_MC}, { 1045 atom_op_or, ATOM_ARG_REG}, { 1046 atom_op_or, ATOM_ARG_PS}, { 1047 atom_op_or, ATOM_ARG_WS}, { 1048 atom_op_or, ATOM_ARG_FB}, { 1049 atom_op_or, ATOM_ARG_PLL}, { 1050 atom_op_or, ATOM_ARG_MC}, { 1051 atom_op_shift_left, ATOM_ARG_REG}, { 1052 atom_op_shift_left, ATOM_ARG_PS}, { 1053 atom_op_shift_left, ATOM_ARG_WS}, { 1054 atom_op_shift_left, ATOM_ARG_FB}, { 1055 atom_op_shift_left, ATOM_ARG_PLL}, { 1056 atom_op_shift_left, ATOM_ARG_MC}, { 1057 atom_op_shift_right, ATOM_ARG_REG}, { 1058 atom_op_shift_right, ATOM_ARG_PS}, { 1059 atom_op_shift_right, ATOM_ARG_WS}, { 1060 atom_op_shift_right, ATOM_ARG_FB}, { 1061 atom_op_shift_right, ATOM_ARG_PLL}, { 1062 atom_op_shift_right, ATOM_ARG_MC}, { 1063 atom_op_mul, ATOM_ARG_REG}, { 1064 atom_op_mul, ATOM_ARG_PS}, { 1065 atom_op_mul, ATOM_ARG_WS}, { 1066 atom_op_mul, ATOM_ARG_FB}, { 1067 atom_op_mul, ATOM_ARG_PLL}, { 1068 atom_op_mul, ATOM_ARG_MC}, { 1069 atom_op_div, ATOM_ARG_REG}, { 1070 atom_op_div, ATOM_ARG_PS}, { 1071 atom_op_div, ATOM_ARG_WS}, { 1072 atom_op_div, ATOM_ARG_FB}, { 1073 atom_op_div, ATOM_ARG_PLL}, { 1074 atom_op_div, ATOM_ARG_MC}, { 1075 atom_op_add, ATOM_ARG_REG}, { 1076 atom_op_add, ATOM_ARG_PS}, { 1077 atom_op_add, ATOM_ARG_WS}, { 1078 atom_op_add, ATOM_ARG_FB}, { 1079 atom_op_add, ATOM_ARG_PLL}, { 1080 atom_op_add, ATOM_ARG_MC}, { 1081 atom_op_sub, ATOM_ARG_REG}, { 1082 atom_op_sub, ATOM_ARG_PS}, { 1083 atom_op_sub, ATOM_ARG_WS}, { 1084 atom_op_sub, ATOM_ARG_FB}, { 1085 atom_op_sub, ATOM_ARG_PLL}, { 1086 atom_op_sub, ATOM_ARG_MC}, { 1087 atom_op_setport, ATOM_PORT_ATI}, { 1088 atom_op_setport, ATOM_PORT_PCI}, { 1089 atom_op_setport, ATOM_PORT_SYSIO}, { 1090 atom_op_setregblock, 0}, { 1091 atom_op_setfbbase, 0}, { 1092 atom_op_compare, ATOM_ARG_REG}, { 1093 atom_op_compare, ATOM_ARG_PS}, { 1094 atom_op_compare, ATOM_ARG_WS}, { 1095 atom_op_compare, ATOM_ARG_FB}, { 1096 atom_op_compare, ATOM_ARG_PLL}, { 1097 atom_op_compare, ATOM_ARG_MC}, { 1098 atom_op_switch, 0}, { 1099 atom_op_jump, ATOM_COND_ALWAYS}, { 1100 atom_op_jump, ATOM_COND_EQUAL}, { 1101 atom_op_jump, ATOM_COND_BELOW}, { 1102 atom_op_jump, ATOM_COND_ABOVE}, { 1103 atom_op_jump, ATOM_COND_BELOWOREQUAL}, { 1104 atom_op_jump, ATOM_COND_ABOVEOREQUAL}, { 1105 atom_op_jump, ATOM_COND_NOTEQUAL}, { 1106 atom_op_test, ATOM_ARG_REG}, { 1107 atom_op_test, ATOM_ARG_PS}, { 1108 atom_op_test, ATOM_ARG_WS}, { 1109 atom_op_test, ATOM_ARG_FB}, { 1110 atom_op_test, ATOM_ARG_PLL}, { 1111 atom_op_test, ATOM_ARG_MC}, { 1112 atom_op_delay, ATOM_UNIT_MILLISEC}, { 1113 atom_op_delay, ATOM_UNIT_MICROSEC}, { 1114 atom_op_calltable, 0}, { 1115 atom_op_repeat, 0}, { 1116 atom_op_clear, ATOM_ARG_REG}, { 1117 atom_op_clear, ATOM_ARG_PS}, { 1118 atom_op_clear, ATOM_ARG_WS}, { 1119 atom_op_clear, ATOM_ARG_FB}, { 1120 atom_op_clear, ATOM_ARG_PLL}, { 1121 atom_op_clear, ATOM_ARG_MC}, { 1122 atom_op_nop, 0}, { 1123 atom_op_eot, 0}, { 1124 atom_op_mask, ATOM_ARG_REG}, { 1125 atom_op_mask, ATOM_ARG_PS}, { 1126 atom_op_mask, ATOM_ARG_WS}, { 1127 atom_op_mask, ATOM_ARG_FB}, { 1128 atom_op_mask, ATOM_ARG_PLL}, { 1129 atom_op_mask, ATOM_ARG_MC}, { 1130 atom_op_postcard, 0}, { 1131 atom_op_beep, 0}, { 1132 atom_op_savereg, 0}, { 1133 atom_op_restorereg, 0}, { 1134 atom_op_setdatablock, 0}, { 1135 atom_op_xor, ATOM_ARG_REG}, { 1136 atom_op_xor, ATOM_ARG_PS}, { 1137 atom_op_xor, ATOM_ARG_WS}, { 1138 atom_op_xor, ATOM_ARG_FB}, { 1139 atom_op_xor, ATOM_ARG_PLL}, { 1140 atom_op_xor, ATOM_ARG_MC}, { 1141 atom_op_shl, ATOM_ARG_REG}, { 1142 atom_op_shl, ATOM_ARG_PS}, { 1143 atom_op_shl, ATOM_ARG_WS}, { 1144 atom_op_shl, ATOM_ARG_FB}, { 1145 atom_op_shl, ATOM_ARG_PLL}, { 1146 atom_op_shl, ATOM_ARG_MC}, { 1147 atom_op_shr, ATOM_ARG_REG}, { 1148 atom_op_shr, ATOM_ARG_PS}, { 1149 atom_op_shr, ATOM_ARG_WS}, { 1150 atom_op_shr, ATOM_ARG_FB}, { 1151 atom_op_shr, ATOM_ARG_PLL}, { 1152 atom_op_shr, ATOM_ARG_MC}, { 1153 atom_op_debug, 0},}; 1154 1155 static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params) 1156 { 1157 int base = CU16(ctx->cmd_table + 4 + 2 * index); 1158 int len, ws, ps, ptr; 1159 unsigned char op; 1160 atom_exec_context ectx; 1161 int ret = 0; 1162 1163 if (!base) 1164 return -EINVAL; 1165 1166 len = CU16(base + ATOM_CT_SIZE_PTR); 1167 ws = CU8(base + ATOM_CT_WS_PTR); 1168 ps = CU8(base + ATOM_CT_PS_PTR) & ATOM_CT_PS_MASK; 1169 ptr = base + ATOM_CT_CODE_PTR; 1170 1171 ATOM_SDEBUG_PRINT(">> execute %04X (len %d, WS %d, PS %d)\n", base, len, ws, ps); 1172 1173 ectx.ctx = ctx; 1174 ectx.ps_shift = ps / 4; 1175 ectx.start = base; 1176 ectx.ps = params; 1177 ectx.abort = false; 1178 ectx.last_jump = 0; 1179 if (ws) 1180 ectx.ws = kmalloc(4 * ws, DRM_MEM_DRIVER, M_ZERO | M_WAITOK); 1181 else 1182 ectx.ws = NULL; 1183 1184 debug_depth++; 1185 while (1) { 1186 op = CU8(ptr++); 1187 if (op < ATOM_OP_NAMES_CNT) 1188 ATOM_SDEBUG_PRINT("%s @ 0x%04X\n", atom_op_names[op], ptr - 1); 1189 else 1190 ATOM_SDEBUG_PRINT("[%d] @ 0x%04X\n", op, ptr - 1); 1191 if (ectx.abort) { 1192 DRM_ERROR("atombios stuck executing %04X (len %d, WS %d, PS %d) @ 0x%04X\n", 1193 base, len, ws, ps, ptr - 1); 1194 ret = -EINVAL; 1195 goto free; 1196 } 1197 1198 if (op < ATOM_OP_CNT && op > 0) 1199 opcode_table[op].func(&ectx, &ptr, 1200 opcode_table[op].arg); 1201 else 1202 break; 1203 1204 if (op == ATOM_OP_EOT) 1205 break; 1206 } 1207 debug_depth--; 1208 ATOM_SDEBUG_PRINT("<<\n"); 1209 1210 free: 1211 if (ws) 1212 drm_free(ectx.ws, DRM_MEM_DRIVER); 1213 return ret; 1214 } 1215 1216 int atom_execute_table(struct atom_context *ctx, int index, uint32_t * params) 1217 { 1218 int r; 1219 1220 lockmgr(&ctx->mutex, LK_EXCLUSIVE); 1221 /* reset reg block */ 1222 ctx->reg_block = 0; 1223 /* reset fb window */ 1224 ctx->fb_base = 0; 1225 /* reset io mode */ 1226 ctx->io_mode = ATOM_IO_MM; 1227 r = atom_execute_table_locked(ctx, index, params); 1228 lockmgr(&ctx->mutex, LK_RELEASE); 1229 return r; 1230 } 1231 1232 static int atom_iio_len[] = { 1, 2, 3, 3, 3, 3, 4, 4, 4, 3 }; 1233 1234 static void atom_index_iio(struct atom_context *ctx, int base) 1235 { 1236 ctx->iio = kmalloc(2 * 256, DRM_MEM_DRIVER, M_ZERO | M_WAITOK); 1237 while (CU8(base) == ATOM_IIO_START) { 1238 ctx->iio[CU8(base + 1)] = base + 2; 1239 base += 2; 1240 while (CU8(base) != ATOM_IIO_END) 1241 base += atom_iio_len[CU8(base)]; 1242 base += 3; 1243 } 1244 } 1245 1246 struct atom_context *atom_parse(struct card_info *card, void *bios) 1247 { 1248 int base; 1249 struct atom_context *ctx = 1250 kmalloc(sizeof(struct atom_context), DRM_MEM_DRIVER, 1251 M_ZERO | M_WAITOK); 1252 char *str; 1253 char name[512]; 1254 int i; 1255 1256 if (!ctx) 1257 return NULL; 1258 1259 ctx->card = card; 1260 ctx->bios = bios; 1261 1262 if (CU16(0) != ATOM_BIOS_MAGIC) { 1263 DRM_INFO("Invalid BIOS magic.\n"); 1264 drm_free(ctx, DRM_MEM_DRIVER); 1265 return NULL; 1266 } 1267 if (strncmp 1268 (CSTR(ATOM_ATI_MAGIC_PTR), ATOM_ATI_MAGIC, 1269 strlen(ATOM_ATI_MAGIC))) { 1270 DRM_INFO("Invalid ATI magic.\n"); 1271 drm_free(ctx, DRM_MEM_DRIVER); 1272 return NULL; 1273 } 1274 1275 base = CU16(ATOM_ROM_TABLE_PTR); 1276 if (strncmp 1277 (CSTR(base + ATOM_ROM_MAGIC_PTR), ATOM_ROM_MAGIC, 1278 strlen(ATOM_ROM_MAGIC))) { 1279 DRM_INFO("Invalid ATOM magic.\n"); 1280 drm_free(ctx, DRM_MEM_DRIVER); 1281 return NULL; 1282 } 1283 1284 ctx->cmd_table = CU16(base + ATOM_ROM_CMD_PTR); 1285 ctx->data_table = CU16(base + ATOM_ROM_DATA_PTR); 1286 atom_index_iio(ctx, CU16(ctx->data_table + ATOM_DATA_IIO_PTR) + 4); 1287 1288 str = CSTR(CU16(base + ATOM_ROM_MSG_PTR)); 1289 while (*str && ((*str == '\n') || (*str == '\r'))) 1290 str++; 1291 /* name string isn't always 0 terminated */ 1292 for (i = 0; i < 511; i++) { 1293 name[i] = str[i]; 1294 if (name[i] < '.' || name[i] > 'z') { 1295 name[i] = 0; 1296 break; 1297 } 1298 } 1299 DRM_INFO("ATOM BIOS: %s\n", name); 1300 1301 return ctx; 1302 } 1303 1304 int atom_asic_init(struct atom_context *ctx) 1305 { 1306 struct radeon_device *rdev = ctx->card->dev->dev_private; 1307 int hwi = CU16(ctx->data_table + ATOM_DATA_FWI_PTR); 1308 uint32_t ps[16]; 1309 int ret; 1310 1311 memset(ps, 0, 64); 1312 1313 ps[0] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFSCLK_PTR)); 1314 ps[1] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFMCLK_PTR)); 1315 if (!ps[0] || !ps[1]) 1316 return 1; 1317 1318 if (!CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_INIT)) 1319 return 1; 1320 ret = atom_execute_table(ctx, ATOM_CMD_INIT, ps); 1321 if (ret) 1322 return ret; 1323 1324 memset(ps, 0, 64); 1325 1326 if (rdev->family < CHIP_R600) { 1327 if (CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_SPDFANCNTL)) 1328 atom_execute_table(ctx, ATOM_CMD_SPDFANCNTL, ps); 1329 } 1330 return ret; 1331 } 1332 1333 void atom_destroy(struct atom_context *ctx) 1334 { 1335 if (ctx->iio) 1336 drm_free(ctx->iio, DRM_MEM_DRIVER); 1337 drm_free(ctx, DRM_MEM_DRIVER); 1338 } 1339 1340 bool atom_parse_data_header(struct atom_context *ctx, int index, 1341 uint16_t * size, uint8_t * frev, uint8_t * crev, 1342 uint16_t * data_start) 1343 { 1344 int offset = index * 2 + 4; 1345 int idx = CU16(ctx->data_table + offset); 1346 u16 *mdt = (u16 *)((char *)ctx->bios + ctx->data_table + 4); 1347 1348 if (!mdt[index]) 1349 return false; 1350 1351 if (size) 1352 *size = CU16(idx); 1353 if (frev) 1354 *frev = CU8(idx + 2); 1355 if (crev) 1356 *crev = CU8(idx + 3); 1357 *data_start = idx; 1358 return true; 1359 } 1360 1361 bool atom_parse_cmd_header(struct atom_context *ctx, int index, uint8_t * frev, 1362 uint8_t * crev) 1363 { 1364 int offset = index * 2 + 4; 1365 int idx = CU16(ctx->cmd_table + offset); 1366 u16 *mct = (u16 *)((char *)ctx->bios + ctx->cmd_table + 4); 1367 1368 if (!mct[index]) 1369 return false; 1370 1371 if (frev) 1372 *frev = CU8(idx + 2); 1373 if (crev) 1374 *crev = CU8(idx + 3); 1375 return true; 1376 } 1377 1378 int atom_allocate_fb_scratch(struct atom_context *ctx) 1379 { 1380 int index = GetIndexIntoMasterTable(DATA, VRAM_UsageByFirmware); 1381 uint16_t data_offset; 1382 int usage_bytes = 0; 1383 struct _ATOM_VRAM_USAGE_BY_FIRMWARE *firmware_usage; 1384 1385 if (atom_parse_data_header(ctx, index, NULL, NULL, NULL, &data_offset)) { 1386 firmware_usage = (struct _ATOM_VRAM_USAGE_BY_FIRMWARE *)((char *)ctx->bios + data_offset); 1387 1388 DRM_DEBUG("atom firmware requested %08x %dkb\n", 1389 firmware_usage->asFirmwareVramReserveInfo[0].ulStartAddrUsedByFirmware, 1390 firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb); 1391 1392 usage_bytes = firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb * 1024; 1393 } 1394 ctx->scratch_size_bytes = 0; 1395 if (usage_bytes == 0) 1396 usage_bytes = 20 * 1024; 1397 /* allocate some scratch memory */ 1398 ctx->scratch = kmalloc(usage_bytes, DRM_MEM_DRIVER, M_ZERO | M_WAITOK); 1399 if (!ctx->scratch) 1400 return -ENOMEM; 1401 ctx->scratch_size_bytes = usage_bytes; 1402 return 0; 1403 } 1404