1 /* 2 * Copyright 2008 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Author: Stanislaw Skowronek 23 */ 24 25 #include <linux/module.h> 26 #include <linux/sched.h> 27 #include <asm/unaligned.h> 28 29 #define ATOM_DEBUG 30 31 #include "atom.h" 32 #include "atom-names.h" 33 #include "atom-bits.h" 34 #include "radeon.h" 35 #include <linux/delay.h> 36 37 #define ATOM_COND_ABOVE 0 38 #define ATOM_COND_ABOVEOREQUAL 1 39 #define ATOM_COND_ALWAYS 2 40 #define ATOM_COND_BELOW 3 41 #define ATOM_COND_BELOWOREQUAL 4 42 #define ATOM_COND_EQUAL 5 43 #define ATOM_COND_NOTEQUAL 6 44 45 #define ATOM_PORT_ATI 0 46 #define ATOM_PORT_PCI 1 47 #define ATOM_PORT_SYSIO 2 48 49 #define ATOM_UNIT_MICROSEC 0 50 #define ATOM_UNIT_MILLISEC 1 51 52 #define PLL_INDEX 2 53 #define PLL_DATA 3 54 55 typedef struct { 56 struct atom_context *ctx; 57 uint32_t *ps, *ws; 58 int ps_shift; 59 uint16_t start; 60 unsigned last_jump; 61 unsigned long last_jump_jiffies; 62 bool abort; 63 } atom_exec_context; 64 65 int atom_debug = 0; 66 static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params); 67 68 static uint32_t atom_arg_mask[8] = 69 { 0xFFFFFFFF, 0xFFFF, 0xFFFF00, 0xFFFF0000, 0xFF, 0xFF00, 0xFF0000, 70 0xFF000000 }; 71 static int atom_arg_shift[8] = { 0, 0, 8, 16, 0, 8, 16, 24 }; 72 73 static int atom_dst_to_src[8][4] = { 74 /* translate destination alignment field to the source alignment encoding */ 75 {0, 0, 0, 0}, 76 {1, 2, 3, 0}, 77 {1, 2, 3, 0}, 78 {1, 2, 3, 0}, 79 {4, 5, 6, 7}, 80 {4, 5, 6, 7}, 81 {4, 5, 6, 7}, 82 {4, 5, 6, 7}, 83 }; 84 static int atom_def_dst[8] = { 0, 0, 1, 2, 0, 1, 2, 3 }; 85 86 static int debug_depth = 0; 87 #ifdef ATOM_DEBUG 88 static void debug_print_spaces(int n) 89 { 90 while (n--) 91 kprintf(" "); 92 } 93 94 #define ATOM_DEBUG_PRINT(...) do if (atom_debug) { kprintf(__FILE__ __VA_ARGS__); } while (0) 95 #define ATOM_SDEBUG_PRINT(...) do if (atom_debug) { kprintf(__FILE__); debug_print_spaces(debug_depth); kprintf(__VA_ARGS__); } while (0) 96 #else 97 #define ATOM_DEBUG_PRINT(...) do { } while (0) 98 #define ATOM_SDEBUG_PRINT(...) do { } while (0) 99 #endif 100 101 static uint32_t atom_iio_execute(struct atom_context *ctx, int base, 102 uint32_t index, uint32_t data) 103 { 104 struct radeon_device *rdev = ctx->card->dev->dev_private; 105 uint32_t temp = 0xCDCDCDCD; 106 107 while (1) 108 switch (CU8(base)) { 109 case ATOM_IIO_NOP: 110 base++; 111 break; 112 case ATOM_IIO_READ: 113 temp = ctx->card->ioreg_read(ctx->card, CU16(base + 1)); 114 base += 3; 115 break; 116 case ATOM_IIO_WRITE: 117 if (rdev->family == CHIP_RV515) 118 (void)ctx->card->ioreg_read(ctx->card, CU16(base + 1)); 119 ctx->card->ioreg_write(ctx->card, CU16(base + 1), temp); 120 base += 3; 121 break; 122 case ATOM_IIO_CLEAR: 123 temp &= 124 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) << 125 CU8(base + 2)); 126 base += 3; 127 break; 128 case ATOM_IIO_SET: 129 temp |= 130 (0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base + 131 2); 132 base += 3; 133 break; 134 case ATOM_IIO_MOVE_INDEX: 135 temp &= 136 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) << 137 CU8(base + 3)); 138 temp |= 139 ((index >> CU8(base + 2)) & 140 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base + 141 3); 142 base += 4; 143 break; 144 case ATOM_IIO_MOVE_DATA: 145 temp &= 146 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) << 147 CU8(base + 3)); 148 temp |= 149 ((data >> CU8(base + 2)) & 150 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base + 151 3); 152 base += 4; 153 break; 154 case ATOM_IIO_MOVE_ATTR: 155 temp &= 156 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) << 157 CU8(base + 3)); 158 temp |= 159 ((ctx-> 160 io_attr >> CU8(base + 2)) & (0xFFFFFFFF >> (32 - 161 CU8 162 (base 163 + 164 1)))) 165 << CU8(base + 3); 166 base += 4; 167 break; 168 case ATOM_IIO_END: 169 return temp; 170 default: 171 DRM_INFO("Unknown IIO opcode.\n"); 172 return 0; 173 } 174 } 175 176 static uint32_t atom_get_src_int(atom_exec_context *ctx, uint8_t attr, 177 int *ptr, uint32_t *saved, int print) 178 { 179 uint32_t idx, val = 0xCDCDCDCD, align, arg; 180 struct atom_context *gctx = ctx->ctx; 181 arg = attr & 7; 182 align = (attr >> 3) & 7; 183 184 if (saved) 185 *saved = 0; /* avoid bogus gcc warning */ 186 187 switch (arg) { 188 case ATOM_ARG_REG: 189 idx = U16(*ptr); 190 (*ptr) += 2; 191 if (print) 192 ATOM_DEBUG_PRINT("REG[0x%04X]", idx); 193 idx += gctx->reg_block; 194 switch (gctx->io_mode) { 195 case ATOM_IO_MM: 196 val = gctx->card->reg_read(gctx->card, idx); 197 break; 198 case ATOM_IO_PCI: 199 DRM_INFO( 200 "PCI registers are not implemented.\n"); 201 return 0; 202 case ATOM_IO_SYSIO: 203 DRM_INFO( 204 "SYSIO registers are not implemented.\n"); 205 return 0; 206 default: 207 if (!(gctx->io_mode & 0x80)) { 208 DRM_INFO("Bad IO mode.\n"); 209 return 0; 210 } 211 if (!gctx->iio[gctx->io_mode & 0x7F]) { 212 DRM_INFO( 213 "Undefined indirect IO read method %d.\n", 214 gctx->io_mode & 0x7F); 215 return 0; 216 } 217 val = 218 atom_iio_execute(gctx, 219 gctx->iio[gctx->io_mode & 0x7F], 220 idx, 0); 221 } 222 break; 223 case ATOM_ARG_PS: 224 idx = U8(*ptr); 225 (*ptr)++; 226 /* get_unaligned_le32 avoids unaligned accesses from atombios 227 * tables, noticed on a DEC Alpha. */ 228 val = get_unaligned_le32((u32 *)&ctx->ps[idx]); 229 if (print) 230 ATOM_DEBUG_PRINT("PS[0x%02X,0x%04X]", idx, val); 231 break; 232 case ATOM_ARG_WS: 233 idx = U8(*ptr); 234 (*ptr)++; 235 if (print) 236 ATOM_DEBUG_PRINT("WS[0x%02X]", idx); 237 switch (idx) { 238 case ATOM_WS_QUOTIENT: 239 val = gctx->divmul[0]; 240 break; 241 case ATOM_WS_REMAINDER: 242 val = gctx->divmul[1]; 243 break; 244 case ATOM_WS_DATAPTR: 245 val = gctx->data_block; 246 break; 247 case ATOM_WS_SHIFT: 248 val = gctx->shift; 249 break; 250 case ATOM_WS_OR_MASK: 251 val = 1 << gctx->shift; 252 break; 253 case ATOM_WS_AND_MASK: 254 val = ~(1 << gctx->shift); 255 break; 256 case ATOM_WS_FB_WINDOW: 257 val = gctx->fb_base; 258 break; 259 case ATOM_WS_ATTRIBUTES: 260 val = gctx->io_attr; 261 break; 262 case ATOM_WS_REGPTR: 263 val = gctx->reg_block; 264 break; 265 default: 266 val = ctx->ws[idx]; 267 } 268 break; 269 case ATOM_ARG_ID: 270 idx = U16(*ptr); 271 (*ptr) += 2; 272 if (print) { 273 if (gctx->data_block) 274 ATOM_DEBUG_PRINT("ID[0x%04X+%04X]", idx, gctx->data_block); 275 else 276 ATOM_DEBUG_PRINT("ID[0x%04X]", idx); 277 } 278 val = U32(idx + gctx->data_block); 279 break; 280 case ATOM_ARG_FB: 281 idx = U8(*ptr); 282 (*ptr)++; 283 if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) { 284 DRM_ERROR("ATOM: fb read beyond scratch region: %d vs. %d\n", 285 gctx->fb_base + (idx * 4), gctx->scratch_size_bytes); 286 val = 0; 287 } else 288 val = gctx->scratch[(gctx->fb_base / 4) + idx]; 289 if (print) 290 ATOM_DEBUG_PRINT("FB[0x%02X]", idx); 291 break; 292 case ATOM_ARG_IMM: 293 switch (align) { 294 case ATOM_SRC_DWORD: 295 val = U32(*ptr); 296 (*ptr) += 4; 297 if (print) 298 ATOM_DEBUG_PRINT("IMM 0x%08X\n", val); 299 return val; 300 case ATOM_SRC_WORD0: 301 case ATOM_SRC_WORD8: 302 case ATOM_SRC_WORD16: 303 val = U16(*ptr); 304 (*ptr) += 2; 305 if (print) 306 ATOM_DEBUG_PRINT("IMM 0x%04X\n", val); 307 return val; 308 case ATOM_SRC_BYTE0: 309 case ATOM_SRC_BYTE8: 310 case ATOM_SRC_BYTE16: 311 case ATOM_SRC_BYTE24: 312 val = U8(*ptr); 313 (*ptr)++; 314 if (print) 315 ATOM_DEBUG_PRINT("IMM 0x%02X\n", val); 316 return val; 317 } 318 return 0; 319 case ATOM_ARG_PLL: 320 idx = U8(*ptr); 321 (*ptr)++; 322 if (print) 323 ATOM_DEBUG_PRINT("PLL[0x%02X]", idx); 324 val = gctx->card->pll_read(gctx->card, idx); 325 break; 326 case ATOM_ARG_MC: 327 idx = U8(*ptr); 328 (*ptr)++; 329 if (print) 330 ATOM_DEBUG_PRINT("MC[0x%02X]", idx); 331 val = gctx->card->mc_read(gctx->card, idx); 332 break; 333 } 334 if (saved) 335 *saved = val; 336 val &= atom_arg_mask[align]; 337 val >>= atom_arg_shift[align]; 338 if (print) 339 switch (align) { 340 case ATOM_SRC_DWORD: 341 ATOM_DEBUG_PRINT(".[31:0] -> 0x%08X\n", val); 342 break; 343 case ATOM_SRC_WORD0: 344 ATOM_DEBUG_PRINT(".[15:0] -> 0x%04X\n", val); 345 break; 346 case ATOM_SRC_WORD8: 347 ATOM_DEBUG_PRINT(".[23:8] -> 0x%04X\n", val); 348 break; 349 case ATOM_SRC_WORD16: 350 ATOM_DEBUG_PRINT(".[31:16] -> 0x%04X\n", val); 351 break; 352 case ATOM_SRC_BYTE0: 353 ATOM_DEBUG_PRINT(".[7:0] -> 0x%02X\n", val); 354 break; 355 case ATOM_SRC_BYTE8: 356 ATOM_DEBUG_PRINT(".[15:8] -> 0x%02X\n", val); 357 break; 358 case ATOM_SRC_BYTE16: 359 ATOM_DEBUG_PRINT(".[23:16] -> 0x%02X\n", val); 360 break; 361 case ATOM_SRC_BYTE24: 362 ATOM_DEBUG_PRINT(".[31:24] -> 0x%02X\n", val); 363 break; 364 } 365 return val; 366 } 367 368 static void atom_skip_src_int(atom_exec_context *ctx, uint8_t attr, int *ptr) 369 { 370 uint32_t align = (attr >> 3) & 7, arg = attr & 7; 371 switch (arg) { 372 case ATOM_ARG_REG: 373 case ATOM_ARG_ID: 374 (*ptr) += 2; 375 break; 376 case ATOM_ARG_PLL: 377 case ATOM_ARG_MC: 378 case ATOM_ARG_PS: 379 case ATOM_ARG_WS: 380 case ATOM_ARG_FB: 381 (*ptr)++; 382 break; 383 case ATOM_ARG_IMM: 384 switch (align) { 385 case ATOM_SRC_DWORD: 386 (*ptr) += 4; 387 return; 388 case ATOM_SRC_WORD0: 389 case ATOM_SRC_WORD8: 390 case ATOM_SRC_WORD16: 391 (*ptr) += 2; 392 return; 393 case ATOM_SRC_BYTE0: 394 case ATOM_SRC_BYTE8: 395 case ATOM_SRC_BYTE16: 396 case ATOM_SRC_BYTE24: 397 (*ptr)++; 398 return; 399 } 400 return; 401 } 402 } 403 404 static uint32_t atom_get_src(atom_exec_context *ctx, uint8_t attr, int *ptr) 405 { 406 return atom_get_src_int(ctx, attr, ptr, NULL, 1); 407 } 408 409 static uint32_t atom_get_src_direct(atom_exec_context *ctx, uint8_t align, int *ptr) 410 { 411 uint32_t val = 0xCDCDCDCD; 412 413 switch (align) { 414 case ATOM_SRC_DWORD: 415 val = U32(*ptr); 416 (*ptr) += 4; 417 break; 418 case ATOM_SRC_WORD0: 419 case ATOM_SRC_WORD8: 420 case ATOM_SRC_WORD16: 421 val = U16(*ptr); 422 (*ptr) += 2; 423 break; 424 case ATOM_SRC_BYTE0: 425 case ATOM_SRC_BYTE8: 426 case ATOM_SRC_BYTE16: 427 case ATOM_SRC_BYTE24: 428 val = U8(*ptr); 429 (*ptr)++; 430 break; 431 } 432 return val; 433 } 434 435 static uint32_t atom_get_dst(atom_exec_context *ctx, int arg, uint8_t attr, 436 int *ptr, uint32_t *saved, int print) 437 { 438 return atom_get_src_int(ctx, 439 arg | atom_dst_to_src[(attr >> 3) & 440 7][(attr >> 6) & 3] << 3, 441 ptr, saved, print); 442 } 443 444 static void atom_skip_dst(atom_exec_context *ctx, int arg, uint8_t attr, int *ptr) 445 { 446 atom_skip_src_int(ctx, 447 arg | atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 448 3] << 3, ptr); 449 } 450 451 static void atom_put_dst(atom_exec_context *ctx, int arg, uint8_t attr, 452 int *ptr, uint32_t val, uint32_t saved) 453 { 454 uint32_t align = 455 atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3], old_val = 456 val, idx; 457 struct atom_context *gctx = ctx->ctx; 458 old_val &= atom_arg_mask[align] >> atom_arg_shift[align]; 459 val <<= atom_arg_shift[align]; 460 val &= atom_arg_mask[align]; 461 saved &= ~atom_arg_mask[align]; 462 val |= saved; 463 switch (arg) { 464 case ATOM_ARG_REG: 465 idx = U16(*ptr); 466 (*ptr) += 2; 467 ATOM_DEBUG_PRINT("REG[0x%04X]", idx); 468 idx += gctx->reg_block; 469 switch (gctx->io_mode) { 470 case ATOM_IO_MM: 471 if (idx == 0) 472 gctx->card->reg_write(gctx->card, idx, 473 val << 2); 474 else 475 gctx->card->reg_write(gctx->card, idx, val); 476 break; 477 case ATOM_IO_PCI: 478 DRM_INFO( 479 "PCI registers are not implemented.\n"); 480 return; 481 case ATOM_IO_SYSIO: 482 DRM_INFO( 483 "SYSIO registers are not implemented.\n"); 484 return; 485 default: 486 if (!(gctx->io_mode & 0x80)) { 487 DRM_INFO("Bad IO mode.\n"); 488 return; 489 } 490 if (!gctx->iio[gctx->io_mode & 0xFF]) { 491 DRM_INFO( 492 "Undefined indirect IO write method %d.\n", 493 gctx->io_mode & 0x7F); 494 return; 495 } 496 atom_iio_execute(gctx, gctx->iio[gctx->io_mode & 0xFF], 497 idx, val); 498 } 499 break; 500 case ATOM_ARG_PS: 501 idx = U8(*ptr); 502 (*ptr)++; 503 ATOM_DEBUG_PRINT("PS[0x%02X]", idx); 504 ctx->ps[idx] = cpu_to_le32(val); 505 break; 506 case ATOM_ARG_WS: 507 idx = U8(*ptr); 508 (*ptr)++; 509 ATOM_DEBUG_PRINT("WS[0x%02X]", idx); 510 switch (idx) { 511 case ATOM_WS_QUOTIENT: 512 gctx->divmul[0] = val; 513 break; 514 case ATOM_WS_REMAINDER: 515 gctx->divmul[1] = val; 516 break; 517 case ATOM_WS_DATAPTR: 518 gctx->data_block = val; 519 break; 520 case ATOM_WS_SHIFT: 521 gctx->shift = val; 522 break; 523 case ATOM_WS_OR_MASK: 524 case ATOM_WS_AND_MASK: 525 break; 526 case ATOM_WS_FB_WINDOW: 527 gctx->fb_base = val; 528 break; 529 case ATOM_WS_ATTRIBUTES: 530 gctx->io_attr = val; 531 break; 532 case ATOM_WS_REGPTR: 533 gctx->reg_block = val; 534 break; 535 default: 536 ctx->ws[idx] = val; 537 } 538 break; 539 case ATOM_ARG_FB: 540 idx = U8(*ptr); 541 (*ptr)++; 542 if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) { 543 DRM_ERROR("ATOM: fb write beyond scratch region: %d vs. %d\n", 544 gctx->fb_base + (idx * 4), gctx->scratch_size_bytes); 545 } else 546 gctx->scratch[(gctx->fb_base / 4) + idx] = val; 547 ATOM_DEBUG_PRINT("FB[0x%02X]", idx); 548 break; 549 case ATOM_ARG_PLL: 550 idx = U8(*ptr); 551 (*ptr)++; 552 ATOM_DEBUG_PRINT("PLL[0x%02X]", idx); 553 gctx->card->pll_write(gctx->card, idx, val); 554 break; 555 case ATOM_ARG_MC: 556 idx = U8(*ptr); 557 (*ptr)++; 558 ATOM_DEBUG_PRINT("MC[0x%02X]", idx); 559 gctx->card->mc_write(gctx->card, idx, val); 560 return; 561 } 562 switch (align) { 563 case ATOM_SRC_DWORD: 564 ATOM_DEBUG_PRINT(".[31:0] <- 0x%08X\n", old_val); 565 break; 566 case ATOM_SRC_WORD0: 567 ATOM_DEBUG_PRINT(".[15:0] <- 0x%04X\n", old_val); 568 break; 569 case ATOM_SRC_WORD8: 570 ATOM_DEBUG_PRINT(".[23:8] <- 0x%04X\n", old_val); 571 break; 572 case ATOM_SRC_WORD16: 573 ATOM_DEBUG_PRINT(".[31:16] <- 0x%04X\n", old_val); 574 break; 575 case ATOM_SRC_BYTE0: 576 ATOM_DEBUG_PRINT(".[7:0] <- 0x%02X\n", old_val); 577 break; 578 case ATOM_SRC_BYTE8: 579 ATOM_DEBUG_PRINT(".[15:8] <- 0x%02X\n", old_val); 580 break; 581 case ATOM_SRC_BYTE16: 582 ATOM_DEBUG_PRINT(".[23:16] <- 0x%02X\n", old_val); 583 break; 584 case ATOM_SRC_BYTE24: 585 ATOM_DEBUG_PRINT(".[31:24] <- 0x%02X\n", old_val); 586 break; 587 } 588 } 589 590 static void atom_op_add(atom_exec_context *ctx, int *ptr, int arg) 591 { 592 uint8_t attr = U8((*ptr)++); 593 uint32_t dst, src, saved; 594 int dptr = *ptr; 595 ATOM_SDEBUG_PRINT(" dst: "); 596 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); 597 ATOM_SDEBUG_PRINT(" src: "); 598 src = atom_get_src(ctx, attr, ptr); 599 dst += src; 600 ATOM_SDEBUG_PRINT(" dst: "); 601 atom_put_dst(ctx, arg, attr, &dptr, dst, saved); 602 } 603 604 static void atom_op_and(atom_exec_context *ctx, int *ptr, int arg) 605 { 606 uint8_t attr = U8((*ptr)++); 607 uint32_t dst, src, saved; 608 int dptr = *ptr; 609 ATOM_SDEBUG_PRINT(" dst: "); 610 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); 611 ATOM_SDEBUG_PRINT(" src: "); 612 src = atom_get_src(ctx, attr, ptr); 613 dst &= src; 614 ATOM_SDEBUG_PRINT(" dst: "); 615 atom_put_dst(ctx, arg, attr, &dptr, dst, saved); 616 } 617 618 static void atom_op_beep(atom_exec_context *ctx, int *ptr, int arg) 619 { 620 DRM_INFO("ATOM BIOS beeped!\n"); 621 } 622 623 static void atom_op_calltable(atom_exec_context *ctx, int *ptr, int arg) 624 { 625 int idx = U8((*ptr)++); 626 int r = 0; 627 628 if (idx < ATOM_TABLE_NAMES_CNT) 629 ATOM_SDEBUG_PRINT(" table: %d (%s)\n", idx, atom_table_names[idx]); 630 else 631 ATOM_SDEBUG_PRINT(" table: %d\n", idx); 632 if (U16(ctx->ctx->cmd_table + 4 + 2 * idx)) 633 r = atom_execute_table_locked(ctx->ctx, idx, ctx->ps + ctx->ps_shift); 634 if (r) { 635 ctx->abort = true; 636 } 637 } 638 639 static void atom_op_clear(atom_exec_context *ctx, int *ptr, int arg) 640 { 641 uint8_t attr = U8((*ptr)++); 642 uint32_t saved; 643 int dptr = *ptr; 644 attr &= 0x38; 645 attr |= atom_def_dst[attr >> 3] << 6; 646 atom_get_dst(ctx, arg, attr, ptr, &saved, 0); 647 ATOM_SDEBUG_PRINT(" dst: "); 648 atom_put_dst(ctx, arg, attr, &dptr, 0, saved); 649 } 650 651 static void atom_op_compare(atom_exec_context *ctx, int *ptr, int arg) 652 { 653 uint8_t attr = U8((*ptr)++); 654 uint32_t dst, src; 655 ATOM_SDEBUG_PRINT(" src1: "); 656 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1); 657 ATOM_SDEBUG_PRINT(" src2: "); 658 src = atom_get_src(ctx, attr, ptr); 659 ctx->ctx->cs_equal = (dst == src); 660 ctx->ctx->cs_above = (dst > src); 661 ATOM_SDEBUG_PRINT(" result: %s %s\n", ctx->ctx->cs_equal ? "EQ" : "NE", 662 ctx->ctx->cs_above ? "GT" : "LE"); 663 } 664 665 static void atom_op_delay(atom_exec_context *ctx, int *ptr, int arg) 666 { 667 unsigned count = U8((*ptr)++); 668 ATOM_SDEBUG_PRINT(" count: %d\n", count); 669 if (arg == ATOM_UNIT_MICROSEC) 670 udelay(count); 671 else if (!drm_can_sleep()) 672 mdelay(count); 673 else 674 msleep(count); 675 } 676 677 static void atom_op_div(atom_exec_context *ctx, int *ptr, int arg) 678 { 679 uint8_t attr = U8((*ptr)++); 680 uint32_t dst, src; 681 ATOM_SDEBUG_PRINT(" src1: "); 682 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1); 683 ATOM_SDEBUG_PRINT(" src2: "); 684 src = atom_get_src(ctx, attr, ptr); 685 if (src != 0) { 686 ctx->ctx->divmul[0] = dst / src; 687 ctx->ctx->divmul[1] = dst % src; 688 } else { 689 ctx->ctx->divmul[0] = 0; 690 ctx->ctx->divmul[1] = 0; 691 } 692 } 693 694 static void atom_op_eot(atom_exec_context *ctx, int *ptr, int arg) 695 { 696 /* functionally, a nop */ 697 } 698 699 static void atom_op_jump(atom_exec_context *ctx, int *ptr, int arg) 700 { 701 int execute = 0, target = U16(*ptr); 702 unsigned long cjiffies; 703 704 (*ptr) += 2; 705 switch (arg) { 706 case ATOM_COND_ABOVE: 707 execute = ctx->ctx->cs_above; 708 break; 709 case ATOM_COND_ABOVEOREQUAL: 710 execute = ctx->ctx->cs_above || ctx->ctx->cs_equal; 711 break; 712 case ATOM_COND_ALWAYS: 713 execute = 1; 714 break; 715 case ATOM_COND_BELOW: 716 execute = !(ctx->ctx->cs_above || ctx->ctx->cs_equal); 717 break; 718 case ATOM_COND_BELOWOREQUAL: 719 execute = !ctx->ctx->cs_above; 720 break; 721 case ATOM_COND_EQUAL: 722 execute = ctx->ctx->cs_equal; 723 break; 724 case ATOM_COND_NOTEQUAL: 725 execute = !ctx->ctx->cs_equal; 726 break; 727 } 728 if (arg != ATOM_COND_ALWAYS) 729 ATOM_SDEBUG_PRINT(" taken: %s\n", execute ? "yes" : "no"); 730 ATOM_SDEBUG_PRINT(" target: 0x%04X\n", target); 731 if (execute) { 732 if (ctx->last_jump == (ctx->start + target)) { 733 cjiffies = jiffies; 734 if (time_after(cjiffies, ctx->last_jump_jiffies)) { 735 cjiffies -= ctx->last_jump_jiffies; 736 if ((jiffies_to_msecs(cjiffies) > 5000)) { 737 DRM_ERROR("atombios stuck in loop for more than 5secs aborting\n"); 738 ctx->abort = true; 739 } 740 } else { 741 /* jiffies wrap around we will just wait a little longer */ 742 ctx->last_jump_jiffies = jiffies; 743 } 744 } else { 745 ctx->last_jump = ctx->start + target; 746 ctx->last_jump_jiffies = jiffies; 747 } 748 *ptr = ctx->start + target; 749 } 750 } 751 752 static void atom_op_mask(atom_exec_context *ctx, int *ptr, int arg) 753 { 754 uint8_t attr = U8((*ptr)++); 755 uint32_t dst, mask, src, saved; 756 int dptr = *ptr; 757 ATOM_SDEBUG_PRINT(" dst: "); 758 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); 759 mask = atom_get_src_direct(ctx, ((attr >> 3) & 7), ptr); 760 ATOM_SDEBUG_PRINT(" mask: 0x%08x", mask); 761 ATOM_SDEBUG_PRINT(" src: "); 762 src = atom_get_src(ctx, attr, ptr); 763 dst &= mask; 764 dst |= src; 765 ATOM_SDEBUG_PRINT(" dst: "); 766 atom_put_dst(ctx, arg, attr, &dptr, dst, saved); 767 } 768 769 static void atom_op_move(atom_exec_context *ctx, int *ptr, int arg) 770 { 771 uint8_t attr = U8((*ptr)++); 772 uint32_t src, saved; 773 int dptr = *ptr; 774 if (((attr >> 3) & 7) != ATOM_SRC_DWORD) 775 atom_get_dst(ctx, arg, attr, ptr, &saved, 0); 776 else { 777 atom_skip_dst(ctx, arg, attr, ptr); 778 saved = 0xCDCDCDCD; 779 } 780 ATOM_SDEBUG_PRINT(" src: "); 781 src = atom_get_src(ctx, attr, ptr); 782 ATOM_SDEBUG_PRINT(" dst: "); 783 atom_put_dst(ctx, arg, attr, &dptr, src, saved); 784 } 785 786 static void atom_op_mul(atom_exec_context *ctx, int *ptr, int arg) 787 { 788 uint8_t attr = U8((*ptr)++); 789 uint32_t dst, src; 790 ATOM_SDEBUG_PRINT(" src1: "); 791 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1); 792 ATOM_SDEBUG_PRINT(" src2: "); 793 src = atom_get_src(ctx, attr, ptr); 794 ctx->ctx->divmul[0] = dst * src; 795 } 796 797 static void atom_op_nop(atom_exec_context *ctx, int *ptr, int arg) 798 { 799 /* nothing */ 800 } 801 802 static void atom_op_or(atom_exec_context *ctx, int *ptr, int arg) 803 { 804 uint8_t attr = U8((*ptr)++); 805 uint32_t dst, src, saved; 806 int dptr = *ptr; 807 ATOM_SDEBUG_PRINT(" dst: "); 808 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); 809 ATOM_SDEBUG_PRINT(" src: "); 810 src = atom_get_src(ctx, attr, ptr); 811 dst |= src; 812 ATOM_SDEBUG_PRINT(" dst: "); 813 atom_put_dst(ctx, arg, attr, &dptr, dst, saved); 814 } 815 816 static void atom_op_postcard(atom_exec_context *ctx, int *ptr, int arg) 817 { 818 uint8_t val = U8((*ptr)++); 819 ATOM_SDEBUG_PRINT("POST card output: 0x%02X\n", val); 820 } 821 822 static void atom_op_repeat(atom_exec_context *ctx, int *ptr, int arg) 823 { 824 DRM_INFO("unimplemented!\n"); 825 } 826 827 static void atom_op_restorereg(atom_exec_context *ctx, int *ptr, int arg) 828 { 829 DRM_INFO("unimplemented!\n"); 830 } 831 832 static void atom_op_savereg(atom_exec_context *ctx, int *ptr, int arg) 833 { 834 DRM_INFO("unimplemented!\n"); 835 } 836 837 static void atom_op_setdatablock(atom_exec_context *ctx, int *ptr, int arg) 838 { 839 int idx = U8(*ptr); 840 (*ptr)++; 841 ATOM_SDEBUG_PRINT(" block: %d\n", idx); 842 if (!idx) 843 ctx->ctx->data_block = 0; 844 else if (idx == 255) 845 ctx->ctx->data_block = ctx->start; 846 else 847 ctx->ctx->data_block = U16(ctx->ctx->data_table + 4 + 2 * idx); 848 ATOM_SDEBUG_PRINT(" base: 0x%04X\n", ctx->ctx->data_block); 849 } 850 851 static void atom_op_setfbbase(atom_exec_context *ctx, int *ptr, int arg) 852 { 853 uint8_t attr = U8((*ptr)++); 854 ATOM_SDEBUG_PRINT(" fb_base: "); 855 ctx->ctx->fb_base = atom_get_src(ctx, attr, ptr); 856 } 857 858 static void atom_op_setport(atom_exec_context *ctx, int *ptr, int arg) 859 { 860 int port; 861 switch (arg) { 862 case ATOM_PORT_ATI: 863 port = U16(*ptr); 864 if (port < ATOM_IO_NAMES_CNT) 865 ATOM_SDEBUG_PRINT(" port: %d (%s)\n", port, atom_io_names[port]); 866 else 867 ATOM_SDEBUG_PRINT(" port: %d\n", port); 868 if (!port) 869 ctx->ctx->io_mode = ATOM_IO_MM; 870 else 871 ctx->ctx->io_mode = ATOM_IO_IIO | port; 872 (*ptr) += 2; 873 break; 874 case ATOM_PORT_PCI: 875 ctx->ctx->io_mode = ATOM_IO_PCI; 876 (*ptr)++; 877 break; 878 case ATOM_PORT_SYSIO: 879 ctx->ctx->io_mode = ATOM_IO_SYSIO; 880 (*ptr)++; 881 break; 882 } 883 } 884 885 static void atom_op_setregblock(atom_exec_context *ctx, int *ptr, int arg) 886 { 887 ctx->ctx->reg_block = U16(*ptr); 888 (*ptr) += 2; 889 ATOM_SDEBUG_PRINT(" base: 0x%04X\n", ctx->ctx->reg_block); 890 } 891 892 static void atom_op_shift_left(atom_exec_context *ctx, int *ptr, int arg) 893 { 894 uint8_t attr = U8((*ptr)++), shift; 895 uint32_t saved, dst; 896 int dptr = *ptr; 897 attr &= 0x38; 898 attr |= atom_def_dst[attr >> 3] << 6; 899 ATOM_SDEBUG_PRINT(" dst: "); 900 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); 901 shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr); 902 ATOM_SDEBUG_PRINT(" shift: %d\n", shift); 903 dst <<= shift; 904 ATOM_SDEBUG_PRINT(" dst: "); 905 atom_put_dst(ctx, arg, attr, &dptr, dst, saved); 906 } 907 908 static void atom_op_shift_right(atom_exec_context *ctx, int *ptr, int arg) 909 { 910 uint8_t attr = U8((*ptr)++), shift; 911 uint32_t saved, dst; 912 int dptr = *ptr; 913 attr &= 0x38; 914 attr |= atom_def_dst[attr >> 3] << 6; 915 ATOM_SDEBUG_PRINT(" dst: "); 916 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); 917 shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr); 918 ATOM_SDEBUG_PRINT(" shift: %d\n", shift); 919 dst >>= shift; 920 ATOM_SDEBUG_PRINT(" dst: "); 921 atom_put_dst(ctx, arg, attr, &dptr, dst, saved); 922 } 923 924 static void atom_op_shl(atom_exec_context *ctx, int *ptr, int arg) 925 { 926 uint8_t attr = U8((*ptr)++), shift; 927 uint32_t saved, dst; 928 int dptr = *ptr; 929 uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3]; 930 ATOM_SDEBUG_PRINT(" dst: "); 931 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); 932 /* op needs to full dst value */ 933 dst = saved; 934 shift = atom_get_src(ctx, attr, ptr); 935 ATOM_SDEBUG_PRINT(" shift: %d\n", shift); 936 dst <<= shift; 937 dst &= atom_arg_mask[dst_align]; 938 dst >>= atom_arg_shift[dst_align]; 939 ATOM_SDEBUG_PRINT(" dst: "); 940 atom_put_dst(ctx, arg, attr, &dptr, dst, saved); 941 } 942 943 static void atom_op_shr(atom_exec_context *ctx, int *ptr, int arg) 944 { 945 uint8_t attr = U8((*ptr)++), shift; 946 uint32_t saved, dst; 947 int dptr = *ptr; 948 uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3]; 949 ATOM_SDEBUG_PRINT(" dst: "); 950 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); 951 /* op needs to full dst value */ 952 dst = saved; 953 shift = atom_get_src(ctx, attr, ptr); 954 ATOM_SDEBUG_PRINT(" shift: %d\n", shift); 955 dst >>= shift; 956 dst &= atom_arg_mask[dst_align]; 957 dst >>= atom_arg_shift[dst_align]; 958 ATOM_SDEBUG_PRINT(" dst: "); 959 atom_put_dst(ctx, arg, attr, &dptr, dst, saved); 960 } 961 962 static void atom_op_sub(atom_exec_context *ctx, int *ptr, int arg) 963 { 964 uint8_t attr = U8((*ptr)++); 965 uint32_t dst, src, saved; 966 int dptr = *ptr; 967 ATOM_SDEBUG_PRINT(" dst: "); 968 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); 969 ATOM_SDEBUG_PRINT(" src: "); 970 src = atom_get_src(ctx, attr, ptr); 971 dst -= src; 972 ATOM_SDEBUG_PRINT(" dst: "); 973 atom_put_dst(ctx, arg, attr, &dptr, dst, saved); 974 } 975 976 static void atom_op_switch(atom_exec_context *ctx, int *ptr, int arg) 977 { 978 uint8_t attr = U8((*ptr)++); 979 uint32_t src, val, target; 980 ATOM_SDEBUG_PRINT(" switch: "); 981 src = atom_get_src(ctx, attr, ptr); 982 while (U16(*ptr) != ATOM_CASE_END) 983 if (U8(*ptr) == ATOM_CASE_MAGIC) { 984 (*ptr)++; 985 ATOM_SDEBUG_PRINT(" case: "); 986 val = 987 atom_get_src(ctx, (attr & 0x38) | ATOM_ARG_IMM, 988 ptr); 989 target = U16(*ptr); 990 if (val == src) { 991 ATOM_SDEBUG_PRINT(" target: %04X\n", target); 992 *ptr = ctx->start + target; 993 return; 994 } 995 (*ptr) += 2; 996 } else { 997 DRM_INFO("Bad case.\n"); 998 return; 999 } 1000 (*ptr) += 2; 1001 } 1002 1003 static void atom_op_test(atom_exec_context *ctx, int *ptr, int arg) 1004 { 1005 uint8_t attr = U8((*ptr)++); 1006 uint32_t dst, src; 1007 ATOM_SDEBUG_PRINT(" src1: "); 1008 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1); 1009 ATOM_SDEBUG_PRINT(" src2: "); 1010 src = atom_get_src(ctx, attr, ptr); 1011 ctx->ctx->cs_equal = ((dst & src) == 0); 1012 ATOM_SDEBUG_PRINT(" result: %s\n", ctx->ctx->cs_equal ? "EQ" : "NE"); 1013 } 1014 1015 static void atom_op_xor(atom_exec_context *ctx, int *ptr, int arg) 1016 { 1017 uint8_t attr = U8((*ptr)++); 1018 uint32_t dst, src, saved; 1019 int dptr = *ptr; 1020 ATOM_SDEBUG_PRINT(" dst: "); 1021 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); 1022 ATOM_SDEBUG_PRINT(" src: "); 1023 src = atom_get_src(ctx, attr, ptr); 1024 dst ^= src; 1025 ATOM_SDEBUG_PRINT(" dst: "); 1026 atom_put_dst(ctx, arg, attr, &dptr, dst, saved); 1027 } 1028 1029 static void atom_op_debug(atom_exec_context *ctx, int *ptr, int arg) 1030 { 1031 DRM_INFO("unimplemented!\n"); 1032 } 1033 1034 static struct { 1035 void (*func) (atom_exec_context *, int *, int); 1036 int arg; 1037 } opcode_table[ATOM_OP_CNT] = { 1038 { 1039 NULL, 0}, { 1040 atom_op_move, ATOM_ARG_REG}, { 1041 atom_op_move, ATOM_ARG_PS}, { 1042 atom_op_move, ATOM_ARG_WS}, { 1043 atom_op_move, ATOM_ARG_FB}, { 1044 atom_op_move, ATOM_ARG_PLL}, { 1045 atom_op_move, ATOM_ARG_MC}, { 1046 atom_op_and, ATOM_ARG_REG}, { 1047 atom_op_and, ATOM_ARG_PS}, { 1048 atom_op_and, ATOM_ARG_WS}, { 1049 atom_op_and, ATOM_ARG_FB}, { 1050 atom_op_and, ATOM_ARG_PLL}, { 1051 atom_op_and, ATOM_ARG_MC}, { 1052 atom_op_or, ATOM_ARG_REG}, { 1053 atom_op_or, ATOM_ARG_PS}, { 1054 atom_op_or, ATOM_ARG_WS}, { 1055 atom_op_or, ATOM_ARG_FB}, { 1056 atom_op_or, ATOM_ARG_PLL}, { 1057 atom_op_or, ATOM_ARG_MC}, { 1058 atom_op_shift_left, ATOM_ARG_REG}, { 1059 atom_op_shift_left, ATOM_ARG_PS}, { 1060 atom_op_shift_left, ATOM_ARG_WS}, { 1061 atom_op_shift_left, ATOM_ARG_FB}, { 1062 atom_op_shift_left, ATOM_ARG_PLL}, { 1063 atom_op_shift_left, ATOM_ARG_MC}, { 1064 atom_op_shift_right, ATOM_ARG_REG}, { 1065 atom_op_shift_right, ATOM_ARG_PS}, { 1066 atom_op_shift_right, ATOM_ARG_WS}, { 1067 atom_op_shift_right, ATOM_ARG_FB}, { 1068 atom_op_shift_right, ATOM_ARG_PLL}, { 1069 atom_op_shift_right, ATOM_ARG_MC}, { 1070 atom_op_mul, ATOM_ARG_REG}, { 1071 atom_op_mul, ATOM_ARG_PS}, { 1072 atom_op_mul, ATOM_ARG_WS}, { 1073 atom_op_mul, ATOM_ARG_FB}, { 1074 atom_op_mul, ATOM_ARG_PLL}, { 1075 atom_op_mul, ATOM_ARG_MC}, { 1076 atom_op_div, ATOM_ARG_REG}, { 1077 atom_op_div, ATOM_ARG_PS}, { 1078 atom_op_div, ATOM_ARG_WS}, { 1079 atom_op_div, ATOM_ARG_FB}, { 1080 atom_op_div, ATOM_ARG_PLL}, { 1081 atom_op_div, ATOM_ARG_MC}, { 1082 atom_op_add, ATOM_ARG_REG}, { 1083 atom_op_add, ATOM_ARG_PS}, { 1084 atom_op_add, ATOM_ARG_WS}, { 1085 atom_op_add, ATOM_ARG_FB}, { 1086 atom_op_add, ATOM_ARG_PLL}, { 1087 atom_op_add, ATOM_ARG_MC}, { 1088 atom_op_sub, ATOM_ARG_REG}, { 1089 atom_op_sub, ATOM_ARG_PS}, { 1090 atom_op_sub, ATOM_ARG_WS}, { 1091 atom_op_sub, ATOM_ARG_FB}, { 1092 atom_op_sub, ATOM_ARG_PLL}, { 1093 atom_op_sub, ATOM_ARG_MC}, { 1094 atom_op_setport, ATOM_PORT_ATI}, { 1095 atom_op_setport, ATOM_PORT_PCI}, { 1096 atom_op_setport, ATOM_PORT_SYSIO}, { 1097 atom_op_setregblock, 0}, { 1098 atom_op_setfbbase, 0}, { 1099 atom_op_compare, ATOM_ARG_REG}, { 1100 atom_op_compare, ATOM_ARG_PS}, { 1101 atom_op_compare, ATOM_ARG_WS}, { 1102 atom_op_compare, ATOM_ARG_FB}, { 1103 atom_op_compare, ATOM_ARG_PLL}, { 1104 atom_op_compare, ATOM_ARG_MC}, { 1105 atom_op_switch, 0}, { 1106 atom_op_jump, ATOM_COND_ALWAYS}, { 1107 atom_op_jump, ATOM_COND_EQUAL}, { 1108 atom_op_jump, ATOM_COND_BELOW}, { 1109 atom_op_jump, ATOM_COND_ABOVE}, { 1110 atom_op_jump, ATOM_COND_BELOWOREQUAL}, { 1111 atom_op_jump, ATOM_COND_ABOVEOREQUAL}, { 1112 atom_op_jump, ATOM_COND_NOTEQUAL}, { 1113 atom_op_test, ATOM_ARG_REG}, { 1114 atom_op_test, ATOM_ARG_PS}, { 1115 atom_op_test, ATOM_ARG_WS}, { 1116 atom_op_test, ATOM_ARG_FB}, { 1117 atom_op_test, ATOM_ARG_PLL}, { 1118 atom_op_test, ATOM_ARG_MC}, { 1119 atom_op_delay, ATOM_UNIT_MILLISEC}, { 1120 atom_op_delay, ATOM_UNIT_MICROSEC}, { 1121 atom_op_calltable, 0}, { 1122 atom_op_repeat, 0}, { 1123 atom_op_clear, ATOM_ARG_REG}, { 1124 atom_op_clear, ATOM_ARG_PS}, { 1125 atom_op_clear, ATOM_ARG_WS}, { 1126 atom_op_clear, ATOM_ARG_FB}, { 1127 atom_op_clear, ATOM_ARG_PLL}, { 1128 atom_op_clear, ATOM_ARG_MC}, { 1129 atom_op_nop, 0}, { 1130 atom_op_eot, 0}, { 1131 atom_op_mask, ATOM_ARG_REG}, { 1132 atom_op_mask, ATOM_ARG_PS}, { 1133 atom_op_mask, ATOM_ARG_WS}, { 1134 atom_op_mask, ATOM_ARG_FB}, { 1135 atom_op_mask, ATOM_ARG_PLL}, { 1136 atom_op_mask, ATOM_ARG_MC}, { 1137 atom_op_postcard, 0}, { 1138 atom_op_beep, 0}, { 1139 atom_op_savereg, 0}, { 1140 atom_op_restorereg, 0}, { 1141 atom_op_setdatablock, 0}, { 1142 atom_op_xor, ATOM_ARG_REG}, { 1143 atom_op_xor, ATOM_ARG_PS}, { 1144 atom_op_xor, ATOM_ARG_WS}, { 1145 atom_op_xor, ATOM_ARG_FB}, { 1146 atom_op_xor, ATOM_ARG_PLL}, { 1147 atom_op_xor, ATOM_ARG_MC}, { 1148 atom_op_shl, ATOM_ARG_REG}, { 1149 atom_op_shl, ATOM_ARG_PS}, { 1150 atom_op_shl, ATOM_ARG_WS}, { 1151 atom_op_shl, ATOM_ARG_FB}, { 1152 atom_op_shl, ATOM_ARG_PLL}, { 1153 atom_op_shl, ATOM_ARG_MC}, { 1154 atom_op_shr, ATOM_ARG_REG}, { 1155 atom_op_shr, ATOM_ARG_PS}, { 1156 atom_op_shr, ATOM_ARG_WS}, { 1157 atom_op_shr, ATOM_ARG_FB}, { 1158 atom_op_shr, ATOM_ARG_PLL}, { 1159 atom_op_shr, ATOM_ARG_MC}, { 1160 atom_op_debug, 0},}; 1161 1162 static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params) 1163 { 1164 int base = CU16(ctx->cmd_table + 4 + 2 * index); 1165 int len, ws, ps, ptr; 1166 unsigned char op; 1167 atom_exec_context ectx; 1168 int ret = 0; 1169 1170 if (!base) 1171 return -EINVAL; 1172 1173 len = CU16(base + ATOM_CT_SIZE_PTR); 1174 ws = CU8(base + ATOM_CT_WS_PTR); 1175 ps = CU8(base + ATOM_CT_PS_PTR) & ATOM_CT_PS_MASK; 1176 ptr = base + ATOM_CT_CODE_PTR; 1177 1178 ATOM_SDEBUG_PRINT(">> execute %04X (len %d, WS %d, PS %d)\n", base, len, ws, ps); 1179 1180 ectx.ctx = ctx; 1181 ectx.ps_shift = ps / 4; 1182 ectx.start = base; 1183 ectx.ps = params; 1184 ectx.abort = false; 1185 ectx.last_jump = 0; 1186 if (ws) 1187 ectx.ws = kzalloc(4 * ws, GFP_KERNEL); 1188 else 1189 ectx.ws = NULL; 1190 1191 debug_depth++; 1192 while (1) { 1193 op = CU8(ptr++); 1194 if (op < ATOM_OP_NAMES_CNT) 1195 ATOM_SDEBUG_PRINT("%s @ 0x%04X\n", atom_op_names[op], ptr - 1); 1196 else 1197 ATOM_SDEBUG_PRINT("[%d] @ 0x%04X\n", op, ptr - 1); 1198 if (ectx.abort) { 1199 DRM_ERROR("atombios stuck executing %04X (len %d, WS %d, PS %d) @ 0x%04X\n", 1200 base, len, ws, ps, ptr - 1); 1201 ret = -EINVAL; 1202 goto free; 1203 } 1204 1205 if (op < ATOM_OP_CNT && op > 0) 1206 opcode_table[op].func(&ectx, &ptr, 1207 opcode_table[op].arg); 1208 else 1209 break; 1210 1211 if (op == ATOM_OP_EOT) 1212 break; 1213 } 1214 debug_depth--; 1215 ATOM_SDEBUG_PRINT("<<\n"); 1216 1217 free: 1218 if (ws) 1219 kfree(ectx.ws); 1220 return ret; 1221 } 1222 1223 int atom_execute_table_scratch_unlocked(struct atom_context *ctx, int index, uint32_t * params) 1224 { 1225 int r; 1226 1227 lockmgr(&ctx->mutex, LK_EXCLUSIVE); 1228 /* reset data block */ 1229 ctx->data_block = 0; 1230 /* reset reg block */ 1231 ctx->reg_block = 0; 1232 /* reset fb window */ 1233 ctx->fb_base = 0; 1234 /* reset io mode */ 1235 ctx->io_mode = ATOM_IO_MM; 1236 /* reset divmul */ 1237 ctx->divmul[0] = 0; 1238 ctx->divmul[1] = 0; 1239 r = atom_execute_table_locked(ctx, index, params); 1240 lockmgr(&ctx->mutex, LK_RELEASE); 1241 return r; 1242 } 1243 1244 int atom_execute_table(struct atom_context *ctx, int index, uint32_t * params) 1245 { 1246 int r; 1247 lockmgr(&ctx->scratch_mutex, LK_EXCLUSIVE); 1248 r = atom_execute_table_scratch_unlocked(ctx, index, params); 1249 lockmgr(&ctx->scratch_mutex, LK_RELEASE); 1250 return r; 1251 } 1252 1253 static int atom_iio_len[] = { 1, 2, 3, 3, 3, 3, 4, 4, 4, 3 }; 1254 1255 static void atom_index_iio(struct atom_context *ctx, int base) 1256 { 1257 ctx->iio = kzalloc(2 * 256, GFP_KERNEL); 1258 if (!ctx->iio) 1259 return; 1260 while (CU8(base) == ATOM_IIO_START) { 1261 ctx->iio[CU8(base + 1)] = base + 2; 1262 base += 2; 1263 while (CU8(base) != ATOM_IIO_END) 1264 base += atom_iio_len[CU8(base)]; 1265 base += 3; 1266 } 1267 } 1268 1269 struct atom_context *atom_parse(struct card_info *card, void *bios) 1270 { 1271 int base; 1272 struct atom_context *ctx = 1273 kzalloc(sizeof(struct atom_context), GFP_KERNEL); 1274 char *str; 1275 char name[512]; 1276 int i; 1277 1278 if (!ctx) 1279 return NULL; 1280 1281 ctx->card = card; 1282 ctx->bios = bios; 1283 1284 if (CU16(0) != ATOM_BIOS_MAGIC) { 1285 DRM_INFO("Invalid BIOS magic.\n"); 1286 kfree(ctx); 1287 return NULL; 1288 } 1289 if (strncmp 1290 (CSTR(ATOM_ATI_MAGIC_PTR), ATOM_ATI_MAGIC, 1291 strlen(ATOM_ATI_MAGIC))) { 1292 DRM_INFO("Invalid ATI magic.\n"); 1293 kfree(ctx); 1294 return NULL; 1295 } 1296 1297 base = CU16(ATOM_ROM_TABLE_PTR); 1298 if (strncmp 1299 (CSTR(base + ATOM_ROM_MAGIC_PTR), ATOM_ROM_MAGIC, 1300 strlen(ATOM_ROM_MAGIC))) { 1301 DRM_INFO("Invalid ATOM magic.\n"); 1302 kfree(ctx); 1303 return NULL; 1304 } 1305 1306 ctx->cmd_table = CU16(base + ATOM_ROM_CMD_PTR); 1307 ctx->data_table = CU16(base + ATOM_ROM_DATA_PTR); 1308 atom_index_iio(ctx, CU16(ctx->data_table + ATOM_DATA_IIO_PTR) + 4); 1309 if (!ctx->iio) { 1310 atom_destroy(ctx); 1311 return NULL; 1312 } 1313 1314 str = CSTR(CU16(base + ATOM_ROM_MSG_PTR)); 1315 while (*str && ((*str == '\n') || (*str == '\r'))) 1316 str++; 1317 /* name string isn't always 0 terminated */ 1318 for (i = 0; i < 511; i++) { 1319 name[i] = str[i]; 1320 if (name[i] < '.' || name[i] > 'z') { 1321 name[i] = 0; 1322 break; 1323 } 1324 } 1325 DRM_INFO("ATOM BIOS: %s\n", name); 1326 1327 return ctx; 1328 } 1329 1330 int atom_asic_init(struct atom_context *ctx) 1331 { 1332 struct radeon_device *rdev = ctx->card->dev->dev_private; 1333 int hwi = CU16(ctx->data_table + ATOM_DATA_FWI_PTR); 1334 uint32_t ps[16]; 1335 int ret; 1336 1337 memset(ps, 0, 64); 1338 1339 ps[0] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFSCLK_PTR)); 1340 ps[1] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFMCLK_PTR)); 1341 if (!ps[0] || !ps[1]) 1342 return 1; 1343 1344 if (!CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_INIT)) 1345 return 1; 1346 ret = atom_execute_table(ctx, ATOM_CMD_INIT, ps); 1347 if (ret) 1348 return ret; 1349 1350 memset(ps, 0, 64); 1351 1352 if (rdev->family < CHIP_R600) { 1353 if (CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_SPDFANCNTL)) 1354 atom_execute_table(ctx, ATOM_CMD_SPDFANCNTL, ps); 1355 } 1356 return ret; 1357 } 1358 1359 void atom_destroy(struct atom_context *ctx) 1360 { 1361 kfree(ctx->iio); 1362 kfree(ctx); 1363 } 1364 1365 bool atom_parse_data_header(struct atom_context *ctx, int index, 1366 uint16_t * size, uint8_t * frev, uint8_t * crev, 1367 uint16_t * data_start) 1368 { 1369 int offset = index * 2 + 4; 1370 int idx = CU16(ctx->data_table + offset); 1371 u16 *mdt = (u16 *)((char *)ctx->bios + ctx->data_table + 4); 1372 1373 if (!mdt[index]) 1374 return false; 1375 1376 if (size) 1377 *size = CU16(idx); 1378 if (frev) 1379 *frev = CU8(idx + 2); 1380 if (crev) 1381 *crev = CU8(idx + 3); 1382 *data_start = idx; 1383 return true; 1384 } 1385 1386 bool atom_parse_cmd_header(struct atom_context *ctx, int index, uint8_t * frev, 1387 uint8_t * crev) 1388 { 1389 int offset = index * 2 + 4; 1390 int idx = CU16(ctx->cmd_table + offset); 1391 u16 *mct = (u16 *)((char *)ctx->bios + ctx->cmd_table + 4); 1392 1393 if (!mct[index]) 1394 return false; 1395 1396 if (frev) 1397 *frev = CU8(idx + 2); 1398 if (crev) 1399 *crev = CU8(idx + 3); 1400 return true; 1401 } 1402 1403 int atom_allocate_fb_scratch(struct atom_context *ctx) 1404 { 1405 int index = GetIndexIntoMasterTable(DATA, VRAM_UsageByFirmware); 1406 uint16_t data_offset; 1407 int usage_bytes = 0; 1408 struct _ATOM_VRAM_USAGE_BY_FIRMWARE *firmware_usage; 1409 1410 if (atom_parse_data_header(ctx, index, NULL, NULL, NULL, &data_offset)) { 1411 firmware_usage = (struct _ATOM_VRAM_USAGE_BY_FIRMWARE *)((char *)ctx->bios + data_offset); 1412 1413 DRM_DEBUG("atom firmware requested %08x %dkb\n", 1414 le32_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].ulStartAddrUsedByFirmware), 1415 le16_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb)); 1416 1417 usage_bytes = le16_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb) * 1024; 1418 } 1419 ctx->scratch_size_bytes = 0; 1420 if (usage_bytes == 0) 1421 usage_bytes = 20 * 1024; 1422 /* allocate some scratch memory */ 1423 ctx->scratch = kzalloc(usage_bytes, GFP_KERNEL); 1424 if (!ctx->scratch) 1425 return -ENOMEM; 1426 ctx->scratch_size_bytes = usage_bytes; 1427 return 0; 1428 } 1429