157e252bfSMichael Neumann /* 257e252bfSMichael Neumann * Copyright 2011 Advanced Micro Devices, Inc. 357e252bfSMichael Neumann * 457e252bfSMichael Neumann * Permission is hereby granted, free of charge, to any person obtaining a 557e252bfSMichael Neumann * copy of this software and associated documentation files (the "Software"), 657e252bfSMichael Neumann * to deal in the Software without restriction, including without limitation 757e252bfSMichael Neumann * the rights to use, copy, modify, merge, publish, distribute, sublicense, 857e252bfSMichael Neumann * and/or sell copies of the Software, and to permit persons to whom the 957e252bfSMichael Neumann * Software is furnished to do so, subject to the following conditions: 1057e252bfSMichael Neumann * 1157e252bfSMichael Neumann * The above copyright notice and this permission notice shall be included in 1257e252bfSMichael Neumann * all copies or substantial portions of the Software. 1357e252bfSMichael Neumann * 1457e252bfSMichael Neumann * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 1557e252bfSMichael Neumann * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 1657e252bfSMichael Neumann * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 1757e252bfSMichael Neumann * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 1857e252bfSMichael Neumann * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 1957e252bfSMichael Neumann * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 2057e252bfSMichael Neumann * OTHER DEALINGS IN THE SOFTWARE. 2157e252bfSMichael Neumann * 2257e252bfSMichael Neumann */ 2357e252bfSMichael Neumann #ifndef PP_SMC_H 2457e252bfSMichael Neumann #define PP_SMC_H 2557e252bfSMichael Neumann 2657e252bfSMichael Neumann #pragma pack(push, 1) 2757e252bfSMichael Neumann 2857e252bfSMichael Neumann #define PPSMC_SWSTATE_FLAG_DC 0x01 2957e252bfSMichael Neumann #define PPSMC_SWSTATE_FLAG_UVD 0x02 3057e252bfSMichael Neumann #define PPSMC_SWSTATE_FLAG_VCE 0x04 3157e252bfSMichael Neumann #define PPSMC_SWSTATE_FLAG_PCIE_X1 0x08 3257e252bfSMichael Neumann 3357e252bfSMichael Neumann #define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00 3457e252bfSMichael Neumann #define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01 3557e252bfSMichael Neumann #define PPSMC_THERMAL_PROTECT_TYPE_NONE 0xff 3657e252bfSMichael Neumann 3757e252bfSMichael Neumann #define PPSMC_SYSTEMFLAG_GPIO_DC 0x01 3857e252bfSMichael Neumann #define PPSMC_SYSTEMFLAG_STEPVDDC 0x02 3957e252bfSMichael Neumann #define PPSMC_SYSTEMFLAG_GDDR5 0x04 4057e252bfSMichael Neumann #define PPSMC_SYSTEMFLAG_DISABLE_BABYSTEP 0x08 4157e252bfSMichael Neumann #define PPSMC_SYSTEMFLAG_REGULATOR_HOT 0x10 4257e252bfSMichael Neumann #define PPSMC_SYSTEMFLAG_REGULATOR_HOT_ANALOG 0x20 4357e252bfSMichael Neumann #define PPSMC_SYSTEMFLAG_REGULATOR_HOT_PROG_GPIO 0x40 4457e252bfSMichael Neumann 4557e252bfSMichael Neumann #define PPSMC_EXTRAFLAGS_AC2DC_ACTION_MASK 0x07 4657e252bfSMichael Neumann #define PPSMC_EXTRAFLAGS_AC2DC_DONT_WAIT_FOR_VBLANK 0x08 4757e252bfSMichael Neumann #define PPSMC_EXTRAFLAGS_AC2DC_ACTION_GOTODPMLOWSTATE 0x00 4857e252bfSMichael Neumann #define PPSMC_EXTRAFLAGS_AC2DC_ACTION_GOTOINITIALSTATE 0x01 4957e252bfSMichael Neumann #define PPSMC_EXTRAFLAGS_AC2DC_GPIO5_POLARITY_HIGH 0x02 5057e252bfSMichael Neumann 5157e252bfSMichael Neumann #define PPSMC_DISPLAY_WATERMARK_LOW 0 5257e252bfSMichael Neumann #define PPSMC_DISPLAY_WATERMARK_HIGH 1 5357e252bfSMichael Neumann 5457e252bfSMichael Neumann #define PPSMC_STATEFLAG_AUTO_PULSE_SKIP 0x01 5557e252bfSMichael Neumann #define PPSMC_STATEFLAG_POWERBOOST 0x02 5657e252bfSMichael Neumann #define PPSMC_STATEFLAG_DEEPSLEEP_THROTTLE 0x20 5757e252bfSMichael Neumann #define PPSMC_STATEFLAG_DEEPSLEEP_BYPASS 0x40 5857e252bfSMichael Neumann 59*7dcf36dcSFrançois Tigeot #define FDO_MODE_HARDWARE 0 60*7dcf36dcSFrançois Tigeot #define FDO_MODE_PIECE_WISE_LINEAR 1 61*7dcf36dcSFrançois Tigeot 62*7dcf36dcSFrançois Tigeot enum FAN_CONTROL { 63*7dcf36dcSFrançois Tigeot FAN_CONTROL_FUZZY, 64*7dcf36dcSFrançois Tigeot FAN_CONTROL_TABLE 65*7dcf36dcSFrançois Tigeot }; 66*7dcf36dcSFrançois Tigeot 6757e252bfSMichael Neumann #define PPSMC_Result_OK ((uint8_t)0x01) 6857e252bfSMichael Neumann #define PPSMC_Result_Failed ((uint8_t)0xFF) 6957e252bfSMichael Neumann 7057e252bfSMichael Neumann typedef uint8_t PPSMC_Result; 7157e252bfSMichael Neumann 7257e252bfSMichael Neumann #define PPSMC_MSG_Halt ((uint8_t)0x10) 7357e252bfSMichael Neumann #define PPSMC_MSG_Resume ((uint8_t)0x11) 7457e252bfSMichael Neumann #define PPSMC_MSG_ZeroLevelsDisabled ((uint8_t)0x13) 7557e252bfSMichael Neumann #define PPSMC_MSG_OneLevelsDisabled ((uint8_t)0x14) 7657e252bfSMichael Neumann #define PPSMC_MSG_TwoLevelsDisabled ((uint8_t)0x15) 7757e252bfSMichael Neumann #define PPSMC_MSG_EnableThermalInterrupt ((uint8_t)0x16) 7857e252bfSMichael Neumann #define PPSMC_MSG_RunningOnAC ((uint8_t)0x17) 7957e252bfSMichael Neumann #define PPSMC_MSG_SwitchToSwState ((uint8_t)0x20) 8057e252bfSMichael Neumann #define PPSMC_MSG_SwitchToInitialState ((uint8_t)0x40) 8157e252bfSMichael Neumann #define PPSMC_MSG_NoForcedLevel ((uint8_t)0x41) 8257e252bfSMichael Neumann #define PPSMC_MSG_ForceHigh ((uint8_t)0x42) 8357e252bfSMichael Neumann #define PPSMC_MSG_ForceMediumOrHigh ((uint8_t)0x43) 8457e252bfSMichael Neumann #define PPSMC_MSG_SwitchToMinimumPower ((uint8_t)0x51) 8557e252bfSMichael Neumann #define PPSMC_MSG_ResumeFromMinimumPower ((uint8_t)0x52) 8657e252bfSMichael Neumann #define PPSMC_MSG_EnableCac ((uint8_t)0x53) 8757e252bfSMichael Neumann #define PPSMC_MSG_DisableCac ((uint8_t)0x54) 8857e252bfSMichael Neumann #define PPSMC_TDPClampingActive ((uint8_t)0x59) 8957e252bfSMichael Neumann #define PPSMC_TDPClampingInactive ((uint8_t)0x5A) 90*7dcf36dcSFrançois Tigeot #define PPSMC_StartFanControl ((uint8_t)0x5B) 91*7dcf36dcSFrançois Tigeot #define PPSMC_StopFanControl ((uint8_t)0x5C) 9257e252bfSMichael Neumann #define PPSMC_MSG_NoDisplay ((uint8_t)0x5D) 9357e252bfSMichael Neumann #define PPSMC_MSG_HasDisplay ((uint8_t)0x5E) 9457e252bfSMichael Neumann #define PPSMC_MSG_UVDPowerOFF ((uint8_t)0x60) 9557e252bfSMichael Neumann #define PPSMC_MSG_UVDPowerON ((uint8_t)0x61) 9657e252bfSMichael Neumann #define PPSMC_MSG_EnableULV ((uint8_t)0x62) 9757e252bfSMichael Neumann #define PPSMC_MSG_DisableULV ((uint8_t)0x63) 9857e252bfSMichael Neumann #define PPSMC_MSG_EnterULV ((uint8_t)0x64) 9957e252bfSMichael Neumann #define PPSMC_MSG_ExitULV ((uint8_t)0x65) 10057e252bfSMichael Neumann #define PPSMC_CACLongTermAvgEnable ((uint8_t)0x6E) 10157e252bfSMichael Neumann #define PPSMC_CACLongTermAvgDisable ((uint8_t)0x6F) 10257e252bfSMichael Neumann #define PPSMC_MSG_CollectCAC_PowerCorreln ((uint8_t)0x7A) 10357e252bfSMichael Neumann #define PPSMC_FlushDataCache ((uint8_t)0x80) 10457e252bfSMichael Neumann #define PPSMC_MSG_SetEnabledLevels ((uint8_t)0x82) 10557e252bfSMichael Neumann #define PPSMC_MSG_SetForcedLevels ((uint8_t)0x83) 10657e252bfSMichael Neumann #define PPSMC_MSG_ResetToDefaults ((uint8_t)0x84) 10757e252bfSMichael Neumann #define PPSMC_MSG_EnableDTE ((uint8_t)0x87) 10857e252bfSMichael Neumann #define PPSMC_MSG_DisableDTE ((uint8_t)0x88) 10957e252bfSMichael Neumann #define PPSMC_MSG_ThrottleOVRDSCLKDS ((uint8_t)0x96) 11057e252bfSMichael Neumann #define PPSMC_MSG_CancelThrottleOVRDSCLKDS ((uint8_t)0x97) 11157e252bfSMichael Neumann 1124cd92098Szrj /* CI/KV/KB */ 1134cd92098Szrj #define PPSMC_MSG_UVDDPM_SetEnabledMask ((uint16_t) 0x12D) 1144cd92098Szrj #define PPSMC_MSG_VCEDPM_SetEnabledMask ((uint16_t) 0x12E) 1154cd92098Szrj #define PPSMC_MSG_ACPDPM_SetEnabledMask ((uint16_t) 0x12F) 1164cd92098Szrj #define PPSMC_MSG_SAMUDPM_SetEnabledMask ((uint16_t) 0x130) 1174cd92098Szrj #define PPSMC_MSG_MCLKDPM_ForceState ((uint16_t) 0x131) 1184cd92098Szrj #define PPSMC_MSG_MCLKDPM_NoForcedLevel ((uint16_t) 0x132) 119*7dcf36dcSFrançois Tigeot #define PPSMC_MSG_Thermal_Cntl_Disable ((uint16_t) 0x133) 1204cd92098Szrj #define PPSMC_MSG_Voltage_Cntl_Disable ((uint16_t) 0x135) 1214cd92098Szrj #define PPSMC_MSG_PCIeDPM_Enable ((uint16_t) 0x136) 1224cd92098Szrj #define PPSMC_MSG_PCIeDPM_Disable ((uint16_t) 0x13d) 1234cd92098Szrj #define PPSMC_MSG_ACPPowerOFF ((uint16_t) 0x137) 1244cd92098Szrj #define PPSMC_MSG_ACPPowerON ((uint16_t) 0x138) 1254cd92098Szrj #define PPSMC_MSG_SAMPowerOFF ((uint16_t) 0x139) 1264cd92098Szrj #define PPSMC_MSG_SAMPowerON ((uint16_t) 0x13a) 1274cd92098Szrj #define PPSMC_MSG_PCIeDPM_Disable ((uint16_t) 0x13d) 1284cd92098Szrj #define PPSMC_MSG_NBDPM_Enable ((uint16_t) 0x140) 1294cd92098Szrj #define PPSMC_MSG_NBDPM_Disable ((uint16_t) 0x141) 1304cd92098Szrj #define PPSMC_MSG_SCLKDPM_SetEnabledMask ((uint16_t) 0x145) 1314cd92098Szrj #define PPSMC_MSG_MCLKDPM_SetEnabledMask ((uint16_t) 0x146) 1324cd92098Szrj #define PPSMC_MSG_PCIeDPM_ForceLevel ((uint16_t) 0x147) 1334cd92098Szrj #define PPSMC_MSG_PCIeDPM_UnForceLevel ((uint16_t) 0x148) 1344cd92098Szrj #define PPSMC_MSG_EnableVRHotGPIOInterrupt ((uint16_t) 0x14a) 1354cd92098Szrj #define PPSMC_MSG_DPM_Enable ((uint16_t) 0x14e) 1364cd92098Szrj #define PPSMC_MSG_DPM_Disable ((uint16_t) 0x14f) 1374cd92098Szrj #define PPSMC_MSG_MCLKDPM_Enable ((uint16_t) 0x150) 1384cd92098Szrj #define PPSMC_MSG_MCLKDPM_Disable ((uint16_t) 0x151) 1394cd92098Szrj #define PPSMC_MSG_UVDDPM_Enable ((uint16_t) 0x154) 1404cd92098Szrj #define PPSMC_MSG_UVDDPM_Disable ((uint16_t) 0x155) 1414cd92098Szrj #define PPSMC_MSG_SAMUDPM_Enable ((uint16_t) 0x156) 1424cd92098Szrj #define PPSMC_MSG_SAMUDPM_Disable ((uint16_t) 0x157) 1434cd92098Szrj #define PPSMC_MSG_ACPDPM_Enable ((uint16_t) 0x158) 1444cd92098Szrj #define PPSMC_MSG_ACPDPM_Disable ((uint16_t) 0x159) 1454cd92098Szrj #define PPSMC_MSG_VCEDPM_Enable ((uint16_t) 0x15a) 1464cd92098Szrj #define PPSMC_MSG_VCEDPM_Disable ((uint16_t) 0x15b) 1474cd92098Szrj #define PPSMC_MSG_VddC_Request ((uint16_t) 0x15f) 1484cd92098Szrj #define PPSMC_MSG_SCLKDPM_GetEnabledMask ((uint16_t) 0x162) 1494cd92098Szrj #define PPSMC_MSG_PCIeDPM_SetEnabledMask ((uint16_t) 0x167) 1504cd92098Szrj #define PPSMC_MSG_TDCLimitEnable ((uint16_t) 0x169) 1514cd92098Szrj #define PPSMC_MSG_TDCLimitDisable ((uint16_t) 0x16a) 1524cd92098Szrj #define PPSMC_MSG_PkgPwrLimitEnable ((uint16_t) 0x185) 1534cd92098Szrj #define PPSMC_MSG_PkgPwrLimitDisable ((uint16_t) 0x186) 1544cd92098Szrj #define PPSMC_MSG_PkgPwrSetLimit ((uint16_t) 0x187) 1554cd92098Szrj #define PPSMC_MSG_OverDriveSetTargetTdp ((uint16_t) 0x188) 1564cd92098Szrj #define PPSMC_MSG_SCLKDPM_FreezeLevel ((uint16_t) 0x189) 1574cd92098Szrj #define PPSMC_MSG_SCLKDPM_UnfreezeLevel ((uint16_t) 0x18A) 1584cd92098Szrj #define PPSMC_MSG_MCLKDPM_FreezeLevel ((uint16_t) 0x18B) 1594cd92098Szrj #define PPSMC_MSG_MCLKDPM_UnfreezeLevel ((uint16_t) 0x18C) 1604cd92098Szrj #define PPSMC_MSG_MASTER_DeepSleep_ON ((uint16_t) 0x18F) 1614cd92098Szrj #define PPSMC_MSG_MASTER_DeepSleep_OFF ((uint16_t) 0x190) 1624cd92098Szrj #define PPSMC_MSG_Remove_DC_Clamp ((uint16_t) 0x191) 163*7dcf36dcSFrançois Tigeot #define PPSMC_MSG_SetFanPwmMax ((uint16_t) 0x19A) 164*7dcf36dcSFrançois Tigeot 165*7dcf36dcSFrançois Tigeot #define PPSMC_MSG_ENABLE_THERMAL_DPM ((uint16_t) 0x19C) 166*7dcf36dcSFrançois Tigeot #define PPSMC_MSG_DISABLE_THERMAL_DPM ((uint16_t) 0x19D) 1674cd92098Szrj 1684cd92098Szrj #define PPSMC_MSG_API_GetSclkFrequency ((uint16_t) 0x200) 1694cd92098Szrj #define PPSMC_MSG_API_GetMclkFrequency ((uint16_t) 0x201) 1704cd92098Szrj 17157e252bfSMichael Neumann /* TN */ 17257e252bfSMichael Neumann #define PPSMC_MSG_DPM_Config ((uint32_t) 0x102) 17357e252bfSMichael Neumann #define PPSMC_MSG_DPM_ForceState ((uint32_t) 0x104) 17457e252bfSMichael Neumann #define PPSMC_MSG_PG_SIMD_Config ((uint32_t) 0x108) 175*7dcf36dcSFrançois Tigeot #define PPSMC_MSG_Thermal_Cntl_Enable ((uint32_t) 0x10a) 1764cd92098Szrj #define PPSMC_MSG_Voltage_Cntl_Enable ((uint32_t) 0x109) 1774cd92098Szrj #define PPSMC_MSG_VCEPowerOFF ((uint32_t) 0x10e) 1784cd92098Szrj #define PPSMC_MSG_VCEPowerON ((uint32_t) 0x10f) 179*7dcf36dcSFrançois Tigeot #define PPSMC_MSG_DPM_N_LevelsDisabled ((uint32_t) 0x112) 18057e252bfSMichael Neumann #define PPSMC_MSG_DCE_RemoveVoltageAdjustment ((uint32_t) 0x11d) 18157e252bfSMichael Neumann #define PPSMC_MSG_DCE_AllowVoltageAdjustment ((uint32_t) 0x11e) 1824cd92098Szrj #define PPSMC_MSG_EnableBAPM ((uint32_t) 0x120) 1834cd92098Szrj #define PPSMC_MSG_DisableBAPM ((uint32_t) 0x121) 18457e252bfSMichael Neumann #define PPSMC_MSG_UVD_DPM_Config ((uint32_t) 0x124) 18557e252bfSMichael Neumann 18657e252bfSMichael Neumann 18757e252bfSMichael Neumann typedef uint16_t PPSMC_Msg; 18857e252bfSMichael Neumann 18957e252bfSMichael Neumann #pragma pack(pop) 19057e252bfSMichael Neumann 19157e252bfSMichael Neumann #endif 192