1 /* 2 * Copyright 2008 Advanced Micro Devices, Inc. 3 * Copyright 2008 Red Hat Inc. 4 * Copyright 2009 Jerome Glisse. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: Dave Airlie 25 * Alex Deucher 26 * Jerome Glisse 27 * 28 * $FreeBSD: head/sys/dev/drm2/radeon/r300d.h 254885 2013-08-25 19:37:15Z dumbbell $ 29 */ 30 #ifndef __R300D_H__ 31 #define __R300D_H__ 32 33 #define CP_PACKET0 0x00000000 34 #define PACKET0_BASE_INDEX_SHIFT 0 35 #define PACKET0_BASE_INDEX_MASK (0x1ffff << 0) 36 #define PACKET0_COUNT_SHIFT 16 37 #define PACKET0_COUNT_MASK (0x3fff << 16) 38 #define CP_PACKET1 0x40000000 39 #define CP_PACKET2 0x80000000 40 #define PACKET2_PAD_SHIFT 0 41 #define PACKET2_PAD_MASK (0x3fffffff << 0) 42 #define CP_PACKET3 0xC0000000 43 #define PACKET3_IT_OPCODE_SHIFT 8 44 #define PACKET3_IT_OPCODE_MASK (0xff << 8) 45 #define PACKET3_COUNT_SHIFT 16 46 #define PACKET3_COUNT_MASK (0x3fff << 16) 47 /* PACKET3 op code */ 48 #define PACKET3_NOP 0x10 49 #define PACKET3_3D_DRAW_VBUF 0x28 50 #define PACKET3_3D_DRAW_IMMD 0x29 51 #define PACKET3_3D_DRAW_INDX 0x2A 52 #define PACKET3_3D_LOAD_VBPNTR 0x2F 53 #define PACKET3_3D_CLEAR_ZMASK 0x32 54 #define PACKET3_INDX_BUFFER 0x33 55 #define PACKET3_3D_DRAW_VBUF_2 0x34 56 #define PACKET3_3D_DRAW_IMMD_2 0x35 57 #define PACKET3_3D_DRAW_INDX_2 0x36 58 #define PACKET3_3D_CLEAR_HIZ 0x37 59 #define PACKET3_3D_CLEAR_CMASK 0x38 60 #define PACKET3_BITBLT_MULTI 0x9B 61 62 #define PACKET0(reg, n) (CP_PACKET0 | \ 63 REG_SET(PACKET0_BASE_INDEX, (reg) >> 2) | \ 64 REG_SET(PACKET0_COUNT, (n))) 65 #define PACKET2(v) (CP_PACKET2 | REG_SET(PACKET2_PAD, (v))) 66 #define PACKET3(op, n) (CP_PACKET3 | \ 67 REG_SET(PACKET3_IT_OPCODE, (op)) | \ 68 REG_SET(PACKET3_COUNT, (n))) 69 70 #define PACKET_TYPE0 0 71 #define PACKET_TYPE1 1 72 #define PACKET_TYPE2 2 73 #define PACKET_TYPE3 3 74 75 #define CP_PACKET_GET_TYPE(h) (((h) >> 30) & 3) 76 #define CP_PACKET_GET_COUNT(h) (((h) >> 16) & 0x3FFF) 77 #define CP_PACKET0_GET_REG(h) (((h) & 0x1FFF) << 2) 78 #define CP_PACKET0_GET_ONE_REG_WR(h) (((h) >> 15) & 1) 79 #define CP_PACKET3_GET_OPCODE(h) (((h) >> 8) & 0xFF) 80 81 /* Registers */ 82 #define R_000148_MC_FB_LOCATION 0x000148 83 #define S_000148_MC_FB_START(x) (((x) & 0xFFFF) << 0) 84 #define G_000148_MC_FB_START(x) (((x) >> 0) & 0xFFFF) 85 #define C_000148_MC_FB_START 0xFFFF0000 86 #define S_000148_MC_FB_TOP(x) (((x) & 0xFFFF) << 16) 87 #define G_000148_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF) 88 #define C_000148_MC_FB_TOP 0x0000FFFF 89 #define R_00014C_MC_AGP_LOCATION 0x00014C 90 #define S_00014C_MC_AGP_START(x) (((x) & 0xFFFF) << 0) 91 #define G_00014C_MC_AGP_START(x) (((x) >> 0) & 0xFFFF) 92 #define C_00014C_MC_AGP_START 0xFFFF0000 93 #define S_00014C_MC_AGP_TOP(x) (((x) & 0xFFFF) << 16) 94 #define G_00014C_MC_AGP_TOP(x) (((x) >> 16) & 0xFFFF) 95 #define C_00014C_MC_AGP_TOP 0x0000FFFF 96 #define R_00015C_AGP_BASE_2 0x00015C 97 #define S_00015C_AGP_BASE_ADDR_2(x) (((x) & 0xF) << 0) 98 #define G_00015C_AGP_BASE_ADDR_2(x) (((x) >> 0) & 0xF) 99 #define C_00015C_AGP_BASE_ADDR_2 0xFFFFFFF0 100 #define R_000170_AGP_BASE 0x000170 101 #define S_000170_AGP_BASE_ADDR(x) (((x) & 0xFFFFFFFF) << 0) 102 #define G_000170_AGP_BASE_ADDR(x) (((x) >> 0) & 0xFFFFFFFF) 103 #define C_000170_AGP_BASE_ADDR 0x00000000 104 #define R_0007C0_CP_STAT 0x0007C0 105 #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0) 106 #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1) 107 #define C_0007C0_MRU_BUSY 0xFFFFFFFE 108 #define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1) 109 #define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1) 110 #define C_0007C0_MWU_BUSY 0xFFFFFFFD 111 #define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2) 112 #define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1) 113 #define C_0007C0_RSIU_BUSY 0xFFFFFFFB 114 #define S_0007C0_RCIU_BUSY(x) (((x) & 0x1) << 3) 115 #define G_0007C0_RCIU_BUSY(x) (((x) >> 3) & 0x1) 116 #define C_0007C0_RCIU_BUSY 0xFFFFFFF7 117 #define S_0007C0_CSF_PRIMARY_BUSY(x) (((x) & 0x1) << 9) 118 #define G_0007C0_CSF_PRIMARY_BUSY(x) (((x) >> 9) & 0x1) 119 #define C_0007C0_CSF_PRIMARY_BUSY 0xFFFFFDFF 120 #define S_0007C0_CSF_INDIRECT_BUSY(x) (((x) & 0x1) << 10) 121 #define G_0007C0_CSF_INDIRECT_BUSY(x) (((x) >> 10) & 0x1) 122 #define C_0007C0_CSF_INDIRECT_BUSY 0xFFFFFBFF 123 #define S_0007C0_CSQ_PRIMARY_BUSY(x) (((x) & 0x1) << 11) 124 #define G_0007C0_CSQ_PRIMARY_BUSY(x) (((x) >> 11) & 0x1) 125 #define C_0007C0_CSQ_PRIMARY_BUSY 0xFFFFF7FF 126 #define S_0007C0_CSQ_INDIRECT_BUSY(x) (((x) & 0x1) << 12) 127 #define G_0007C0_CSQ_INDIRECT_BUSY(x) (((x) >> 12) & 0x1) 128 #define C_0007C0_CSQ_INDIRECT_BUSY 0xFFFFEFFF 129 #define S_0007C0_CSI_BUSY(x) (((x) & 0x1) << 13) 130 #define G_0007C0_CSI_BUSY(x) (((x) >> 13) & 0x1) 131 #define C_0007C0_CSI_BUSY 0xFFFFDFFF 132 #define S_0007C0_CSF_INDIRECT2_BUSY(x) (((x) & 0x1) << 14) 133 #define G_0007C0_CSF_INDIRECT2_BUSY(x) (((x) >> 14) & 0x1) 134 #define C_0007C0_CSF_INDIRECT2_BUSY 0xFFFFBFFF 135 #define S_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) & 0x1) << 15) 136 #define G_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) >> 15) & 0x1) 137 #define C_0007C0_CSQ_INDIRECT2_BUSY 0xFFFF7FFF 138 #define S_0007C0_GUIDMA_BUSY(x) (((x) & 0x1) << 28) 139 #define G_0007C0_GUIDMA_BUSY(x) (((x) >> 28) & 0x1) 140 #define C_0007C0_GUIDMA_BUSY 0xEFFFFFFF 141 #define S_0007C0_VIDDMA_BUSY(x) (((x) & 0x1) << 29) 142 #define G_0007C0_VIDDMA_BUSY(x) (((x) >> 29) & 0x1) 143 #define C_0007C0_VIDDMA_BUSY 0xDFFFFFFF 144 #define S_0007C0_CMDSTRM_BUSY(x) (((x) & 0x1) << 30) 145 #define G_0007C0_CMDSTRM_BUSY(x) (((x) >> 30) & 0x1) 146 #define C_0007C0_CMDSTRM_BUSY 0xBFFFFFFF 147 #define S_0007C0_CP_BUSY(x) (((x) & 0x1) << 31) 148 #define G_0007C0_CP_BUSY(x) (((x) >> 31) & 0x1) 149 #define C_0007C0_CP_BUSY 0x7FFFFFFF 150 #define R_000E40_RBBM_STATUS 0x000E40 151 #define S_000E40_CMDFIFO_AVAIL(x) (((x) & 0x7F) << 0) 152 #define G_000E40_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x7F) 153 #define C_000E40_CMDFIFO_AVAIL 0xFFFFFF80 154 #define S_000E40_HIRQ_ON_RBB(x) (((x) & 0x1) << 8) 155 #define G_000E40_HIRQ_ON_RBB(x) (((x) >> 8) & 0x1) 156 #define C_000E40_HIRQ_ON_RBB 0xFFFFFEFF 157 #define S_000E40_CPRQ_ON_RBB(x) (((x) & 0x1) << 9) 158 #define G_000E40_CPRQ_ON_RBB(x) (((x) >> 9) & 0x1) 159 #define C_000E40_CPRQ_ON_RBB 0xFFFFFDFF 160 #define S_000E40_CFRQ_ON_RBB(x) (((x) & 0x1) << 10) 161 #define G_000E40_CFRQ_ON_RBB(x) (((x) >> 10) & 0x1) 162 #define C_000E40_CFRQ_ON_RBB 0xFFFFFBFF 163 #define S_000E40_HIRQ_IN_RTBUF(x) (((x) & 0x1) << 11) 164 #define G_000E40_HIRQ_IN_RTBUF(x) (((x) >> 11) & 0x1) 165 #define C_000E40_HIRQ_IN_RTBUF 0xFFFFF7FF 166 #define S_000E40_CPRQ_IN_RTBUF(x) (((x) & 0x1) << 12) 167 #define G_000E40_CPRQ_IN_RTBUF(x) (((x) >> 12) & 0x1) 168 #define C_000E40_CPRQ_IN_RTBUF 0xFFFFEFFF 169 #define S_000E40_CFRQ_IN_RTBUF(x) (((x) & 0x1) << 13) 170 #define G_000E40_CFRQ_IN_RTBUF(x) (((x) >> 13) & 0x1) 171 #define C_000E40_CFRQ_IN_RTBUF 0xFFFFDFFF 172 #define S_000E40_CF_PIPE_BUSY(x) (((x) & 0x1) << 14) 173 #define G_000E40_CF_PIPE_BUSY(x) (((x) >> 14) & 0x1) 174 #define C_000E40_CF_PIPE_BUSY 0xFFFFBFFF 175 #define S_000E40_ENG_EV_BUSY(x) (((x) & 0x1) << 15) 176 #define G_000E40_ENG_EV_BUSY(x) (((x) >> 15) & 0x1) 177 #define C_000E40_ENG_EV_BUSY 0xFFFF7FFF 178 #define S_000E40_CP_CMDSTRM_BUSY(x) (((x) & 0x1) << 16) 179 #define G_000E40_CP_CMDSTRM_BUSY(x) (((x) >> 16) & 0x1) 180 #define C_000E40_CP_CMDSTRM_BUSY 0xFFFEFFFF 181 #define S_000E40_E2_BUSY(x) (((x) & 0x1) << 17) 182 #define G_000E40_E2_BUSY(x) (((x) >> 17) & 0x1) 183 #define C_000E40_E2_BUSY 0xFFFDFFFF 184 #define S_000E40_RB2D_BUSY(x) (((x) & 0x1) << 18) 185 #define G_000E40_RB2D_BUSY(x) (((x) >> 18) & 0x1) 186 #define C_000E40_RB2D_BUSY 0xFFFBFFFF 187 #define S_000E40_RB3D_BUSY(x) (((x) & 0x1) << 19) 188 #define G_000E40_RB3D_BUSY(x) (((x) >> 19) & 0x1) 189 #define C_000E40_RB3D_BUSY 0xFFF7FFFF 190 #define S_000E40_VAP_BUSY(x) (((x) & 0x1) << 20) 191 #define G_000E40_VAP_BUSY(x) (((x) >> 20) & 0x1) 192 #define C_000E40_VAP_BUSY 0xFFEFFFFF 193 #define S_000E40_RE_BUSY(x) (((x) & 0x1) << 21) 194 #define G_000E40_RE_BUSY(x) (((x) >> 21) & 0x1) 195 #define C_000E40_RE_BUSY 0xFFDFFFFF 196 #define S_000E40_TAM_BUSY(x) (((x) & 0x1) << 22) 197 #define G_000E40_TAM_BUSY(x) (((x) >> 22) & 0x1) 198 #define C_000E40_TAM_BUSY 0xFFBFFFFF 199 #define S_000E40_TDM_BUSY(x) (((x) & 0x1) << 23) 200 #define G_000E40_TDM_BUSY(x) (((x) >> 23) & 0x1) 201 #define C_000E40_TDM_BUSY 0xFF7FFFFF 202 #define S_000E40_PB_BUSY(x) (((x) & 0x1) << 24) 203 #define G_000E40_PB_BUSY(x) (((x) >> 24) & 0x1) 204 #define C_000E40_PB_BUSY 0xFEFFFFFF 205 #define S_000E40_TIM_BUSY(x) (((x) & 0x1) << 25) 206 #define G_000E40_TIM_BUSY(x) (((x) >> 25) & 0x1) 207 #define C_000E40_TIM_BUSY 0xFDFFFFFF 208 #define S_000E40_GA_BUSY(x) (((x) & 0x1) << 26) 209 #define G_000E40_GA_BUSY(x) (((x) >> 26) & 0x1) 210 #define C_000E40_GA_BUSY 0xFBFFFFFF 211 #define S_000E40_CBA2D_BUSY(x) (((x) & 0x1) << 27) 212 #define G_000E40_CBA2D_BUSY(x) (((x) >> 27) & 0x1) 213 #define C_000E40_CBA2D_BUSY 0xF7FFFFFF 214 #define S_000E40_GUI_ACTIVE(x) (((x) & 0x1) << 31) 215 #define G_000E40_GUI_ACTIVE(x) (((x) >> 31) & 0x1) 216 #define C_000E40_GUI_ACTIVE 0x7FFFFFFF 217 #define R_0000F0_RBBM_SOFT_RESET 0x0000F0 218 #define S_0000F0_SOFT_RESET_CP(x) (((x) & 0x1) << 0) 219 #define G_0000F0_SOFT_RESET_CP(x) (((x) >> 0) & 0x1) 220 #define C_0000F0_SOFT_RESET_CP 0xFFFFFFFE 221 #define S_0000F0_SOFT_RESET_HI(x) (((x) & 0x1) << 1) 222 #define G_0000F0_SOFT_RESET_HI(x) (((x) >> 1) & 0x1) 223 #define C_0000F0_SOFT_RESET_HI 0xFFFFFFFD 224 #define S_0000F0_SOFT_RESET_VAP(x) (((x) & 0x1) << 2) 225 #define G_0000F0_SOFT_RESET_VAP(x) (((x) >> 2) & 0x1) 226 #define C_0000F0_SOFT_RESET_VAP 0xFFFFFFFB 227 #define S_0000F0_SOFT_RESET_RE(x) (((x) & 0x1) << 3) 228 #define G_0000F0_SOFT_RESET_RE(x) (((x) >> 3) & 0x1) 229 #define C_0000F0_SOFT_RESET_RE 0xFFFFFFF7 230 #define S_0000F0_SOFT_RESET_PP(x) (((x) & 0x1) << 4) 231 #define G_0000F0_SOFT_RESET_PP(x) (((x) >> 4) & 0x1) 232 #define C_0000F0_SOFT_RESET_PP 0xFFFFFFEF 233 #define S_0000F0_SOFT_RESET_E2(x) (((x) & 0x1) << 5) 234 #define G_0000F0_SOFT_RESET_E2(x) (((x) >> 5) & 0x1) 235 #define C_0000F0_SOFT_RESET_E2 0xFFFFFFDF 236 #define S_0000F0_SOFT_RESET_RB(x) (((x) & 0x1) << 6) 237 #define G_0000F0_SOFT_RESET_RB(x) (((x) >> 6) & 0x1) 238 #define C_0000F0_SOFT_RESET_RB 0xFFFFFFBF 239 #define S_0000F0_SOFT_RESET_HDP(x) (((x) & 0x1) << 7) 240 #define G_0000F0_SOFT_RESET_HDP(x) (((x) >> 7) & 0x1) 241 #define C_0000F0_SOFT_RESET_HDP 0xFFFFFF7F 242 #define S_0000F0_SOFT_RESET_MC(x) (((x) & 0x1) << 8) 243 #define G_0000F0_SOFT_RESET_MC(x) (((x) >> 8) & 0x1) 244 #define C_0000F0_SOFT_RESET_MC 0xFFFFFEFF 245 #define S_0000F0_SOFT_RESET_AIC(x) (((x) & 0x1) << 9) 246 #define G_0000F0_SOFT_RESET_AIC(x) (((x) >> 9) & 0x1) 247 #define C_0000F0_SOFT_RESET_AIC 0xFFFFFDFF 248 #define S_0000F0_SOFT_RESET_VIP(x) (((x) & 0x1) << 10) 249 #define G_0000F0_SOFT_RESET_VIP(x) (((x) >> 10) & 0x1) 250 #define C_0000F0_SOFT_RESET_VIP 0xFFFFFBFF 251 #define S_0000F0_SOFT_RESET_DISP(x) (((x) & 0x1) << 11) 252 #define G_0000F0_SOFT_RESET_DISP(x) (((x) >> 11) & 0x1) 253 #define C_0000F0_SOFT_RESET_DISP 0xFFFFF7FF 254 #define S_0000F0_SOFT_RESET_CG(x) (((x) & 0x1) << 12) 255 #define G_0000F0_SOFT_RESET_CG(x) (((x) >> 12) & 0x1) 256 #define C_0000F0_SOFT_RESET_CG 0xFFFFEFFF 257 #define S_0000F0_SOFT_RESET_GA(x) (((x) & 0x1) << 13) 258 #define G_0000F0_SOFT_RESET_GA(x) (((x) >> 13) & 0x1) 259 #define C_0000F0_SOFT_RESET_GA 0xFFFFDFFF 260 #define S_0000F0_SOFT_RESET_IDCT(x) (((x) & 0x1) << 14) 261 #define G_0000F0_SOFT_RESET_IDCT(x) (((x) >> 14) & 0x1) 262 #define C_0000F0_SOFT_RESET_IDCT 0xFFFFBFFF 263 264 #define R_00000D_SCLK_CNTL 0x00000D 265 #define S_00000D_SCLK_SRC_SEL(x) (((x) & 0x7) << 0) 266 #define G_00000D_SCLK_SRC_SEL(x) (((x) >> 0) & 0x7) 267 #define C_00000D_SCLK_SRC_SEL 0xFFFFFFF8 268 #define S_00000D_CP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 3) 269 #define G_00000D_CP_MAX_DYN_STOP_LAT(x) (((x) >> 3) & 0x1) 270 #define C_00000D_CP_MAX_DYN_STOP_LAT 0xFFFFFFF7 271 #define S_00000D_HDP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 4) 272 #define G_00000D_HDP_MAX_DYN_STOP_LAT(x) (((x) >> 4) & 0x1) 273 #define C_00000D_HDP_MAX_DYN_STOP_LAT 0xFFFFFFEF 274 #define S_00000D_TV_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 5) 275 #define G_00000D_TV_MAX_DYN_STOP_LAT(x) (((x) >> 5) & 0x1) 276 #define C_00000D_TV_MAX_DYN_STOP_LAT 0xFFFFFFDF 277 #define S_00000D_E2_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 6) 278 #define G_00000D_E2_MAX_DYN_STOP_LAT(x) (((x) >> 6) & 0x1) 279 #define C_00000D_E2_MAX_DYN_STOP_LAT 0xFFFFFFBF 280 #define S_00000D_SE_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 7) 281 #define G_00000D_SE_MAX_DYN_STOP_LAT(x) (((x) >> 7) & 0x1) 282 #define C_00000D_SE_MAX_DYN_STOP_LAT 0xFFFFFF7F 283 #define S_00000D_IDCT_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 8) 284 #define G_00000D_IDCT_MAX_DYN_STOP_LAT(x) (((x) >> 8) & 0x1) 285 #define C_00000D_IDCT_MAX_DYN_STOP_LAT 0xFFFFFEFF 286 #define S_00000D_VIP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 9) 287 #define G_00000D_VIP_MAX_DYN_STOP_LAT(x) (((x) >> 9) & 0x1) 288 #define C_00000D_VIP_MAX_DYN_STOP_LAT 0xFFFFFDFF 289 #define S_00000D_RE_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 10) 290 #define G_00000D_RE_MAX_DYN_STOP_LAT(x) (((x) >> 10) & 0x1) 291 #define C_00000D_RE_MAX_DYN_STOP_LAT 0xFFFFFBFF 292 #define S_00000D_PB_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 11) 293 #define G_00000D_PB_MAX_DYN_STOP_LAT(x) (((x) >> 11) & 0x1) 294 #define C_00000D_PB_MAX_DYN_STOP_LAT 0xFFFFF7FF 295 #define S_00000D_TAM_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 12) 296 #define G_00000D_TAM_MAX_DYN_STOP_LAT(x) (((x) >> 12) & 0x1) 297 #define C_00000D_TAM_MAX_DYN_STOP_LAT 0xFFFFEFFF 298 #define S_00000D_TDM_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 13) 299 #define G_00000D_TDM_MAX_DYN_STOP_LAT(x) (((x) >> 13) & 0x1) 300 #define C_00000D_TDM_MAX_DYN_STOP_LAT 0xFFFFDFFF 301 #define S_00000D_RB_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 14) 302 #define G_00000D_RB_MAX_DYN_STOP_LAT(x) (((x) >> 14) & 0x1) 303 #define C_00000D_RB_MAX_DYN_STOP_LAT 0xFFFFBFFF 304 #define S_00000D_FORCE_DISP2(x) (((x) & 0x1) << 15) 305 #define G_00000D_FORCE_DISP2(x) (((x) >> 15) & 0x1) 306 #define C_00000D_FORCE_DISP2 0xFFFF7FFF 307 #define S_00000D_FORCE_CP(x) (((x) & 0x1) << 16) 308 #define G_00000D_FORCE_CP(x) (((x) >> 16) & 0x1) 309 #define C_00000D_FORCE_CP 0xFFFEFFFF 310 #define S_00000D_FORCE_HDP(x) (((x) & 0x1) << 17) 311 #define G_00000D_FORCE_HDP(x) (((x) >> 17) & 0x1) 312 #define C_00000D_FORCE_HDP 0xFFFDFFFF 313 #define S_00000D_FORCE_DISP1(x) (((x) & 0x1) << 18) 314 #define G_00000D_FORCE_DISP1(x) (((x) >> 18) & 0x1) 315 #define C_00000D_FORCE_DISP1 0xFFFBFFFF 316 #define S_00000D_FORCE_TOP(x) (((x) & 0x1) << 19) 317 #define G_00000D_FORCE_TOP(x) (((x) >> 19) & 0x1) 318 #define C_00000D_FORCE_TOP 0xFFF7FFFF 319 #define S_00000D_FORCE_E2(x) (((x) & 0x1) << 20) 320 #define G_00000D_FORCE_E2(x) (((x) >> 20) & 0x1) 321 #define C_00000D_FORCE_E2 0xFFEFFFFF 322 #define S_00000D_FORCE_SE(x) (((x) & 0x1) << 21) 323 #define G_00000D_FORCE_SE(x) (((x) >> 21) & 0x1) 324 #define C_00000D_FORCE_SE 0xFFDFFFFF 325 #define S_00000D_FORCE_IDCT(x) (((x) & 0x1) << 22) 326 #define G_00000D_FORCE_IDCT(x) (((x) >> 22) & 0x1) 327 #define C_00000D_FORCE_IDCT 0xFFBFFFFF 328 #define S_00000D_FORCE_VIP(x) (((x) & 0x1) << 23) 329 #define G_00000D_FORCE_VIP(x) (((x) >> 23) & 0x1) 330 #define C_00000D_FORCE_VIP 0xFF7FFFFF 331 #define S_00000D_FORCE_RE(x) (((x) & 0x1) << 24) 332 #define G_00000D_FORCE_RE(x) (((x) >> 24) & 0x1) 333 #define C_00000D_FORCE_RE 0xFEFFFFFF 334 #define S_00000D_FORCE_PB(x) (((x) & 0x1) << 25) 335 #define G_00000D_FORCE_PB(x) (((x) >> 25) & 0x1) 336 #define C_00000D_FORCE_PB 0xFDFFFFFF 337 #define S_00000D_FORCE_TAM(x) (((x) & 0x1) << 26) 338 #define G_00000D_FORCE_TAM(x) (((x) >> 26) & 0x1) 339 #define C_00000D_FORCE_TAM 0xFBFFFFFF 340 #define S_00000D_FORCE_TDM(x) (((x) & 0x1) << 27) 341 #define G_00000D_FORCE_TDM(x) (((x) >> 27) & 0x1) 342 #define C_00000D_FORCE_TDM 0xF7FFFFFF 343 #define S_00000D_FORCE_RB(x) (((x) & 0x1) << 28) 344 #define G_00000D_FORCE_RB(x) (((x) >> 28) & 0x1) 345 #define C_00000D_FORCE_RB 0xEFFFFFFF 346 #define S_00000D_FORCE_TV_SCLK(x) (((x) & 0x1) << 29) 347 #define G_00000D_FORCE_TV_SCLK(x) (((x) >> 29) & 0x1) 348 #define C_00000D_FORCE_TV_SCLK 0xDFFFFFFF 349 #define S_00000D_FORCE_SUBPIC(x) (((x) & 0x1) << 30) 350 #define G_00000D_FORCE_SUBPIC(x) (((x) >> 30) & 0x1) 351 #define C_00000D_FORCE_SUBPIC 0xBFFFFFFF 352 #define S_00000D_FORCE_OV0(x) (((x) & 0x1) << 31) 353 #define G_00000D_FORCE_OV0(x) (((x) >> 31) & 0x1) 354 #define C_00000D_FORCE_OV0 0x7FFFFFFF 355 356 #endif 357