1 /* 2 * Copyright 2008 Advanced Micro Devices, Inc. 3 * Copyright 2008 Red Hat Inc. 4 * Copyright 2009 Jerome Glisse. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: Dave Airlie 25 * Alex Deucher 26 * Jerome Glisse 27 * 28 * $FreeBSD: head/sys/dev/drm2/radeon/r600_reg.h 254885 2013-08-25 19:37:15Z dumbbell $ 29 */ 30 #ifndef __R600_REG_H__ 31 #define __R600_REG_H__ 32 33 #define R600_PCIE_PORT_INDEX 0x0038 34 #define R600_PCIE_PORT_DATA 0x003c 35 36 #define R600_MC_VM_FB_LOCATION 0x2180 37 #define R600_MC_FB_BASE_MASK 0x0000FFFF 38 #define R600_MC_FB_BASE_SHIFT 0 39 #define R600_MC_FB_TOP_MASK 0xFFFF0000 40 #define R600_MC_FB_TOP_SHIFT 16 41 #define R600_MC_VM_AGP_TOP 0x2184 42 #define R600_MC_AGP_TOP_MASK 0x0003FFFF 43 #define R600_MC_AGP_TOP_SHIFT 0 44 #define R600_MC_VM_AGP_BOT 0x2188 45 #define R600_MC_AGP_BOT_MASK 0x0003FFFF 46 #define R600_MC_AGP_BOT_SHIFT 0 47 #define R600_MC_VM_AGP_BASE 0x218c 48 #define R600_MC_VM_SYSTEM_APERTURE_LOW_ADDR 0x2190 49 #define R600_LOGICAL_PAGE_NUMBER_MASK 0x000FFFFF 50 #define R600_LOGICAL_PAGE_NUMBER_SHIFT 0 51 #define R600_MC_VM_SYSTEM_APERTURE_HIGH_ADDR 0x2194 52 #define R600_MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR 0x2198 53 54 #define R700_MC_VM_FB_LOCATION 0x2024 55 #define R700_MC_FB_BASE_MASK 0x0000FFFF 56 #define R700_MC_FB_BASE_SHIFT 0 57 #define R700_MC_FB_TOP_MASK 0xFFFF0000 58 #define R700_MC_FB_TOP_SHIFT 16 59 #define R700_MC_VM_AGP_TOP 0x2028 60 #define R700_MC_AGP_TOP_MASK 0x0003FFFF 61 #define R700_MC_AGP_TOP_SHIFT 0 62 #define R700_MC_VM_AGP_BOT 0x202c 63 #define R700_MC_AGP_BOT_MASK 0x0003FFFF 64 #define R700_MC_AGP_BOT_SHIFT 0 65 #define R700_MC_VM_AGP_BASE 0x2030 66 #define R700_MC_VM_SYSTEM_APERTURE_LOW_ADDR 0x2034 67 #define R700_LOGICAL_PAGE_NUMBER_MASK 0x000FFFFF 68 #define R700_LOGICAL_PAGE_NUMBER_SHIFT 0 69 #define R700_MC_VM_SYSTEM_APERTURE_HIGH_ADDR 0x2038 70 #define R700_MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR 0x203c 71 72 #define R600_RAMCFG 0x2408 73 # define R600_CHANSIZE (1 << 7) 74 # define R600_CHANSIZE_OVERRIDE (1 << 10) 75 76 77 #define R600_GENERAL_PWRMGT 0x618 78 # define R600_OPEN_DRAIN_PADS (1 << 11) 79 80 #define R600_LOWER_GPIO_ENABLE 0x710 81 #define R600_CTXSW_VID_LOWER_GPIO_CNTL 0x718 82 #define R600_HIGH_VID_LOWER_GPIO_CNTL 0x71c 83 #define R600_MEDIUM_VID_LOWER_GPIO_CNTL 0x720 84 #define R600_LOW_VID_LOWER_GPIO_CNTL 0x724 85 86 #define R600_D1GRPH_SWAP_CONTROL 0x610C 87 # define R600_D1GRPH_SWAP_ENDIAN_NONE (0 << 0) 88 # define R600_D1GRPH_SWAP_ENDIAN_16BIT (1 << 0) 89 # define R600_D1GRPH_SWAP_ENDIAN_32BIT (2 << 0) 90 # define R600_D1GRPH_SWAP_ENDIAN_64BIT (3 << 0) 91 92 #define R600_HDP_NONSURFACE_BASE 0x2c04 93 94 #define R600_BUS_CNTL 0x5420 95 # define R600_BIOS_ROM_DIS (1 << 1) 96 #define R600_CONFIG_CNTL 0x5424 97 #define R600_CONFIG_MEMSIZE 0x5428 98 #define R600_CONFIG_F0_BASE 0x542C 99 #define R600_CONFIG_APER_SIZE 0x5430 100 101 #define R600_BIF_FB_EN 0x5490 102 #define R600_FB_READ_EN (1 << 0) 103 #define R600_FB_WRITE_EN (1 << 1) 104 105 #define R600_CITF_CNTL 0x200c 106 #define R600_BLACKOUT_MASK 0x00000003 107 108 #define R700_MC_CITF_CNTL 0x25c0 109 110 #define R600_ROM_CNTL 0x1600 111 # define R600_SCK_OVERWRITE (1 << 1) 112 # define R600_SCK_PRESCALE_CRYSTAL_CLK_SHIFT 28 113 # define R600_SCK_PRESCALE_CRYSTAL_CLK_MASK (0xf << 28) 114 115 #define R600_CG_SPLL_FUNC_CNTL 0x600 116 # define R600_SPLL_BYPASS_EN (1 << 3) 117 #define R600_CG_SPLL_STATUS 0x60c 118 # define R600_SPLL_CHG_STATUS (1 << 1) 119 120 #define R600_BIOS_0_SCRATCH 0x1724 121 #define R600_BIOS_1_SCRATCH 0x1728 122 #define R600_BIOS_2_SCRATCH 0x172c 123 #define R600_BIOS_3_SCRATCH 0x1730 124 #define R600_BIOS_4_SCRATCH 0x1734 125 #define R600_BIOS_5_SCRATCH 0x1738 126 #define R600_BIOS_6_SCRATCH 0x173c 127 #define R600_BIOS_7_SCRATCH 0x1740 128 129 /* Audio, these regs were reverse enginered, 130 * so the chance is high that the naming is wrong 131 * R6xx+ ??? */ 132 133 /* Audio clocks */ 134 #define R600_AUDIO_PLL1_MUL 0x0514 135 #define R600_AUDIO_PLL1_DIV 0x0518 136 #define R600_AUDIO_PLL2_MUL 0x0524 137 #define R600_AUDIO_PLL2_DIV 0x0528 138 #define R600_AUDIO_CLK_SRCSEL 0x0534 139 140 /* Audio general */ 141 #define R600_AUDIO_ENABLE 0x7300 142 #define R600_AUDIO_TIMING 0x7344 143 144 /* Audio params */ 145 #define R600_AUDIO_VENDOR_ID 0x7380 146 #define R600_AUDIO_REVISION_ID 0x7384 147 #define R600_AUDIO_ROOT_NODE_COUNT 0x7388 148 #define R600_AUDIO_NID1_NODE_COUNT 0x738c 149 #define R600_AUDIO_NID1_TYPE 0x7390 150 #define R600_AUDIO_SUPPORTED_SIZE_RATE 0x7394 151 #define R600_AUDIO_SUPPORTED_CODEC 0x7398 152 #define R600_AUDIO_SUPPORTED_POWER_STATES 0x739c 153 #define R600_AUDIO_NID2_CAPS 0x73a0 154 #define R600_AUDIO_NID3_CAPS 0x73a4 155 #define R600_AUDIO_NID3_PIN_CAPS 0x73a8 156 157 /* Audio conn list */ 158 #define R600_AUDIO_CONN_LIST_LEN 0x73ac 159 #define R600_AUDIO_CONN_LIST 0x73b0 160 161 /* Audio verbs */ 162 #define R600_AUDIO_RATE_BPS_CHANNEL 0x73c0 163 #define R600_AUDIO_PLAYING 0x73c4 164 #define R600_AUDIO_IMPLEMENTATION_ID 0x73c8 165 #define R600_AUDIO_CONFIG_DEFAULT 0x73cc 166 #define R600_AUDIO_PIN_SENSE 0x73d0 167 #define R600_AUDIO_PIN_WIDGET_CNTL 0x73d4 168 #define R600_AUDIO_STATUS_BITS 0x73d8 169 170 #define DCE2_HDMI_OFFSET0 (0x7400 - 0x7400) 171 #define DCE2_HDMI_OFFSET1 (0x7700 - 0x7400) 172 /* DCE3.2 second instance starts at 0x7800 */ 173 #define DCE3_HDMI_OFFSET0 (0x7400 - 0x7400) 174 #define DCE3_HDMI_OFFSET1 (0x7800 - 0x7400) 175 176 #endif 177