1 /* 2 * Copyright 2008 Red Hat Inc. 3 * Copyright 2009 Jerome Glisse. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 * 23 * Authors: 24 * Dave Airlie 25 * Jerome Glisse <glisse@freedesktop.org> 26 * 27 * $FreeBSD: head/sys/dev/drm2/radeon/radeon_agp.c 254885 2013-08-25 19:37:15Z dumbbell $ 28 */ 29 30 #include <drm/drmP.h> 31 #include "radeon.h" 32 #include <uapi_drm/radeon_drm.h> 33 34 #if __OS_HAS_AGP 35 36 struct radeon_agpmode_quirk { 37 u32 hostbridge_vendor; 38 u32 hostbridge_device; 39 u32 chip_vendor; 40 u32 chip_device; 41 u32 subsys_vendor; 42 u32 subsys_device; 43 u32 default_mode; 44 }; 45 46 static struct radeon_agpmode_quirk radeon_agpmode_quirk_list[] = { 47 /* Intel E7505 Memory Controller Hub / RV350 AR [Radeon 9600XT] Needs AGPMode 4 (deb #515326) */ 48 { PCI_VENDOR_ID_INTEL, 0x2550, PCI_VENDOR_ID_ATI, 0x4152, 0x1458, 0x4038, 4}, 49 /* Intel 82865G/PE/P DRAM Controller/Host-Hub / Mobility 9800 Needs AGPMode 4 (deb #462590) */ 50 { PCI_VENDOR_ID_INTEL, 0x2570, PCI_VENDOR_ID_ATI, 0x4a4e, PCI_VENDOR_ID_DELL, 0x5106, 4}, 51 /* Intel 82865G/PE/P DRAM Controller/Host-Hub / RV280 [Radeon 9200 SE] Needs AGPMode 4 (lp #300304) */ 52 { PCI_VENDOR_ID_INTEL, 0x2570, PCI_VENDOR_ID_ATI, 0x5964, 53 0x148c, 0x2073, 4}, 54 /* Intel 82855PM Processor to I/O Controller / Mobility M6 LY Needs AGPMode 1 (deb #467235) */ 55 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c59, 56 PCI_VENDOR_ID_IBM, 0x052f, 1}, 57 /* Intel 82855PM host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #195051) */ 58 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4e50, 59 PCI_VENDOR_ID_IBM, 0x0550, 1}, 60 /* Intel 82855PM host bridge / Mobility M7 needs AGPMode 1 */ 61 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c57, 62 PCI_VENDOR_ID_IBM, 0x0530, 1}, 63 /* Intel 82855PM host bridge / FireGL Mobility T2 RV350 Needs AGPMode 2 (fdo #20647) */ 64 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4e54, 65 PCI_VENDOR_ID_IBM, 0x054f, 2}, 66 /* Intel 82855PM host bridge / Mobility M9+ / VaioPCG-V505DX Needs AGPMode 2 (fdo #17928) */ 67 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x5c61, 68 PCI_VENDOR_ID_SONY, 0x816b, 2}, 69 /* Intel 82855PM Processor to I/O Controller / Mobility M9+ Needs AGPMode 8 (phoronix forum) */ 70 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x5c61, 71 PCI_VENDOR_ID_SONY, 0x8195, 8}, 72 /* Intel 82830 830 Chipset Host Bridge / Mobility M6 LY Needs AGPMode 2 (fdo #17360)*/ 73 { PCI_VENDOR_ID_INTEL, 0x3575, PCI_VENDOR_ID_ATI, 0x4c59, 74 PCI_VENDOR_ID_DELL, 0x00e3, 2}, 75 /* Intel 82852/82855 host bridge / Mobility FireGL 9000 RV250 Needs AGPMode 1 (lp #296617) */ 76 { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4c66, 77 PCI_VENDOR_ID_DELL, 0x0149, 1}, 78 /* Intel 82855PM host bridge / Mobility FireGL 9000 RV250 Needs AGPMode 1 for suspend/resume */ 79 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c66, 80 PCI_VENDOR_ID_IBM, 0x0531, 1}, 81 /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (deb #467460) */ 82 { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50, 83 0x1025, 0x0061, 1}, 84 /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #203007) */ 85 { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50, 86 0x1025, 0x0064, 1}, 87 /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #141551) */ 88 { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50, 89 PCI_VENDOR_ID_ASUSTEK, 0x1942, 1}, 90 /* Intel 82852/82855 host bridge / Mobility 9600/9700 Needs AGPMode 1 (deb #510208) */ 91 { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50, 92 0x10cf, 0x127f, 1}, 93 /* ASRock K7VT4A+ AGP 8x / ATI Radeon 9250 AGP Needs AGPMode 4 (lp #133192) */ 94 { 0x1849, 0x3189, PCI_VENDOR_ID_ATI, 0x5960, 95 0x1787, 0x5960, 4}, 96 /* VIA K8M800 Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 4 (fdo #12544) */ 97 { PCI_VENDOR_ID_VIA, 0x0204, PCI_VENDOR_ID_ATI, 0x5960, 98 0x17af, 0x2020, 4}, 99 /* VIA KT880 Host Bridge / RV350 [Radeon 9550] Needs AGPMode 4 (fdo #19981) */ 100 { PCI_VENDOR_ID_VIA, 0x0269, PCI_VENDOR_ID_ATI, 0x4153, 101 PCI_VENDOR_ID_ASUSTEK, 0x003c, 4}, 102 /* VIA VT8363 Host Bridge / R200 QL [Radeon 8500] Needs AGPMode 2 (lp #141551) */ 103 { PCI_VENDOR_ID_VIA, 0x0305, PCI_VENDOR_ID_ATI, 0x514c, 104 PCI_VENDOR_ID_ATI, 0x013a, 2}, 105 /* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 (deb #515512) */ 106 { PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_ATI, 0x5960, 107 PCI_VENDOR_ID_ASUSTEK, 0x004c, 2}, 108 /* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 */ 109 { PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_ATI, 0x5960, 110 PCI_VENDOR_ID_ASUSTEK, 0x0054, 2}, 111 /* VIA VT8377 Host Bridge / R200 QM [Radeon 9100] Needs AGPMode 4 (deb #461144) */ 112 { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x514d, 113 0x174b, 0x7149, 4}, 114 /* VIA VT8377 Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 4 (lp #312693) */ 115 { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x5960, 116 0x1462, 0x0380, 4}, 117 /* VIA VT8377 Host Bridge / RV280 Needs AGPMode 4 (ati ML) */ 118 { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x5964, 119 0x148c, 0x2073, 4}, 120 /* ATI Host Bridge / RV280 [M9+] Needs AGPMode 1 (phoronix forum) */ 121 { PCI_VENDOR_ID_ATI, 0xcbb2, PCI_VENDOR_ID_ATI, 0x5c61, 122 PCI_VENDOR_ID_SONY, 0x8175, 1}, 123 /* HP Host Bridge / R300 [FireGL X1] Needs AGPMode 2 (fdo #7770) */ 124 { PCI_VENDOR_ID_HP, 0x122e, PCI_VENDOR_ID_ATI, 0x4e47, 125 PCI_VENDOR_ID_ATI, 0x0152, 2}, 126 { 0, 0, 0, 0, 0, 0, 0 }, 127 }; 128 #endif 129 130 int radeon_agp_init(struct radeon_device *rdev) 131 { 132 #if __OS_HAS_AGP 133 struct radeon_agpmode_quirk *p = radeon_agpmode_quirk_list; 134 struct drm_agp_mode mode; 135 struct drm_agp_info info; 136 uint32_t agp_status; 137 int default_mode; 138 bool is_v3; 139 int ret; 140 141 /* Acquire AGP. */ 142 ret = drm_agp_acquire(rdev->ddev); 143 if (ret) { 144 DRM_ERROR("Unable to acquire AGP: %d\n", ret); 145 return ret; 146 } 147 148 ret = drm_agp_info(rdev->ddev, &info); 149 if (ret) { 150 drm_agp_release(rdev->ddev); 151 DRM_ERROR("Unable to get AGP info: %d\n", ret); 152 return ret; 153 } 154 155 if (rdev->ddev->agp->agp_info.ai_aperture_size < 32) { 156 drm_agp_release(rdev->ddev); 157 dev_warn(rdev->dev, "AGP aperture too small (%zuM) " 158 "need at least 32M, disabling AGP\n", 159 rdev->ddev->agp->agp_info.ai_aperture_size); 160 return -EINVAL; 161 } 162 163 mode.mode = info.mode; 164 /* chips with the agp to pcie bridge don't have the AGP_STATUS register 165 * Just use the whatever mode the host sets up. 166 */ 167 if (rdev->family <= CHIP_RV350) 168 agp_status = (RREG32(RADEON_AGP_STATUS) | RADEON_AGPv3_MODE) & mode.mode; 169 else 170 agp_status = mode.mode; 171 is_v3 = !!(agp_status & RADEON_AGPv3_MODE); 172 173 if (is_v3) { 174 default_mode = (agp_status & RADEON_AGPv3_8X_MODE) ? 8 : 4; 175 } else { 176 if (agp_status & RADEON_AGP_4X_MODE) { 177 default_mode = 4; 178 } else if (agp_status & RADEON_AGP_2X_MODE) { 179 default_mode = 2; 180 } else { 181 default_mode = 1; 182 } 183 } 184 185 /* Apply AGPMode Quirks */ 186 while (p && p->chip_device != 0) { 187 if (info.id_vendor == p->hostbridge_vendor && 188 info.id_device == p->hostbridge_device && 189 rdev->ddev->pci_vendor == p->chip_vendor && 190 rdev->ddev->pci_device == p->chip_device && 191 rdev->ddev->pci_subvendor == p->subsys_vendor && 192 rdev->ddev->pci_subdevice == p->subsys_device) { 193 default_mode = p->default_mode; 194 } 195 ++p; 196 } 197 198 if (radeon_agpmode > 0) { 199 if ((radeon_agpmode < (is_v3 ? 4 : 1)) || 200 (radeon_agpmode > (is_v3 ? 8 : 4)) || 201 (radeon_agpmode & (radeon_agpmode - 1))) { 202 DRM_ERROR("Illegal AGP Mode: %d (valid %s), leaving at %d\n", 203 radeon_agpmode, is_v3 ? "4, 8" : "1, 2, 4", 204 default_mode); 205 radeon_agpmode = default_mode; 206 } else { 207 DRM_INFO("AGP mode requested: %d\n", radeon_agpmode); 208 } 209 } else { 210 radeon_agpmode = default_mode; 211 } 212 213 mode.mode &= ~RADEON_AGP_MODE_MASK; 214 if (is_v3) { 215 switch (radeon_agpmode) { 216 case 8: 217 mode.mode |= RADEON_AGPv3_8X_MODE; 218 break; 219 case 4: 220 default: 221 mode.mode |= RADEON_AGPv3_4X_MODE; 222 break; 223 } 224 } else { 225 switch (radeon_agpmode) { 226 case 4: 227 mode.mode |= RADEON_AGP_4X_MODE; 228 break; 229 case 2: 230 mode.mode |= RADEON_AGP_2X_MODE; 231 break; 232 case 1: 233 default: 234 mode.mode |= RADEON_AGP_1X_MODE; 235 break; 236 } 237 } 238 239 mode.mode &= ~RADEON_AGP_FW_MODE; /* disable fw */ 240 ret = drm_agp_enable(rdev->ddev, mode); 241 if (ret) { 242 DRM_ERROR("Unable to enable AGP (mode = 0x%lx)\n", mode.mode); 243 drm_agp_release(rdev->ddev); 244 return ret; 245 } 246 247 rdev->mc.agp_base = rdev->ddev->agp->agp_info.ai_aperture_base; 248 rdev->mc.gtt_size = rdev->ddev->agp->agp_info.ai_aperture_size << 20; 249 rdev->mc.gtt_start = rdev->mc.agp_base; 250 rdev->mc.gtt_end = rdev->mc.gtt_start + rdev->mc.gtt_size - 1; 251 dev_info(rdev->dev, "GTT: %juM 0x%08jX - 0x%08jX\n", 252 (uintmax_t)rdev->mc.gtt_size >> 20, (uintmax_t)rdev->mc.gtt_start, (uintmax_t)rdev->mc.gtt_end); 253 254 /* workaround some hw issues */ 255 if (rdev->family < CHIP_R200) { 256 WREG32(RADEON_AGP_CNTL, RREG32(RADEON_AGP_CNTL) | 0x000e0000); 257 } 258 return 0; 259 #else 260 return 0; 261 #endif 262 } 263 264 void radeon_agp_resume(struct radeon_device *rdev) 265 { 266 #if __OS_HAS_AGP 267 int r; 268 if (rdev->flags & RADEON_IS_AGP) { 269 r = radeon_agp_init(rdev); 270 if (r) 271 dev_warn(rdev->dev, "radeon AGP reinit failed\n"); 272 } 273 #endif 274 } 275 276 void radeon_agp_fini(struct radeon_device *rdev) 277 { 278 #if __OS_HAS_AGP 279 if (rdev->ddev->agp && rdev->ddev->agp->acquired) { 280 drm_agp_release(rdev->ddev); 281 } 282 #endif 283 } 284 285 void radeon_agp_suspend(struct radeon_device *rdev) 286 { 287 radeon_agp_fini(rdev); 288 } 289