1 /* 2 * Copyright 2014 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Slava Grigorev <slava.grigorev@amd.com> 23 */ 24 25 #include <linux/gcd.h> 26 #include <drm/drmP.h> 27 #include <drm/drm_crtc.h> 28 #include "radeon.h" 29 #include "atom.h" 30 #include "radeon_audio.h" 31 32 static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder, 33 struct drm_display_mode *mode); 34 static void radeon_audio_dp_mode_set(struct drm_encoder *encoder, 35 struct drm_display_mode *mode); 36 37 static const u32 pin_offsets[7] = 38 { 39 (0x5e00 - 0x5e00), 40 (0x5e18 - 0x5e00), 41 (0x5e30 - 0x5e00), 42 (0x5e48 - 0x5e00), 43 (0x5e60 - 0x5e00), 44 (0x5e78 - 0x5e00), 45 (0x5e90 - 0x5e00), 46 }; 47 48 static u32 radeon_audio_rreg(struct radeon_device *rdev, u32 offset, u32 reg) 49 { 50 return RREG32(reg); 51 } 52 53 static void radeon_audio_wreg(struct radeon_device *rdev, u32 offset, 54 u32 reg, u32 v) 55 { 56 WREG32(reg, v); 57 } 58 59 static struct radeon_audio_basic_funcs r600_funcs = { 60 .endpoint_rreg = radeon_audio_rreg, 61 .endpoint_wreg = radeon_audio_wreg, 62 .enable = r600_audio_enable, 63 }; 64 65 static struct radeon_audio_basic_funcs dce32_funcs = { 66 .endpoint_rreg = radeon_audio_rreg, 67 .endpoint_wreg = radeon_audio_wreg, 68 .enable = r600_audio_enable, 69 }; 70 71 static struct radeon_audio_basic_funcs dce4_funcs = { 72 .endpoint_rreg = radeon_audio_rreg, 73 .endpoint_wreg = radeon_audio_wreg, 74 .enable = dce4_audio_enable, 75 }; 76 77 static struct radeon_audio_basic_funcs dce6_funcs = { 78 .endpoint_rreg = dce6_endpoint_rreg, 79 .endpoint_wreg = dce6_endpoint_wreg, 80 .enable = dce6_audio_enable, 81 }; 82 83 static struct radeon_audio_funcs r600_hdmi_funcs = { 84 .get_pin = r600_audio_get_pin, 85 .set_dto = r600_hdmi_audio_set_dto, 86 .update_acr = r600_hdmi_update_acr, 87 .set_vbi_packet = r600_set_vbi_packet, 88 .set_avi_packet = r600_set_avi_packet, 89 .set_audio_packet = r600_set_audio_packet, 90 .set_mute = r600_set_mute, 91 .mode_set = radeon_audio_hdmi_mode_set, 92 .dpms = r600_hdmi_enable, 93 }; 94 95 static struct radeon_audio_funcs dce32_hdmi_funcs = { 96 .get_pin = r600_audio_get_pin, 97 .write_sad_regs = dce3_2_afmt_write_sad_regs, 98 .write_speaker_allocation = dce3_2_afmt_hdmi_write_speaker_allocation, 99 .set_dto = dce3_2_audio_set_dto, 100 .update_acr = dce3_2_hdmi_update_acr, 101 .set_vbi_packet = r600_set_vbi_packet, 102 .set_avi_packet = r600_set_avi_packet, 103 .set_audio_packet = dce3_2_set_audio_packet, 104 .set_mute = dce3_2_set_mute, 105 .mode_set = radeon_audio_hdmi_mode_set, 106 .dpms = r600_hdmi_enable, 107 }; 108 109 static struct radeon_audio_funcs dce32_dp_funcs = { 110 .get_pin = r600_audio_get_pin, 111 .write_sad_regs = dce3_2_afmt_write_sad_regs, 112 .write_speaker_allocation = dce3_2_afmt_dp_write_speaker_allocation, 113 .set_dto = dce3_2_audio_set_dto, 114 .set_avi_packet = r600_set_avi_packet, 115 .set_audio_packet = dce3_2_set_audio_packet, 116 }; 117 118 static struct radeon_audio_funcs dce4_hdmi_funcs = { 119 .get_pin = r600_audio_get_pin, 120 .write_sad_regs = evergreen_hdmi_write_sad_regs, 121 .write_speaker_allocation = dce4_afmt_hdmi_write_speaker_allocation, 122 .write_latency_fields = dce4_afmt_write_latency_fields, 123 .set_dto = dce4_hdmi_audio_set_dto, 124 .update_acr = evergreen_hdmi_update_acr, 125 .set_vbi_packet = dce4_set_vbi_packet, 126 .set_color_depth = dce4_hdmi_set_color_depth, 127 .set_avi_packet = evergreen_set_avi_packet, 128 .set_audio_packet = dce4_set_audio_packet, 129 .set_mute = dce4_set_mute, 130 .mode_set = radeon_audio_hdmi_mode_set, 131 .dpms = evergreen_hdmi_enable, 132 }; 133 134 static struct radeon_audio_funcs dce4_dp_funcs = { 135 .get_pin = r600_audio_get_pin, 136 .write_sad_regs = evergreen_hdmi_write_sad_regs, 137 .write_speaker_allocation = dce4_afmt_dp_write_speaker_allocation, 138 .write_latency_fields = dce4_afmt_write_latency_fields, 139 .set_dto = dce4_dp_audio_set_dto, 140 .set_avi_packet = evergreen_set_avi_packet, 141 .set_audio_packet = dce4_set_audio_packet, 142 .mode_set = radeon_audio_dp_mode_set, 143 .dpms = evergreen_dp_enable, 144 }; 145 146 static struct radeon_audio_funcs dce6_hdmi_funcs = { 147 .select_pin = dce6_afmt_select_pin, 148 .get_pin = dce6_audio_get_pin, 149 .write_sad_regs = dce6_afmt_write_sad_regs, 150 .write_speaker_allocation = dce6_afmt_hdmi_write_speaker_allocation, 151 .write_latency_fields = dce6_afmt_write_latency_fields, 152 .set_dto = dce6_hdmi_audio_set_dto, 153 .update_acr = evergreen_hdmi_update_acr, 154 .set_vbi_packet = dce4_set_vbi_packet, 155 .set_color_depth = dce4_hdmi_set_color_depth, 156 .set_avi_packet = evergreen_set_avi_packet, 157 .set_audio_packet = dce4_set_audio_packet, 158 .set_mute = dce4_set_mute, 159 .mode_set = radeon_audio_hdmi_mode_set, 160 .dpms = evergreen_hdmi_enable, 161 }; 162 163 static struct radeon_audio_funcs dce6_dp_funcs = { 164 .select_pin = dce6_afmt_select_pin, 165 .get_pin = dce6_audio_get_pin, 166 .write_sad_regs = dce6_afmt_write_sad_regs, 167 .write_speaker_allocation = dce6_afmt_dp_write_speaker_allocation, 168 .write_latency_fields = dce6_afmt_write_latency_fields, 169 .set_dto = dce6_dp_audio_set_dto, 170 .set_avi_packet = evergreen_set_avi_packet, 171 .set_audio_packet = dce4_set_audio_packet, 172 .mode_set = radeon_audio_dp_mode_set, 173 .dpms = evergreen_dp_enable, 174 }; 175 176 static void radeon_audio_enable(struct radeon_device *rdev, 177 struct r600_audio_pin *pin, u8 enable_mask) 178 { 179 struct drm_encoder *encoder; 180 struct radeon_encoder *radeon_encoder; 181 struct radeon_encoder_atom_dig *dig; 182 int pin_count = 0; 183 184 if (!pin) 185 return; 186 187 if (rdev->mode_info.mode_config_initialized) { 188 list_for_each_entry(encoder, &rdev->ddev->mode_config.encoder_list, head) { 189 if (radeon_encoder_is_digital(encoder)) { 190 radeon_encoder = to_radeon_encoder(encoder); 191 dig = radeon_encoder->enc_priv; 192 if (dig->pin == pin) 193 pin_count++; 194 } 195 } 196 197 if ((pin_count > 1) && (enable_mask == 0)) 198 return; 199 } 200 201 if (rdev->audio.funcs->enable) 202 rdev->audio.funcs->enable(rdev, pin, enable_mask); 203 } 204 205 static void radeon_audio_interface_init(struct radeon_device *rdev) 206 { 207 if (ASIC_IS_DCE6(rdev)) { 208 rdev->audio.funcs = &dce6_funcs; 209 rdev->audio.hdmi_funcs = &dce6_hdmi_funcs; 210 rdev->audio.dp_funcs = &dce6_dp_funcs; 211 } else if (ASIC_IS_DCE4(rdev)) { 212 rdev->audio.funcs = &dce4_funcs; 213 rdev->audio.hdmi_funcs = &dce4_hdmi_funcs; 214 rdev->audio.dp_funcs = &dce4_dp_funcs; 215 } else if (ASIC_IS_DCE32(rdev)) { 216 rdev->audio.funcs = &dce32_funcs; 217 rdev->audio.hdmi_funcs = &dce32_hdmi_funcs; 218 rdev->audio.dp_funcs = &dce32_dp_funcs; 219 } else { 220 rdev->audio.funcs = &r600_funcs; 221 rdev->audio.hdmi_funcs = &r600_hdmi_funcs; 222 rdev->audio.dp_funcs = 0; 223 } 224 } 225 226 static int radeon_audio_chipset_supported(struct radeon_device *rdev) 227 { 228 return ASIC_IS_DCE2(rdev) && !ASIC_IS_NODCE(rdev); 229 } 230 231 int radeon_audio_init(struct radeon_device *rdev) 232 { 233 int i; 234 235 if (!radeon_audio || !radeon_audio_chipset_supported(rdev)) 236 return 0; 237 238 rdev->audio.enabled = true; 239 240 if (ASIC_IS_DCE83(rdev)) /* KB: 2 streams, 3 endpoints */ 241 rdev->audio.num_pins = 3; 242 else if (ASIC_IS_DCE81(rdev)) /* KV: 4 streams, 7 endpoints */ 243 rdev->audio.num_pins = 7; 244 else if (ASIC_IS_DCE8(rdev)) /* BN/HW: 6 streams, 7 endpoints */ 245 rdev->audio.num_pins = 7; 246 else if (ASIC_IS_DCE64(rdev)) /* OL: 2 streams, 2 endpoints */ 247 rdev->audio.num_pins = 2; 248 else if (ASIC_IS_DCE61(rdev)) /* TN: 4 streams, 6 endpoints */ 249 rdev->audio.num_pins = 6; 250 else if (ASIC_IS_DCE6(rdev)) /* SI: 6 streams, 6 endpoints */ 251 rdev->audio.num_pins = 6; 252 else 253 rdev->audio.num_pins = 1; 254 255 for (i = 0; i < rdev->audio.num_pins; i++) { 256 rdev->audio.pin[i].channels = -1; 257 rdev->audio.pin[i].rate = -1; 258 rdev->audio.pin[i].bits_per_sample = -1; 259 rdev->audio.pin[i].status_bits = 0; 260 rdev->audio.pin[i].category_code = 0; 261 rdev->audio.pin[i].connected = false; 262 rdev->audio.pin[i].offset = pin_offsets[i]; 263 rdev->audio.pin[i].id = i; 264 } 265 266 radeon_audio_interface_init(rdev); 267 268 /* disable audio. it will be set up later */ 269 for (i = 0; i < rdev->audio.num_pins; i++) 270 radeon_audio_enable(rdev, &rdev->audio.pin[i], 0); 271 272 return 0; 273 } 274 275 u32 radeon_audio_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg) 276 { 277 if (rdev->audio.funcs->endpoint_rreg) 278 return rdev->audio.funcs->endpoint_rreg(rdev, offset, reg); 279 280 return 0; 281 } 282 283 void radeon_audio_endpoint_wreg(struct radeon_device *rdev, u32 offset, 284 u32 reg, u32 v) 285 { 286 if (rdev->audio.funcs->endpoint_wreg) 287 rdev->audio.funcs->endpoint_wreg(rdev, offset, reg, v); 288 } 289 290 static void radeon_audio_write_sad_regs(struct drm_encoder *encoder) 291 { 292 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 293 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 294 struct cea_sad *sads; 295 int sad_count; 296 297 if (!connector) 298 return; 299 300 sad_count = drm_edid_to_sad(radeon_connector_edid(connector), &sads); 301 if (sad_count <= 0) { 302 DRM_ERROR("Couldn't read SADs: %d\n", sad_count); 303 return; 304 } 305 BUG_ON(!sads); 306 307 if (radeon_encoder->audio && radeon_encoder->audio->write_sad_regs) 308 radeon_encoder->audio->write_sad_regs(encoder, sads, sad_count); 309 310 kfree(sads); 311 } 312 313 static void radeon_audio_write_speaker_allocation(struct drm_encoder *encoder) 314 { 315 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 316 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 317 u8 *sadb = NULL; 318 int sad_count; 319 320 if (!connector) 321 return; 322 323 sad_count = drm_edid_to_speaker_allocation(radeon_connector_edid(connector), 324 &sadb); 325 if (sad_count < 0) { 326 DRM_DEBUG("Couldn't read Speaker Allocation Data Block: %d\n", 327 sad_count); 328 sad_count = 0; 329 } 330 331 if (radeon_encoder->audio && radeon_encoder->audio->write_speaker_allocation) 332 radeon_encoder->audio->write_speaker_allocation(encoder, sadb, sad_count); 333 334 kfree(sadb); 335 } 336 337 static void radeon_audio_write_latency_fields(struct drm_encoder *encoder, 338 struct drm_display_mode *mode) 339 { 340 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 341 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 342 343 if (!connector) 344 return; 345 346 if (radeon_encoder->audio && radeon_encoder->audio->write_latency_fields) 347 radeon_encoder->audio->write_latency_fields(encoder, connector, mode); 348 } 349 350 struct r600_audio_pin* radeon_audio_get_pin(struct drm_encoder *encoder) 351 { 352 struct radeon_device *rdev = encoder->dev->dev_private; 353 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 354 355 if (radeon_encoder->audio && radeon_encoder->audio->get_pin) 356 return radeon_encoder->audio->get_pin(rdev); 357 358 return NULL; 359 } 360 361 static void radeon_audio_select_pin(struct drm_encoder *encoder) 362 { 363 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 364 365 if (radeon_encoder->audio && radeon_encoder->audio->select_pin) 366 radeon_encoder->audio->select_pin(encoder); 367 } 368 369 void radeon_audio_detect(struct drm_connector *connector, 370 struct drm_encoder *encoder, 371 enum drm_connector_status status) 372 { 373 struct drm_device *dev = connector->dev; 374 struct radeon_device *rdev = dev->dev_private; 375 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 376 struct radeon_encoder_atom_dig *dig; 377 378 if (!radeon_audio_chipset_supported(rdev)) 379 return; 380 381 if (!radeon_encoder_is_digital(encoder)) 382 return; 383 384 dig = radeon_encoder->enc_priv; 385 386 if (status == connector_status_connected) { 387 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) { 388 struct radeon_connector *radeon_connector = to_radeon_connector(connector); 389 390 if (radeon_dp_getsinktype(radeon_connector) == 391 CONNECTOR_OBJECT_ID_DISPLAYPORT) 392 radeon_encoder->audio = rdev->audio.dp_funcs; 393 else 394 radeon_encoder->audio = rdev->audio.hdmi_funcs; 395 } else { 396 radeon_encoder->audio = rdev->audio.hdmi_funcs; 397 } 398 399 if (drm_detect_monitor_audio(radeon_connector_edid(connector))) { 400 if (!dig->pin) 401 dig->pin = radeon_audio_get_pin(encoder); 402 radeon_audio_enable(rdev, dig->pin, 0xf); 403 } else { 404 radeon_audio_enable(rdev, dig->pin, 0); 405 dig->pin = NULL; 406 } 407 } else { 408 radeon_audio_enable(rdev, dig->pin, 0); 409 dig->pin = NULL; 410 } 411 } 412 413 void radeon_audio_fini(struct radeon_device *rdev) 414 { 415 int i; 416 417 if (!rdev->audio.enabled) 418 return; 419 420 for (i = 0; i < rdev->audio.num_pins; i++) 421 radeon_audio_enable(rdev, &rdev->audio.pin[i], 0); 422 423 rdev->audio.enabled = false; 424 } 425 426 static void radeon_audio_set_dto(struct drm_encoder *encoder, unsigned int clock) 427 { 428 struct radeon_device *rdev = encoder->dev->dev_private; 429 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 430 struct radeon_crtc *crtc = to_radeon_crtc(encoder->crtc); 431 432 if (radeon_encoder->audio && radeon_encoder->audio->set_dto) 433 radeon_encoder->audio->set_dto(rdev, crtc, clock); 434 } 435 436 static int radeon_audio_set_avi_packet(struct drm_encoder *encoder, 437 struct drm_display_mode *mode) 438 { 439 struct radeon_device *rdev = encoder->dev->dev_private; 440 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 441 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 442 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 443 u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AVI_INFOFRAME_SIZE]; 444 struct hdmi_avi_infoframe frame; 445 int err; 446 447 if (!connector) 448 return -EINVAL; 449 450 err = drm_hdmi_avi_infoframe_from_display_mode(&frame, mode); 451 if (err < 0) { 452 DRM_ERROR("failed to setup AVI infoframe: %d\n", err); 453 return err; 454 } 455 456 if (radeon_encoder->output_csc != RADEON_OUTPUT_CSC_BYPASS) { 457 if (drm_rgb_quant_range_selectable(radeon_connector_edid(connector))) { 458 if (radeon_encoder->output_csc == RADEON_OUTPUT_CSC_TVRGB) 459 frame.quantization_range = HDMI_QUANTIZATION_RANGE_LIMITED; 460 else 461 frame.quantization_range = HDMI_QUANTIZATION_RANGE_FULL; 462 } else { 463 frame.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT; 464 } 465 } 466 467 err = hdmi_avi_infoframe_pack(&frame, buffer, sizeof(buffer)); 468 if (err < 0) { 469 DRM_ERROR("failed to pack AVI infoframe: %d\n", err); 470 return err; 471 } 472 473 if (dig && dig->afmt && radeon_encoder->audio && 474 radeon_encoder->audio->set_avi_packet) 475 radeon_encoder->audio->set_avi_packet(rdev, dig->afmt->offset, 476 buffer, sizeof(buffer)); 477 478 return 0; 479 } 480 481 /* 482 * calculate CTS and N values if they are not found in the table 483 */ 484 static void radeon_audio_calc_cts(unsigned int clock, int *CTS, int *N, int freq) 485 { 486 int n, cts; 487 unsigned long div, mul; 488 489 /* Safe, but overly large values */ 490 n = 128 * freq; 491 cts = clock * 1000; 492 493 /* Smallest valid fraction */ 494 div = gcd64(n, cts); 495 496 n /= div; 497 cts /= div; 498 499 /* 500 * The optimal N is 128*freq/1000. Calculate the closest larger 501 * value that doesn't truncate any bits. 502 */ 503 mul = ((128*freq/1000) + (n-1))/n; 504 505 n *= mul; 506 cts *= mul; 507 508 /* Check that we are in spec (not always possible) */ 509 if (n < (128*freq/1500)) 510 printk(KERN_WARNING "Calculated ACR N value is too small. You may experience audio problems.\n"); 511 if (n > (128*freq/300)) 512 printk(KERN_WARNING "Calculated ACR N value is too large. You may experience audio problems.\n"); 513 514 *N = n; 515 *CTS = cts; 516 517 DRM_DEBUG("Calculated ACR timing N=%d CTS=%d for frequency %d\n", 518 *N, *CTS, freq); 519 } 520 521 static const struct radeon_hdmi_acr* radeon_audio_acr(unsigned int clock) 522 { 523 static struct radeon_hdmi_acr res; 524 u8 i; 525 526 static const struct radeon_hdmi_acr hdmi_predefined_acr[] = { 527 /* 32kHz 44.1kHz 48kHz */ 528 /* Clock N CTS N CTS N CTS */ 529 { 25175, 4096, 25175, 28224, 125875, 6144, 25175 }, /* 25,20/1.001 MHz */ 530 { 25200, 4096, 25200, 6272, 28000, 6144, 25200 }, /* 25.20 MHz */ 531 { 27000, 4096, 27000, 6272, 30000, 6144, 27000 }, /* 27.00 MHz */ 532 { 27027, 4096, 27027, 6272, 30030, 6144, 27027 }, /* 27.00*1.001 MHz */ 533 { 54000, 4096, 54000, 6272, 60000, 6144, 54000 }, /* 54.00 MHz */ 534 { 54054, 4096, 54054, 6272, 60060, 6144, 54054 }, /* 54.00*1.001 MHz */ 535 { 74176, 4096, 74176, 5733, 75335, 6144, 74176 }, /* 74.25/1.001 MHz */ 536 { 74250, 4096, 74250, 6272, 82500, 6144, 74250 }, /* 74.25 MHz */ 537 { 148352, 4096, 148352, 5733, 150670, 6144, 148352 }, /* 148.50/1.001 MHz */ 538 { 148500, 4096, 148500, 6272, 165000, 6144, 148500 }, /* 148.50 MHz */ 539 }; 540 541 /* Precalculated values for common clocks */ 542 for (i = 0; i < ARRAY_SIZE(hdmi_predefined_acr); i++) 543 if (hdmi_predefined_acr[i].clock == clock) 544 return &hdmi_predefined_acr[i]; 545 546 /* And odd clocks get manually calculated */ 547 radeon_audio_calc_cts(clock, &res.cts_32khz, &res.n_32khz, 32000); 548 radeon_audio_calc_cts(clock, &res.cts_44_1khz, &res.n_44_1khz, 44100); 549 radeon_audio_calc_cts(clock, &res.cts_48khz, &res.n_48khz, 48000); 550 551 return &res; 552 } 553 554 /* 555 * update the N and CTS parameters for a given pixel clock rate 556 */ 557 static void radeon_audio_update_acr(struct drm_encoder *encoder, unsigned int clock) 558 { 559 const struct radeon_hdmi_acr *acr = radeon_audio_acr(clock); 560 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 561 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 562 563 if (!dig || !dig->afmt) 564 return; 565 566 if (radeon_encoder->audio && radeon_encoder->audio->update_acr) 567 radeon_encoder->audio->update_acr(encoder, dig->afmt->offset, acr); 568 } 569 570 static void radeon_audio_set_vbi_packet(struct drm_encoder *encoder) 571 { 572 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 573 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 574 575 if (!dig || !dig->afmt) 576 return; 577 578 if (radeon_encoder->audio && radeon_encoder->audio->set_vbi_packet) 579 radeon_encoder->audio->set_vbi_packet(encoder, dig->afmt->offset); 580 } 581 582 static void radeon_hdmi_set_color_depth(struct drm_encoder *encoder) 583 { 584 int bpc = 8; 585 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 586 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 587 588 if (!dig || !dig->afmt) 589 return; 590 591 if (encoder->crtc) { 592 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); 593 bpc = radeon_crtc->bpc; 594 } 595 596 if (radeon_encoder->audio && radeon_encoder->audio->set_color_depth) 597 radeon_encoder->audio->set_color_depth(encoder, dig->afmt->offset, bpc); 598 } 599 600 static void radeon_audio_set_audio_packet(struct drm_encoder *encoder) 601 { 602 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 603 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 604 605 if (!dig || !dig->afmt) 606 return; 607 608 if (radeon_encoder->audio && radeon_encoder->audio->set_audio_packet) 609 radeon_encoder->audio->set_audio_packet(encoder, dig->afmt->offset); 610 } 611 612 static void radeon_audio_set_mute(struct drm_encoder *encoder, bool mute) 613 { 614 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 615 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 616 617 if (!dig || !dig->afmt) 618 return; 619 620 if (radeon_encoder->audio && radeon_encoder->audio->set_mute) 621 radeon_encoder->audio->set_mute(encoder, dig->afmt->offset, mute); 622 } 623 624 /* 625 * update the info frames with the data from the current display mode 626 */ 627 static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder, 628 struct drm_display_mode *mode) 629 { 630 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 631 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 632 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 633 634 if (!dig || !dig->afmt) 635 return; 636 637 if (!connector) 638 return; 639 640 if (drm_detect_monitor_audio(radeon_connector_edid(connector))) { 641 radeon_audio_set_mute(encoder, true); 642 643 radeon_audio_write_speaker_allocation(encoder); 644 radeon_audio_write_sad_regs(encoder); 645 radeon_audio_write_latency_fields(encoder, mode); 646 radeon_audio_set_dto(encoder, mode->clock); 647 radeon_audio_set_vbi_packet(encoder); 648 radeon_hdmi_set_color_depth(encoder); 649 radeon_audio_update_acr(encoder, mode->clock); 650 radeon_audio_set_audio_packet(encoder); 651 radeon_audio_select_pin(encoder); 652 653 if (radeon_audio_set_avi_packet(encoder, mode) < 0) 654 return; 655 656 radeon_audio_set_mute(encoder, false); 657 } else { 658 radeon_hdmi_set_color_depth(encoder); 659 660 if (radeon_audio_set_avi_packet(encoder, mode) < 0) 661 return; 662 } 663 } 664 665 static void radeon_audio_dp_mode_set(struct drm_encoder *encoder, 666 struct drm_display_mode *mode) 667 { 668 struct drm_device *dev = encoder->dev; 669 struct radeon_device *rdev = dev->dev_private; 670 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 671 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 672 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 673 674 if (!dig || !dig->afmt) 675 return; 676 677 if (!connector) 678 return; 679 680 if (drm_detect_monitor_audio(radeon_connector_edid(connector))) { 681 radeon_audio_write_speaker_allocation(encoder); 682 radeon_audio_write_sad_regs(encoder); 683 radeon_audio_write_latency_fields(encoder, mode); 684 radeon_audio_set_dto(encoder, rdev->clock.vco_freq * 10); 685 radeon_audio_set_audio_packet(encoder); 686 radeon_audio_select_pin(encoder); 687 688 if (radeon_audio_set_avi_packet(encoder, mode) < 0) 689 return; 690 } 691 } 692 693 void radeon_audio_mode_set(struct drm_encoder *encoder, 694 struct drm_display_mode *mode) 695 { 696 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 697 698 if (radeon_encoder->audio && radeon_encoder->audio->mode_set) 699 radeon_encoder->audio->mode_set(encoder, mode); 700 } 701 702 void radeon_audio_dpms(struct drm_encoder *encoder, int mode) 703 { 704 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 705 706 if (radeon_encoder->audio && radeon_encoder->audio->dpms) 707 radeon_encoder->audio->dpms(encoder, mode == DRM_MODE_DPMS_ON); 708 } 709 710 unsigned int radeon_audio_decode_dfs_div(unsigned int div) 711 { 712 if (div >= 8 && div < 64) 713 return (div - 8) * 25 + 200; 714 else if (div >= 64 && div < 96) 715 return (div - 64) * 50 + 1600; 716 else if (div >= 96 && div < 128) 717 return (div - 96) * 100 + 3200; 718 else 719 return 0; 720 } 721