1 /* 2 * Copyright 2014 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Slava Grigorev <slava.grigorev@amd.com> 23 */ 24 25 #include <linux/gcd.h> 26 #include <drm/drmP.h> 27 #include <drm/drm_crtc.h> 28 #include "radeon.h" 29 #include "atom.h" 30 #include "radeon_audio.h" 31 32 #if 0 33 void r600_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, 34 u8 enable_mask); 35 #endif 36 void dce4_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, 37 u8 enable_mask); 38 #if 0 39 void dce6_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, 40 u8 enable_mask); 41 #endif 42 u32 dce6_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg); 43 void dce6_endpoint_wreg(struct radeon_device *rdev, 44 u32 offset, u32 reg, u32 v); 45 void dce3_2_afmt_write_sad_regs(struct drm_encoder *encoder, 46 struct cea_sad *sads, int sad_count); 47 void evergreen_hdmi_write_sad_regs(struct drm_encoder *encoder, 48 struct cea_sad *sads, int sad_count); 49 void dce6_afmt_write_sad_regs(struct drm_encoder *encoder, 50 struct cea_sad *sads, int sad_count); 51 void dce3_2_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, 52 u8 *sadb, int sad_count); 53 void dce3_2_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, 54 u8 *sadb, int sad_count); 55 void dce4_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, 56 u8 *sadb, int sad_count); 57 void dce4_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, 58 u8 *sadb, int sad_count); 59 void dce6_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, 60 u8 *sadb, int sad_count); 61 void dce6_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, 62 u8 *sadb, int sad_count); 63 void dce4_afmt_write_latency_fields(struct drm_encoder *encoder, 64 struct drm_connector *connector, struct drm_display_mode *mode); 65 void dce6_afmt_write_latency_fields(struct drm_encoder *encoder, 66 struct drm_connector *connector, struct drm_display_mode *mode); 67 #if 0 68 struct r600_audio_pin* r600_audio_get_pin(struct radeon_device *rdev); 69 struct r600_audio_pin* dce6_audio_get_pin(struct radeon_device *rdev); 70 #endif 71 void dce6_afmt_select_pin(struct drm_encoder *encoder); 72 void r600_hdmi_audio_set_dto(struct radeon_device *rdev, 73 struct radeon_crtc *crtc, unsigned int clock); 74 void dce3_2_audio_set_dto(struct radeon_device *rdev, 75 struct radeon_crtc *crtc, unsigned int clock); 76 void dce4_hdmi_audio_set_dto(struct radeon_device *rdev, 77 struct radeon_crtc *crtc, unsigned int clock); 78 void dce4_dp_audio_set_dto(struct radeon_device *rdev, 79 struct radeon_crtc *crtc, unsigned int clock); 80 void dce6_hdmi_audio_set_dto(struct radeon_device *rdev, 81 struct radeon_crtc *crtc, unsigned int clock); 82 void dce6_dp_audio_set_dto(struct radeon_device *rdev, 83 struct radeon_crtc *crtc, unsigned int clock); 84 void r600_set_avi_packet(struct radeon_device *rdev, u32 offset, 85 unsigned char *buffer, size_t size); 86 void evergreen_set_avi_packet(struct radeon_device *rdev, u32 offset, 87 unsigned char *buffer, size_t size); 88 void r600_hdmi_update_acr(struct drm_encoder *encoder, long offset, 89 const struct radeon_hdmi_acr *acr); 90 void dce3_2_hdmi_update_acr(struct drm_encoder *encoder, long offset, 91 const struct radeon_hdmi_acr *acr); 92 void evergreen_hdmi_update_acr(struct drm_encoder *encoder, long offset, 93 const struct radeon_hdmi_acr *acr); 94 void r600_set_vbi_packet(struct drm_encoder *encoder, u32 offset); 95 void dce4_set_vbi_packet(struct drm_encoder *encoder, u32 offset); 96 void dce4_hdmi_set_color_depth(struct drm_encoder *encoder, 97 u32 offset, int bpc); 98 void r600_set_audio_packet(struct drm_encoder *encoder, u32 offset); 99 void dce3_2_set_audio_packet(struct drm_encoder *encoder, u32 offset); 100 void dce4_set_audio_packet(struct drm_encoder *encoder, u32 offset); 101 void r600_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); 102 void dce3_2_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); 103 void dce4_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); 104 static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder, 105 struct drm_display_mode *mode); 106 static void radeon_audio_dp_mode_set(struct drm_encoder *encoder, 107 struct drm_display_mode *mode); 108 void r600_hdmi_enable(struct drm_encoder *encoder, bool enable); 109 void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable); 110 void evergreen_dp_enable(struct drm_encoder *encoder, bool enable); 111 112 static const u32 pin_offsets[7] = 113 { 114 (0x5e00 - 0x5e00), 115 (0x5e18 - 0x5e00), 116 (0x5e30 - 0x5e00), 117 (0x5e48 - 0x5e00), 118 (0x5e60 - 0x5e00), 119 (0x5e78 - 0x5e00), 120 (0x5e90 - 0x5e00), 121 }; 122 123 static u32 radeon_audio_rreg(struct radeon_device *rdev, u32 offset, u32 reg) 124 { 125 return RREG32(reg); 126 } 127 128 static void radeon_audio_wreg(struct radeon_device *rdev, u32 offset, 129 u32 reg, u32 v) 130 { 131 WREG32(reg, v); 132 } 133 134 static struct radeon_audio_basic_funcs r600_funcs = { 135 .endpoint_rreg = radeon_audio_rreg, 136 .endpoint_wreg = radeon_audio_wreg, 137 .enable = r600_audio_enable, 138 }; 139 140 static struct radeon_audio_basic_funcs dce32_funcs = { 141 .endpoint_rreg = radeon_audio_rreg, 142 .endpoint_wreg = radeon_audio_wreg, 143 .enable = r600_audio_enable, 144 }; 145 146 static struct radeon_audio_basic_funcs dce4_funcs = { 147 .endpoint_rreg = radeon_audio_rreg, 148 .endpoint_wreg = radeon_audio_wreg, 149 .enable = dce4_audio_enable, 150 }; 151 152 static struct radeon_audio_basic_funcs dce6_funcs = { 153 .endpoint_rreg = dce6_endpoint_rreg, 154 .endpoint_wreg = dce6_endpoint_wreg, 155 .enable = dce6_audio_enable, 156 }; 157 158 static struct radeon_audio_funcs r600_hdmi_funcs = { 159 .get_pin = r600_audio_get_pin, 160 .set_dto = r600_hdmi_audio_set_dto, 161 .update_acr = r600_hdmi_update_acr, 162 .set_vbi_packet = r600_set_vbi_packet, 163 .set_avi_packet = r600_set_avi_packet, 164 .set_audio_packet = r600_set_audio_packet, 165 .set_mute = r600_set_mute, 166 .mode_set = radeon_audio_hdmi_mode_set, 167 .dpms = r600_hdmi_enable, 168 }; 169 170 static struct radeon_audio_funcs dce32_hdmi_funcs = { 171 .get_pin = r600_audio_get_pin, 172 .write_sad_regs = dce3_2_afmt_write_sad_regs, 173 .write_speaker_allocation = dce3_2_afmt_hdmi_write_speaker_allocation, 174 .set_dto = dce3_2_audio_set_dto, 175 .update_acr = dce3_2_hdmi_update_acr, 176 .set_vbi_packet = r600_set_vbi_packet, 177 .set_avi_packet = r600_set_avi_packet, 178 .set_audio_packet = dce3_2_set_audio_packet, 179 .set_mute = dce3_2_set_mute, 180 .mode_set = radeon_audio_hdmi_mode_set, 181 .dpms = r600_hdmi_enable, 182 }; 183 184 static struct radeon_audio_funcs dce32_dp_funcs = { 185 .get_pin = r600_audio_get_pin, 186 .write_sad_regs = dce3_2_afmt_write_sad_regs, 187 .write_speaker_allocation = dce3_2_afmt_dp_write_speaker_allocation, 188 .set_dto = dce3_2_audio_set_dto, 189 .set_avi_packet = r600_set_avi_packet, 190 .set_audio_packet = dce3_2_set_audio_packet, 191 }; 192 193 static struct radeon_audio_funcs dce4_hdmi_funcs = { 194 .get_pin = r600_audio_get_pin, 195 .write_sad_regs = evergreen_hdmi_write_sad_regs, 196 .write_speaker_allocation = dce4_afmt_hdmi_write_speaker_allocation, 197 .write_latency_fields = dce4_afmt_write_latency_fields, 198 .set_dto = dce4_hdmi_audio_set_dto, 199 .update_acr = evergreen_hdmi_update_acr, 200 .set_vbi_packet = dce4_set_vbi_packet, 201 .set_color_depth = dce4_hdmi_set_color_depth, 202 .set_avi_packet = evergreen_set_avi_packet, 203 .set_audio_packet = dce4_set_audio_packet, 204 .set_mute = dce4_set_mute, 205 .mode_set = radeon_audio_hdmi_mode_set, 206 .dpms = evergreen_hdmi_enable, 207 }; 208 209 static struct radeon_audio_funcs dce4_dp_funcs = { 210 .get_pin = r600_audio_get_pin, 211 .write_sad_regs = evergreen_hdmi_write_sad_regs, 212 .write_speaker_allocation = dce4_afmt_dp_write_speaker_allocation, 213 .write_latency_fields = dce4_afmt_write_latency_fields, 214 .set_dto = dce4_dp_audio_set_dto, 215 .set_avi_packet = evergreen_set_avi_packet, 216 .set_audio_packet = dce4_set_audio_packet, 217 .mode_set = radeon_audio_dp_mode_set, 218 .dpms = evergreen_dp_enable, 219 }; 220 221 static struct radeon_audio_funcs dce6_hdmi_funcs = { 222 .select_pin = dce6_afmt_select_pin, 223 .get_pin = dce6_audio_get_pin, 224 .write_sad_regs = dce6_afmt_write_sad_regs, 225 .write_speaker_allocation = dce6_afmt_hdmi_write_speaker_allocation, 226 .write_latency_fields = dce6_afmt_write_latency_fields, 227 .set_dto = dce6_hdmi_audio_set_dto, 228 .update_acr = evergreen_hdmi_update_acr, 229 .set_vbi_packet = dce4_set_vbi_packet, 230 .set_color_depth = dce4_hdmi_set_color_depth, 231 .set_avi_packet = evergreen_set_avi_packet, 232 .set_audio_packet = dce4_set_audio_packet, 233 .set_mute = dce4_set_mute, 234 .mode_set = radeon_audio_hdmi_mode_set, 235 .dpms = evergreen_hdmi_enable, 236 }; 237 238 static struct radeon_audio_funcs dce6_dp_funcs = { 239 .select_pin = dce6_afmt_select_pin, 240 .get_pin = dce6_audio_get_pin, 241 .write_sad_regs = dce6_afmt_write_sad_regs, 242 .write_speaker_allocation = dce6_afmt_dp_write_speaker_allocation, 243 .write_latency_fields = dce6_afmt_write_latency_fields, 244 .set_dto = dce6_dp_audio_set_dto, 245 .set_avi_packet = evergreen_set_avi_packet, 246 .set_audio_packet = dce4_set_audio_packet, 247 .mode_set = radeon_audio_dp_mode_set, 248 .dpms = evergreen_dp_enable, 249 }; 250 251 static void radeon_audio_enable(struct radeon_device *rdev, 252 struct r600_audio_pin *pin, u8 enable_mask) 253 { 254 struct drm_encoder *encoder; 255 struct radeon_encoder *radeon_encoder; 256 struct radeon_encoder_atom_dig *dig; 257 int pin_count = 0; 258 259 if (!pin) 260 return; 261 262 if (rdev->mode_info.mode_config_initialized) { 263 list_for_each_entry(encoder, &rdev->ddev->mode_config.encoder_list, head) { 264 if (radeon_encoder_is_digital(encoder)) { 265 radeon_encoder = to_radeon_encoder(encoder); 266 dig = radeon_encoder->enc_priv; 267 if (dig->pin == pin) 268 pin_count++; 269 } 270 } 271 272 if ((pin_count > 1) && (enable_mask == 0)) 273 return; 274 } 275 276 if (rdev->audio.funcs->enable) 277 rdev->audio.funcs->enable(rdev, pin, enable_mask); 278 } 279 280 static void radeon_audio_interface_init(struct radeon_device *rdev) 281 { 282 if (ASIC_IS_DCE6(rdev)) { 283 rdev->audio.funcs = &dce6_funcs; 284 rdev->audio.hdmi_funcs = &dce6_hdmi_funcs; 285 rdev->audio.dp_funcs = &dce6_dp_funcs; 286 } else if (ASIC_IS_DCE4(rdev)) { 287 rdev->audio.funcs = &dce4_funcs; 288 rdev->audio.hdmi_funcs = &dce4_hdmi_funcs; 289 rdev->audio.dp_funcs = &dce4_dp_funcs; 290 } else if (ASIC_IS_DCE32(rdev)) { 291 rdev->audio.funcs = &dce32_funcs; 292 rdev->audio.hdmi_funcs = &dce32_hdmi_funcs; 293 rdev->audio.dp_funcs = &dce32_dp_funcs; 294 } else { 295 rdev->audio.funcs = &r600_funcs; 296 rdev->audio.hdmi_funcs = &r600_hdmi_funcs; 297 rdev->audio.dp_funcs = 0; 298 } 299 } 300 301 static int radeon_audio_chipset_supported(struct radeon_device *rdev) 302 { 303 return ASIC_IS_DCE2(rdev) && !ASIC_IS_NODCE(rdev); 304 } 305 306 int radeon_audio_init(struct radeon_device *rdev) 307 { 308 int i; 309 310 if (!radeon_audio || !radeon_audio_chipset_supported(rdev)) 311 return 0; 312 313 rdev->audio.enabled = true; 314 315 if (ASIC_IS_DCE83(rdev)) /* KB: 2 streams, 3 endpoints */ 316 rdev->audio.num_pins = 3; 317 else if (ASIC_IS_DCE81(rdev)) /* KV: 4 streams, 7 endpoints */ 318 rdev->audio.num_pins = 7; 319 else if (ASIC_IS_DCE8(rdev)) /* BN/HW: 6 streams, 7 endpoints */ 320 rdev->audio.num_pins = 7; 321 else if (ASIC_IS_DCE64(rdev)) /* OL: 2 streams, 2 endpoints */ 322 rdev->audio.num_pins = 2; 323 else if (ASIC_IS_DCE61(rdev)) /* TN: 4 streams, 6 endpoints */ 324 rdev->audio.num_pins = 6; 325 else if (ASIC_IS_DCE6(rdev)) /* SI: 6 streams, 6 endpoints */ 326 rdev->audio.num_pins = 6; 327 else 328 rdev->audio.num_pins = 1; 329 330 for (i = 0; i < rdev->audio.num_pins; i++) { 331 rdev->audio.pin[i].channels = -1; 332 rdev->audio.pin[i].rate = -1; 333 rdev->audio.pin[i].bits_per_sample = -1; 334 rdev->audio.pin[i].status_bits = 0; 335 rdev->audio.pin[i].category_code = 0; 336 rdev->audio.pin[i].connected = false; 337 rdev->audio.pin[i].offset = pin_offsets[i]; 338 rdev->audio.pin[i].id = i; 339 } 340 341 radeon_audio_interface_init(rdev); 342 343 /* disable audio. it will be set up later */ 344 for (i = 0; i < rdev->audio.num_pins; i++) 345 radeon_audio_enable(rdev, &rdev->audio.pin[i], 0); 346 347 return 0; 348 } 349 350 u32 radeon_audio_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg) 351 { 352 if (rdev->audio.funcs->endpoint_rreg) 353 return rdev->audio.funcs->endpoint_rreg(rdev, offset, reg); 354 355 return 0; 356 } 357 358 void radeon_audio_endpoint_wreg(struct radeon_device *rdev, u32 offset, 359 u32 reg, u32 v) 360 { 361 if (rdev->audio.funcs->endpoint_wreg) 362 rdev->audio.funcs->endpoint_wreg(rdev, offset, reg, v); 363 } 364 365 static void radeon_audio_write_sad_regs(struct drm_encoder *encoder) 366 { 367 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 368 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 369 struct cea_sad *sads; 370 int sad_count; 371 372 if (!connector) 373 return; 374 375 sad_count = drm_edid_to_sad(radeon_connector_edid(connector), &sads); 376 if (sad_count <= 0) { 377 DRM_ERROR("Couldn't read SADs: %d\n", sad_count); 378 return; 379 } 380 BUG_ON(!sads); 381 382 if (radeon_encoder->audio && radeon_encoder->audio->write_sad_regs) 383 radeon_encoder->audio->write_sad_regs(encoder, sads, sad_count); 384 385 kfree(sads); 386 } 387 388 static void radeon_audio_write_speaker_allocation(struct drm_encoder *encoder) 389 { 390 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 391 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 392 u8 *sadb = NULL; 393 int sad_count; 394 395 if (!connector) 396 return; 397 398 sad_count = drm_edid_to_speaker_allocation(radeon_connector_edid(connector), 399 &sadb); 400 if (sad_count < 0) { 401 DRM_DEBUG("Couldn't read Speaker Allocation Data Block: %d\n", 402 sad_count); 403 sad_count = 0; 404 } 405 406 if (radeon_encoder->audio && radeon_encoder->audio->write_speaker_allocation) 407 radeon_encoder->audio->write_speaker_allocation(encoder, sadb, sad_count); 408 409 kfree(sadb); 410 } 411 412 static void radeon_audio_write_latency_fields(struct drm_encoder *encoder, 413 struct drm_display_mode *mode) 414 { 415 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 416 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 417 418 if (!connector) 419 return; 420 421 if (radeon_encoder->audio && radeon_encoder->audio->write_latency_fields) 422 radeon_encoder->audio->write_latency_fields(encoder, connector, mode); 423 } 424 425 struct r600_audio_pin* radeon_audio_get_pin(struct drm_encoder *encoder) 426 { 427 struct radeon_device *rdev = encoder->dev->dev_private; 428 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 429 430 if (radeon_encoder->audio && radeon_encoder->audio->get_pin) 431 return radeon_encoder->audio->get_pin(rdev); 432 433 return NULL; 434 } 435 436 static void radeon_audio_select_pin(struct drm_encoder *encoder) 437 { 438 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 439 440 if (radeon_encoder->audio && radeon_encoder->audio->select_pin) 441 radeon_encoder->audio->select_pin(encoder); 442 } 443 444 void radeon_audio_detect(struct drm_connector *connector, 445 struct drm_encoder *encoder, 446 enum drm_connector_status status) 447 { 448 struct drm_device *dev = connector->dev; 449 struct radeon_device *rdev = dev->dev_private; 450 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 451 struct radeon_encoder_atom_dig *dig; 452 453 if (!radeon_audio_chipset_supported(rdev)) 454 return; 455 456 if (!radeon_encoder_is_digital(encoder)) 457 return; 458 459 dig = radeon_encoder->enc_priv; 460 461 if (status == connector_status_connected) { 462 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) { 463 struct radeon_connector *radeon_connector = to_radeon_connector(connector); 464 465 if (radeon_dp_getsinktype(radeon_connector) == 466 CONNECTOR_OBJECT_ID_DISPLAYPORT) 467 radeon_encoder->audio = rdev->audio.dp_funcs; 468 else 469 radeon_encoder->audio = rdev->audio.hdmi_funcs; 470 } else { 471 radeon_encoder->audio = rdev->audio.hdmi_funcs; 472 } 473 474 if (drm_detect_monitor_audio(radeon_connector_edid(connector))) { 475 if (!dig->pin) 476 dig->pin = radeon_audio_get_pin(encoder); 477 radeon_audio_enable(rdev, dig->pin, 0xf); 478 } else { 479 radeon_audio_enable(rdev, dig->pin, 0); 480 dig->pin = NULL; 481 } 482 } else { 483 radeon_audio_enable(rdev, dig->pin, 0); 484 dig->pin = NULL; 485 } 486 } 487 488 void radeon_audio_fini(struct radeon_device *rdev) 489 { 490 int i; 491 492 if (!rdev->audio.enabled) 493 return; 494 495 for (i = 0; i < rdev->audio.num_pins; i++) 496 radeon_audio_enable(rdev, &rdev->audio.pin[i], 0); 497 498 rdev->audio.enabled = false; 499 } 500 501 static void radeon_audio_set_dto(struct drm_encoder *encoder, unsigned int clock) 502 { 503 struct radeon_device *rdev = encoder->dev->dev_private; 504 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 505 struct radeon_crtc *crtc = to_radeon_crtc(encoder->crtc); 506 507 if (radeon_encoder->audio && radeon_encoder->audio->set_dto) 508 radeon_encoder->audio->set_dto(rdev, crtc, clock); 509 } 510 511 static int radeon_audio_set_avi_packet(struct drm_encoder *encoder, 512 struct drm_display_mode *mode) 513 { 514 struct radeon_device *rdev = encoder->dev->dev_private; 515 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 516 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 517 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 518 u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AVI_INFOFRAME_SIZE]; 519 struct hdmi_avi_infoframe frame; 520 int err; 521 522 if (!connector) 523 return -EINVAL; 524 525 err = drm_hdmi_avi_infoframe_from_display_mode(&frame, mode); 526 if (err < 0) { 527 DRM_ERROR("failed to setup AVI infoframe: %d\n", err); 528 return err; 529 } 530 531 if (radeon_encoder->output_csc != RADEON_OUTPUT_CSC_BYPASS) { 532 if (drm_rgb_quant_range_selectable(radeon_connector_edid(connector))) { 533 if (radeon_encoder->output_csc == RADEON_OUTPUT_CSC_TVRGB) 534 frame.quantization_range = HDMI_QUANTIZATION_RANGE_LIMITED; 535 else 536 frame.quantization_range = HDMI_QUANTIZATION_RANGE_FULL; 537 } else { 538 frame.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT; 539 } 540 } 541 542 err = hdmi_avi_infoframe_pack(&frame, buffer, sizeof(buffer)); 543 if (err < 0) { 544 DRM_ERROR("failed to pack AVI infoframe: %d\n", err); 545 return err; 546 } 547 548 if (dig && dig->afmt && radeon_encoder->audio && 549 radeon_encoder->audio->set_avi_packet) 550 radeon_encoder->audio->set_avi_packet(rdev, dig->afmt->offset, 551 buffer, sizeof(buffer)); 552 553 return 0; 554 } 555 556 /* 557 * calculate CTS and N values if they are not found in the table 558 */ 559 static void radeon_audio_calc_cts(unsigned int clock, int *CTS, int *N, int freq) 560 { 561 int n, cts; 562 unsigned long div, mul; 563 564 /* Safe, but overly large values */ 565 n = 128 * freq; 566 cts = clock * 1000; 567 568 /* Smallest valid fraction */ 569 div = gcd(n, cts); 570 571 n /= div; 572 cts /= div; 573 574 /* 575 * The optimal N is 128*freq/1000. Calculate the closest larger 576 * value that doesn't truncate any bits. 577 */ 578 mul = ((128*freq/1000) + (n-1))/n; 579 580 n *= mul; 581 cts *= mul; 582 583 /* Check that we are in spec (not always possible) */ 584 if (n < (128*freq/1500)) 585 printk(KERN_WARNING "Calculated ACR N value is too small. You may experience audio problems.\n"); 586 if (n > (128*freq/300)) 587 printk(KERN_WARNING "Calculated ACR N value is too large. You may experience audio problems.\n"); 588 589 *N = n; 590 *CTS = cts; 591 592 DRM_DEBUG("Calculated ACR timing N=%d CTS=%d for frequency %d\n", 593 *N, *CTS, freq); 594 } 595 596 static const struct radeon_hdmi_acr* radeon_audio_acr(unsigned int clock) 597 { 598 static struct radeon_hdmi_acr res; 599 u8 i; 600 601 static const struct radeon_hdmi_acr hdmi_predefined_acr[] = { 602 /* 32kHz 44.1kHz 48kHz */ 603 /* Clock N CTS N CTS N CTS */ 604 { 25175, 4096, 25175, 28224, 125875, 6144, 25175 }, /* 25,20/1.001 MHz */ 605 { 25200, 4096, 25200, 6272, 28000, 6144, 25200 }, /* 25.20 MHz */ 606 { 27000, 4096, 27000, 6272, 30000, 6144, 27000 }, /* 27.00 MHz */ 607 { 27027, 4096, 27027, 6272, 30030, 6144, 27027 }, /* 27.00*1.001 MHz */ 608 { 54000, 4096, 54000, 6272, 60000, 6144, 54000 }, /* 54.00 MHz */ 609 { 54054, 4096, 54054, 6272, 60060, 6144, 54054 }, /* 54.00*1.001 MHz */ 610 { 74176, 4096, 74176, 5733, 75335, 6144, 74176 }, /* 74.25/1.001 MHz */ 611 { 74250, 4096, 74250, 6272, 82500, 6144, 74250 }, /* 74.25 MHz */ 612 { 148352, 4096, 148352, 5733, 150670, 6144, 148352 }, /* 148.50/1.001 MHz */ 613 { 148500, 4096, 148500, 6272, 165000, 6144, 148500 }, /* 148.50 MHz */ 614 }; 615 616 /* Precalculated values for common clocks */ 617 for (i = 0; i < ARRAY_SIZE(hdmi_predefined_acr); i++) 618 if (hdmi_predefined_acr[i].clock == clock) 619 return &hdmi_predefined_acr[i]; 620 621 /* And odd clocks get manually calculated */ 622 radeon_audio_calc_cts(clock, &res.cts_32khz, &res.n_32khz, 32000); 623 radeon_audio_calc_cts(clock, &res.cts_44_1khz, &res.n_44_1khz, 44100); 624 radeon_audio_calc_cts(clock, &res.cts_48khz, &res.n_48khz, 48000); 625 626 return &res; 627 } 628 629 /* 630 * update the N and CTS parameters for a given pixel clock rate 631 */ 632 static void radeon_audio_update_acr(struct drm_encoder *encoder, unsigned int clock) 633 { 634 const struct radeon_hdmi_acr *acr = radeon_audio_acr(clock); 635 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 636 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 637 638 if (!dig || !dig->afmt) 639 return; 640 641 if (radeon_encoder->audio && radeon_encoder->audio->update_acr) 642 radeon_encoder->audio->update_acr(encoder, dig->afmt->offset, acr); 643 } 644 645 static void radeon_audio_set_vbi_packet(struct drm_encoder *encoder) 646 { 647 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 648 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 649 650 if (!dig || !dig->afmt) 651 return; 652 653 if (radeon_encoder->audio && radeon_encoder->audio->set_vbi_packet) 654 radeon_encoder->audio->set_vbi_packet(encoder, dig->afmt->offset); 655 } 656 657 static void radeon_hdmi_set_color_depth(struct drm_encoder *encoder) 658 { 659 int bpc = 8; 660 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 661 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 662 663 if (!dig || !dig->afmt) 664 return; 665 666 if (encoder->crtc) { 667 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); 668 bpc = radeon_crtc->bpc; 669 } 670 671 if (radeon_encoder->audio && radeon_encoder->audio->set_color_depth) 672 radeon_encoder->audio->set_color_depth(encoder, dig->afmt->offset, bpc); 673 } 674 675 static void radeon_audio_set_audio_packet(struct drm_encoder *encoder) 676 { 677 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 678 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 679 680 if (!dig || !dig->afmt) 681 return; 682 683 if (radeon_encoder->audio && radeon_encoder->audio->set_audio_packet) 684 radeon_encoder->audio->set_audio_packet(encoder, dig->afmt->offset); 685 } 686 687 static void radeon_audio_set_mute(struct drm_encoder *encoder, bool mute) 688 { 689 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 690 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 691 692 if (!dig || !dig->afmt) 693 return; 694 695 if (radeon_encoder->audio && radeon_encoder->audio->set_mute) 696 radeon_encoder->audio->set_mute(encoder, dig->afmt->offset, mute); 697 } 698 699 /* 700 * update the info frames with the data from the current display mode 701 */ 702 static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder, 703 struct drm_display_mode *mode) 704 { 705 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 706 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 707 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 708 709 if (!dig || !dig->afmt) 710 return; 711 712 if (!connector) 713 return; 714 715 if (drm_detect_monitor_audio(radeon_connector_edid(connector))) { 716 radeon_audio_set_mute(encoder, true); 717 718 radeon_audio_write_speaker_allocation(encoder); 719 radeon_audio_write_sad_regs(encoder); 720 radeon_audio_write_latency_fields(encoder, mode); 721 radeon_audio_set_dto(encoder, mode->clock); 722 radeon_audio_set_vbi_packet(encoder); 723 radeon_hdmi_set_color_depth(encoder); 724 radeon_audio_update_acr(encoder, mode->clock); 725 radeon_audio_set_audio_packet(encoder); 726 radeon_audio_select_pin(encoder); 727 728 if (radeon_audio_set_avi_packet(encoder, mode) < 0) 729 return; 730 731 radeon_audio_set_mute(encoder, false); 732 } else { 733 radeon_hdmi_set_color_depth(encoder); 734 735 if (radeon_audio_set_avi_packet(encoder, mode) < 0) 736 return; 737 } 738 } 739 740 static void radeon_audio_dp_mode_set(struct drm_encoder *encoder, 741 struct drm_display_mode *mode) 742 { 743 struct drm_device *dev = encoder->dev; 744 struct radeon_device *rdev = dev->dev_private; 745 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 746 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 747 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 748 749 if (!dig || !dig->afmt) 750 return; 751 752 if (!connector) 753 return; 754 755 if (drm_detect_monitor_audio(radeon_connector_edid(connector))) { 756 radeon_audio_write_speaker_allocation(encoder); 757 radeon_audio_write_sad_regs(encoder); 758 radeon_audio_write_latency_fields(encoder, mode); 759 radeon_audio_set_dto(encoder, rdev->clock.vco_freq * 10); 760 radeon_audio_set_audio_packet(encoder); 761 radeon_audio_select_pin(encoder); 762 763 if (radeon_audio_set_avi_packet(encoder, mode) < 0) 764 return; 765 } 766 } 767 768 void radeon_audio_mode_set(struct drm_encoder *encoder, 769 struct drm_display_mode *mode) 770 { 771 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 772 773 if (radeon_encoder->audio && radeon_encoder->audio->mode_set) 774 radeon_encoder->audio->mode_set(encoder, mode); 775 } 776 777 void radeon_audio_dpms(struct drm_encoder *encoder, int mode) 778 { 779 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 780 781 if (radeon_encoder->audio && radeon_encoder->audio->dpms) 782 radeon_encoder->audio->dpms(encoder, mode == DRM_MODE_DPMS_ON); 783 } 784 785 unsigned int radeon_audio_decode_dfs_div(unsigned int div) 786 { 787 if (div >= 8 && div < 64) 788 return (div - 8) * 25 + 200; 789 else if (div >= 64 && div < 96) 790 return (div - 64) * 50 + 1600; 791 else if (div >= 96 && div < 128) 792 return (div - 96) * 100 + 3200; 793 else 794 return 0; 795 } 796