1 /* 2 * Copyright 2014 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Slava Grigorev <slava.grigorev@amd.com> 23 */ 24 25 #ifndef __RADEON_AUDIO_H__ 26 #define __RADEON_AUDIO_H__ 27 28 #include <linux/types.h> 29 30 #define RREG32_ENDPOINT(block, reg) \ 31 radeon_audio_endpoint_rreg(rdev, (block), (reg)) 32 #define WREG32_ENDPOINT(block, reg, v) \ 33 radeon_audio_endpoint_wreg(rdev, (block), (reg), (v)) 34 35 struct radeon_audio_basic_funcs 36 { 37 u32 (*endpoint_rreg)(struct radeon_device *rdev, u32 offset, u32 reg); 38 void (*endpoint_wreg)(struct radeon_device *rdev, 39 u32 offset, u32 reg, u32 v); 40 void (*enable)(struct radeon_device *rdev, 41 struct r600_audio_pin *pin, u8 enable_mask); 42 }; 43 44 struct radeon_audio_funcs 45 { 46 void (*select_pin)(struct drm_encoder *encoder); 47 struct r600_audio_pin* (*get_pin)(struct radeon_device *rdev); 48 void (*write_latency_fields)(struct drm_encoder *encoder, 49 struct drm_connector *connector, struct drm_display_mode *mode); 50 void (*write_sad_regs)(struct drm_encoder *encoder, 51 struct cea_sad *sads, int sad_count); 52 void (*write_speaker_allocation)(struct drm_encoder *encoder, 53 u8 *sadb, int sad_count); 54 void (*set_dto)(struct radeon_device *rdev, 55 struct radeon_crtc *crtc, unsigned int clock); 56 void (*update_acr)(struct drm_encoder *encoder, long offset, 57 const struct radeon_hdmi_acr *acr); 58 void (*set_vbi_packet)(struct drm_encoder *encoder, u32 offset); 59 void (*set_color_depth)(struct drm_encoder *encoder, u32 offset, int bpc); 60 void (*set_avi_packet)(struct radeon_device *rdev, u32 offset, 61 unsigned char *buffer, size_t size); 62 void (*set_audio_packet)(struct drm_encoder *encoder, u32 offset); 63 void (*set_mute)(struct drm_encoder *encoder, u32 offset, bool mute); 64 void (*mode_set)(struct drm_encoder *encoder, 65 struct drm_display_mode *mode); 66 void (*dpms)(struct drm_encoder *encoder, bool mode); 67 }; 68 69 int radeon_audio_init(struct radeon_device *rdev); 70 void radeon_audio_detect(struct drm_connector *connector, 71 struct drm_encoder *encoder, 72 enum drm_connector_status status); 73 u32 radeon_audio_endpoint_rreg(struct radeon_device *rdev, 74 u32 offset, u32 reg); 75 void radeon_audio_endpoint_wreg(struct radeon_device *rdev, 76 u32 offset, u32 reg, u32 v); 77 struct r600_audio_pin *radeon_audio_get_pin(struct drm_encoder *encoder); 78 void radeon_audio_fini(struct radeon_device *rdev); 79 void radeon_audio_mode_set(struct drm_encoder *encoder, 80 struct drm_display_mode *mode); 81 void radeon_audio_dpms(struct drm_encoder *encoder, int mode); 82 unsigned int radeon_audio_decode_dfs_div(unsigned int div); 83 84 /* DragonFly compilation */ 85 void dce4_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, 86 u8 enable_mask); 87 u32 dce6_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg); 88 void dce6_endpoint_wreg(struct radeon_device *rdev, 89 u32 offset, u32 reg, u32 v); 90 void dce3_2_afmt_write_sad_regs(struct drm_encoder *encoder, 91 struct cea_sad *sads, int sad_count); 92 void evergreen_hdmi_write_sad_regs(struct drm_encoder *encoder, 93 struct cea_sad *sads, int sad_count); 94 void dce6_afmt_write_sad_regs(struct drm_encoder *encoder, 95 struct cea_sad *sads, int sad_count); 96 void dce3_2_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, 97 u8 *sadb, int sad_count); 98 void dce3_2_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, 99 u8 *sadb, int sad_count); 100 void dce4_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, 101 u8 *sadb, int sad_count); 102 void dce4_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, 103 u8 *sadb, int sad_count); 104 void dce6_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, 105 u8 *sadb, int sad_count); 106 void dce6_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, 107 u8 *sadb, int sad_count); 108 void dce4_afmt_write_latency_fields(struct drm_encoder *encoder, 109 struct drm_connector *connector, struct drm_display_mode *mode); 110 void dce6_afmt_write_latency_fields(struct drm_encoder *encoder, 111 struct drm_connector *connector, struct drm_display_mode *mode); 112 void dce6_afmt_select_pin(struct drm_encoder *encoder); 113 void r600_hdmi_audio_set_dto(struct radeon_device *rdev, 114 struct radeon_crtc *crtc, unsigned int clock); 115 void dce3_2_audio_set_dto(struct radeon_device *rdev, 116 struct radeon_crtc *crtc, unsigned int clock); 117 void dce4_hdmi_audio_set_dto(struct radeon_device *rdev, 118 struct radeon_crtc *crtc, unsigned int clock); 119 void dce4_dp_audio_set_dto(struct radeon_device *rdev, 120 struct radeon_crtc *crtc, unsigned int clock); 121 void dce6_hdmi_audio_set_dto(struct radeon_device *rdev, 122 struct radeon_crtc *crtc, unsigned int clock); 123 void dce6_dp_audio_set_dto(struct radeon_device *rdev, 124 struct radeon_crtc *crtc, unsigned int clock); 125 void r600_set_avi_packet(struct radeon_device *rdev, u32 offset, 126 unsigned char *buffer, size_t size); 127 void evergreen_set_avi_packet(struct radeon_device *rdev, u32 offset, 128 unsigned char *buffer, size_t size); 129 void r600_hdmi_update_acr(struct drm_encoder *encoder, long offset, 130 const struct radeon_hdmi_acr *acr); 131 void dce3_2_hdmi_update_acr(struct drm_encoder *encoder, long offset, 132 const struct radeon_hdmi_acr *acr); 133 void evergreen_hdmi_update_acr(struct drm_encoder *encoder, long offset, 134 const struct radeon_hdmi_acr *acr); 135 void r600_set_vbi_packet(struct drm_encoder *encoder, u32 offset); 136 void dce4_set_vbi_packet(struct drm_encoder *encoder, u32 offset); 137 void dce4_hdmi_set_color_depth(struct drm_encoder *encoder, 138 u32 offset, int bpc); 139 void r600_set_audio_packet(struct drm_encoder *encoder, u32 offset); 140 void dce3_2_set_audio_packet(struct drm_encoder *encoder, u32 offset); 141 void dce4_set_audio_packet(struct drm_encoder *encoder, u32 offset); 142 void r600_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); 143 void dce3_2_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); 144 void dce4_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); 145 void r600_hdmi_enable(struct drm_encoder *encoder, bool enable); 146 void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable); 147 void evergreen_dp_enable(struct drm_encoder *encoder, bool enable); 148 149 #endif 150