xref: /dragonfly/sys/dev/drm/radeon/radeon_drv.c (revision 9edbd4a0)
1 /**
2  * \file radeon_drv.c
3  * ATI Radeon driver
4  *
5  * \author Gareth Hughes <gareth@valinux.com>
6  */
7 
8 /*
9  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
10  * All Rights Reserved.
11  *
12  * Permission is hereby granted, free of charge, to any person obtaining a
13  * copy of this software and associated documentation files (the "Software"),
14  * to deal in the Software without restriction, including without limitation
15  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16  * and/or sell copies of the Software, and to permit persons to whom the
17  * Software is furnished to do so, subject to the following conditions:
18  *
19  * The above copyright notice and this permission notice (including the next
20  * paragraph) shall be included in all copies or substantial portions of the
21  * Software.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
26  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
29  * OTHER DEALINGS IN THE SOFTWARE.
30  *
31  * $FreeBSD: head/sys/dev/drm2/radeon/radeon_drv.c 254885 2013-08-25 19:37:15Z dumbbell $
32  */
33 
34 #include <drm/drmP.h>
35 #include <uapi_drm/radeon_drm.h>
36 #include "radeon_drv.h"
37 #include "radeon_gem.h"
38 #include "radeon_kms.h"
39 #include "radeon_irq_kms.h"
40 
41 #include <drm/drm_pciids.h>
42 
43 /*
44  * KMS wrapper.
45  * - 2.0.0 - initial interface
46  * - 2.1.0 - add square tiling interface
47  * - 2.2.0 - add r6xx/r7xx const buffer support
48  * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
49  * - 2.4.0 - add crtc id query
50  * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
51  * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
52  *   2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
53  *   2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
54  *   2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
55  *   2.10.0 - fusion 2D tiling
56  *   2.11.0 - backend map, initial compute support for the CS checker
57  *   2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
58  *   2.13.0 - virtual memory support, streamout
59  *   2.14.0 - add evergreen tiling informations
60  *   2.15.0 - add max_pipes query
61  *   2.16.0 - fix evergreen 2D tiled surface calculation
62  *   2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
63  *   2.18.0 - r600-eg: allow "invalid" DB formats
64  *   2.19.0 - r600-eg: MSAA textures
65  *   2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
66  *   2.21.0 - r600-r700: FMASK and CMASK
67  *   2.22.0 - r600 only: RESOLVE_BOX allowed
68  *   2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
69  *   2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
70  *   2.25.0 - eg+: new info request for num SE and num SH
71  *   2.26.0 - r600-eg: fix htile size computation
72  *   2.27.0 - r600-SI: Add CS ioctl support for async DMA
73  *   2.28.0 - r600-eg: Add MEM_WRITE packet support
74  *   2.29.0 - R500 FP16 color clear registers
75  *   2.30.0 - fix for FMASK texturing
76  */
77 #define KMS_DRIVER_MAJOR	2
78 #define KMS_DRIVER_MINOR	30
79 #define KMS_DRIVER_PATCHLEVEL	0
80 int radeon_suspend_kms(struct drm_device *dev);
81 int radeon_resume_kms(struct drm_device *dev);
82 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
83 				      int *vpos, int *hpos);
84 extern struct drm_ioctl_desc radeon_ioctls_kms[];
85 extern int radeon_max_kms_ioctl;
86 #ifdef DUMBBELL_WIP
87 int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
88 #endif /* DUMBBELL_WIP */
89 int radeon_mode_dumb_mmap(struct drm_file *filp,
90 			  struct drm_device *dev,
91 			  uint32_t handle, uint64_t *offset_p);
92 int radeon_mode_dumb_create(struct drm_file *file_priv,
93 			    struct drm_device *dev,
94 			    struct drm_mode_create_dumb *args);
95 int radeon_mode_dumb_destroy(struct drm_file *file_priv,
96 			     struct drm_device *dev,
97 			     uint32_t handle);
98 struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj);
99 struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
100 							size_t size,
101 							struct sg_table *sg);
102 int radeon_gem_prime_pin(struct drm_gem_object *obj);
103 void *radeon_gem_prime_vmap(struct drm_gem_object *obj);
104 void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
105 
106 #if defined(CONFIG_DEBUG_FS)
107 int radeon_debugfs_init(struct drm_minor *minor);
108 void radeon_debugfs_cleanup(struct drm_minor *minor);
109 #endif
110 
111 /* atpx handler */
112 #if defined(CONFIG_VGA_SWITCHEROO)
113 void radeon_register_atpx_handler(void);
114 void radeon_unregister_atpx_handler(void);
115 #else
116 static inline void radeon_register_atpx_handler(void) {}
117 static inline void radeon_unregister_atpx_handler(void) {}
118 #endif
119 
120 int radeon_no_wb;
121 int radeon_modeset = 1;
122 int radeon_dynclks = -1;
123 int radeon_r4xx_atom = 0;
124 int radeon_agpmode = 0;
125 int radeon_vram_limit = 0;
126 int radeon_gart_size = 512; /* default gart size */
127 int radeon_benchmarking = 0;
128 int radeon_testing = 0;
129 int radeon_connector_table = 0;
130 int radeon_tv = 1;
131 int radeon_audio = 0;
132 int radeon_disp_priority = 0;
133 int radeon_hw_i2c = 0;
134 int radeon_pcie_gen2 = -1;
135 int radeon_msi = -1;
136 int radeon_lockup_timeout = 10000;
137 
138 static drm_pci_id_list_t pciidlist[] = {
139 	radeon_PCI_IDS
140 };
141 
142 #ifdef CONFIG_DRM_RADEON_UMS
143 
144 #ifdef DUMBBELL_WIP
145 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
146 module_param_named(no_wb, radeon_no_wb, int, 0444);
147 
148 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
149 module_param_named(modeset, radeon_modeset, int, 0400);
150 
151 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
152 module_param_named(dynclks, radeon_dynclks, int, 0444);
153 
154 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
155 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
156 
157 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
158 module_param_named(vramlimit, radeon_vram_limit, int, 0600);
159 
160 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
161 module_param_named(agpmode, radeon_agpmode, int, 0444);
162 
163 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc)");
164 module_param_named(gartsize, radeon_gart_size, int, 0600);
165 
166 MODULE_PARM_DESC(benchmark, "Run benchmark");
167 module_param_named(benchmark, radeon_benchmarking, int, 0444);
168 
169 MODULE_PARM_DESC(test, "Run tests");
170 module_param_named(test, radeon_testing, int, 0444);
171 
172 MODULE_PARM_DESC(connector_table, "Force connector table");
173 module_param_named(connector_table, radeon_connector_table, int, 0444);
174 
175 MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
176 module_param_named(tv, radeon_tv, int, 0444);
177 
178 MODULE_PARM_DESC(audio, "Audio enable (1 = enable)");
179 module_param_named(audio, radeon_audio, int, 0444);
180 
181 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
182 module_param_named(disp_priority, radeon_disp_priority, int, 0444);
183 
184 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
185 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
186 
187 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
188 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
189 
190 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
191 module_param_named(msi, radeon_msi, int, 0444);
192 
193 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
194 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
195 
196 static int radeon_suspend(struct drm_device *dev, pm_message_t state)
197 {
198 	drm_radeon_private_t *dev_priv = dev->dev_private;
199 
200 	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
201 		return 0;
202 
203 	/* Disable *all* interrupts */
204 	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
205 		RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
206 	RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
207 	return 0;
208 }
209 
210 static int radeon_resume(struct drm_device *dev)
211 {
212 	drm_radeon_private_t *dev_priv = dev->dev_private;
213 
214 	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
215 		return 0;
216 
217 	/* Restore interrupt registers */
218 	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
219 		RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
220 	RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
221 	return 0;
222 }
223 #endif /* DUMBBELL_WIP */
224 
225 #ifdef DUMBBELL_WIP
226 static const struct file_operations radeon_driver_old_fops = {
227 	.owner = THIS_MODULE,
228 	.open = drm_open,
229 	.release = drm_release,
230 	.unlocked_ioctl = drm_ioctl,
231 	.mmap = drm_mmap,
232 	.poll = drm_poll,
233 	.fasync = drm_fasync,
234 	.read = drm_read,
235 #ifdef CONFIG_COMPAT
236 	.compat_ioctl = radeon_compat_ioctl,
237 #endif
238 	.llseek = noop_llseek,
239 };
240 
241 static struct drm_driver driver_old = {
242 	.driver_features =
243 	    DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
244 	    DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
245 	.dev_priv_size = sizeof(drm_radeon_buf_priv_t),
246 	.load = radeon_driver_load,
247 	.firstopen = radeon_driver_firstopen,
248 	.open = radeon_driver_open,
249 	.preclose = radeon_driver_preclose,
250 	.postclose = radeon_driver_postclose,
251 	.lastclose = radeon_driver_lastclose,
252 	.unload = radeon_driver_unload,
253 #ifdef DUMBBELL_WIP
254 	.suspend = radeon_suspend,
255 	.resume = radeon_resume,
256 #endif /* DUMBBELL_WIP */
257 	.get_vblank_counter = radeon_get_vblank_counter,
258 	.enable_vblank = radeon_enable_vblank,
259 	.disable_vblank = radeon_disable_vblank,
260 	.master_create = radeon_master_create,
261 	.master_destroy = radeon_master_destroy,
262 	.irq_preinstall = radeon_driver_irq_preinstall,
263 	.irq_postinstall = radeon_driver_irq_postinstall,
264 	.irq_uninstall = radeon_driver_irq_uninstall,
265 	.irq_handler = radeon_driver_irq_handler,
266 	.ioctls = radeon_ioctls,
267 	.dma_ioctl = radeon_cp_buffers,
268 	.fops = &radeon_driver_old_fops,
269 	.name = DRIVER_NAME,
270 	.desc = DRIVER_DESC,
271 	.date = DRIVER_DATE,
272 	.major = DRIVER_MAJOR,
273 	.minor = DRIVER_MINOR,
274 	.patchlevel = DRIVER_PATCHLEVEL,
275 };
276 #endif /* DUMBBELL_WIP */
277 
278 #endif
279 
280 static struct drm_driver kms_driver;
281 
282 #ifdef DUMBBELL_WIP
283 static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
284 {
285 	struct apertures_struct *ap;
286 	bool primary = false;
287 
288 	ap = alloc_apertures(1);
289 	if (!ap)
290 		return -ENOMEM;
291 
292 	ap->ranges[0].base = pci_resource_start(pdev, 0);
293 	ap->ranges[0].size = pci_resource_len(pdev, 0);
294 
295 #ifdef CONFIG_X86
296 	primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
297 #endif
298 	remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
299 	kfree(ap);
300 
301 	return 0;
302 }
303 
304 static int radeon_pci_probe(struct pci_dev *pdev,
305 			    const struct pci_device_id *ent)
306 {
307 	int ret;
308 
309 	/* Get rid of things like offb */
310 	ret = radeon_kick_out_firmware_fb(pdev);
311 	if (ret)
312 		return ret;
313 
314 	return drm_get_pci_dev(pdev, ent, &kms_driver);
315 }
316 
317 static void
318 radeon_pci_remove(struct pci_dev *pdev)
319 {
320 	struct drm_device *dev = pci_get_drvdata(pdev);
321 
322 	drm_put_dev(dev);
323 }
324 
325 static int
326 radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
327 {
328 	struct drm_device *dev = pci_get_drvdata(pdev);
329 	return radeon_suspend_kms(dev, state);
330 }
331 
332 static int
333 radeon_pci_resume(struct pci_dev *pdev)
334 {
335 	struct drm_device *dev = pci_get_drvdata(pdev);
336 	return radeon_resume_kms(dev);
337 }
338 
339 static const struct file_operations radeon_driver_kms_fops = {
340 	.owner = THIS_MODULE,
341 	.open = drm_open,
342 	.release = drm_release,
343 	.unlocked_ioctl = drm_ioctl,
344 	.mmap = radeon_mmap,
345 	.poll = drm_poll,
346 	.fasync = drm_fasync,
347 	.read = drm_read,
348 #ifdef CONFIG_COMPAT
349 	.compat_ioctl = radeon_kms_compat_ioctl,
350 #endif
351 };
352 #endif /* DUMBBELL_WIP */
353 
354 static struct drm_driver kms_driver = {
355 	.driver_features =
356 	    DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
357 	    DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM |
358 	    DRIVER_PRIME /* | DRIVE_MODESET */,
359 #ifdef DUMBBELL_WIP
360 	.dev_priv_size = 0,
361 #endif /* DUMBBELL_WIP */
362 	.load = radeon_driver_load_kms,
363 	.use_msi = radeon_msi_ok,
364 	.firstopen = radeon_driver_firstopen_kms,
365 	.open = radeon_driver_open_kms,
366 	.preclose = radeon_driver_preclose_kms,
367 	.postclose = radeon_driver_postclose_kms,
368 	.lastclose = radeon_driver_lastclose_kms,
369 	.unload = radeon_driver_unload_kms,
370 #ifdef DUMBBELL_WIP
371 	.suspend = radeon_suspend_kms,
372 	.resume = radeon_resume_kms,
373 #endif /* DUMBBELL_WIP */
374 	.get_vblank_counter = radeon_get_vblank_counter_kms,
375 	.enable_vblank = radeon_enable_vblank_kms,
376 	.disable_vblank = radeon_disable_vblank_kms,
377 	.get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
378 	.get_scanout_position = radeon_get_crtc_scanoutpos,
379 	.irq_preinstall = radeon_driver_irq_preinstall_kms,
380 	.irq_postinstall = radeon_driver_irq_postinstall_kms,
381 	.irq_uninstall = radeon_driver_irq_uninstall_kms,
382 	.irq_handler = radeon_driver_irq_handler_kms,
383 	.ioctls = radeon_ioctls_kms,
384 	.gem_free_object = radeon_gem_object_free,
385 	.gem_open_object = radeon_gem_object_open,
386 	.gem_close_object = radeon_gem_object_close,
387 	.dma_ioctl = radeon_dma_ioctl_kms,
388 	.dumb_create = radeon_mode_dumb_create,
389 	.dumb_map_offset = radeon_mode_dumb_mmap,
390 	.dumb_destroy = radeon_mode_dumb_destroy,
391 #ifdef DUMBBELL_WIP
392 	.fops = &radeon_driver_kms_fops,
393 #endif /* DUMBBELL_WIP */
394 
395 #ifdef DUMBBELL_WIP
396 	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
397 	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
398 	.gem_prime_export = drm_gem_prime_export,
399 	.gem_prime_import = drm_gem_prime_import,
400 	.gem_prime_pin = radeon_gem_prime_pin,
401 	.gem_prime_get_sg_table = radeon_gem_prime_get_sg_table,
402 	.gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
403 	.gem_prime_vmap = radeon_gem_prime_vmap,
404 	.gem_prime_vunmap = radeon_gem_prime_vunmap,
405 #endif /* DUMBBELL_WIP */
406 
407 	.name = DRIVER_NAME,
408 	.desc = DRIVER_DESC,
409 	.date = DRIVER_DATE,
410 	.major = KMS_DRIVER_MAJOR,
411 	.minor = KMS_DRIVER_MINOR,
412 	.patchlevel = KMS_DRIVER_PATCHLEVEL,
413 };
414 
415 #ifdef DUMBBELL_WIP
416 static int __init radeon_init(void)
417 {
418 	if (radeon_modeset == 1) {
419 		DRM_INFO("radeon kernel modesetting enabled.\n");
420 		driver = &kms_driver;
421 		pdriver = &radeon_kms_pci_driver;
422 		driver->driver_features |= DRIVER_MODESET;
423 		driver->num_ioctls = radeon_max_kms_ioctl;
424 		radeon_register_atpx_handler();
425 
426 	} else {
427 #ifdef CONFIG_DRM_RADEON_UMS
428 		DRM_INFO("radeon userspace modesetting enabled.\n");
429 		driver = &driver_old;
430 		pdriver = &radeon_pci_driver;
431 		driver->driver_features &= ~DRIVER_MODESET;
432 		driver->num_ioctls = radeon_max_ioctl;
433 #else
434 		DRM_ERROR("No UMS support in radeon module!\n");
435 		return -EINVAL;
436 #endif
437 	}
438 
439 	/* let modprobe override vga console setting */
440 	return drm_pci_init(driver, pdriver);
441 }
442 
443 static void __exit radeon_exit(void)
444 {
445 	drm_pci_exit(driver, pdriver);
446 	radeon_unregister_atpx_handler();
447 }
448 #endif /* DUMBBELL_WIP */
449 
450 /* =================================================================== */
451 
452 static int
453 radeon_probe(device_t kdev)
454 {
455 
456 	return drm_probe(kdev, pciidlist);
457 }
458 
459 static int
460 radeon_attach(device_t kdev)
461 {
462 	struct drm_device *dev;
463 
464 	dev = device_get_softc(kdev);
465 	if (radeon_modeset == 1) {
466 		kms_driver.driver_features |= DRIVER_MODESET;
467 		kms_driver.num_ioctls = radeon_max_kms_ioctl;
468 		radeon_register_atpx_handler();
469 	}
470 	dev->driver = &kms_driver;
471 	return (drm_attach(kdev, pciidlist));
472 }
473 
474 static int
475 radeon_suspend(device_t kdev)
476 {
477 	struct drm_device *dev;
478 	int ret;
479 
480 	dev = device_get_softc(kdev);
481 	ret = radeon_suspend_kms(dev);
482 
483 	return (-ret);
484 }
485 
486 static int
487 radeon_resume(device_t kdev)
488 {
489 	struct drm_device *dev;
490 	int ret;
491 
492 	dev = device_get_softc(kdev);
493 	ret = radeon_resume_kms(dev);
494 
495 	return (-ret);
496 }
497 
498 static device_method_t radeon_methods[] = {
499 	/* Device interface */
500 	DEVMETHOD(device_probe,		radeon_probe),
501 	DEVMETHOD(device_attach,	radeon_attach),
502 	DEVMETHOD(device_suspend,	radeon_suspend),
503 	DEVMETHOD(device_resume,	radeon_resume),
504 	DEVMETHOD(device_detach,	drm_release),
505 	DEVMETHOD_END
506 };
507 
508 static driver_t radeon_driver = {
509 	"drm",
510 	radeon_methods,
511 	sizeof(struct drm_device)
512 };
513 
514 extern devclass_t drm_devclass;
515 DRIVER_MODULE_ORDERED(radeonkms, vgapci, radeon_driver, drm_devclass,
516     NULL, NULL, SI_ORDER_ANY);
517 MODULE_DEPEND(radeonkms, drm, 1, 1, 1);
518 MODULE_DEPEND(radeonkms, agp, 1, 1, 1);
519 MODULE_DEPEND(radeonkms, iicbus, 1, 1, 1);
520 MODULE_DEPEND(radeonkms, iic, 1, 1, 1);
521 MODULE_DEPEND(radeonkms, iicbb, 1, 1, 1);
522