1 /** 2 * \file radeon_drv.c 3 * ATI Radeon driver 4 * 5 * \author Gareth Hughes <gareth@valinux.com> 6 */ 7 8 /* 9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 10 * All Rights Reserved. 11 * 12 * Permission is hereby granted, free of charge, to any person obtaining a 13 * copy of this software and associated documentation files (the "Software"), 14 * to deal in the Software without restriction, including without limitation 15 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 16 * and/or sell copies of the Software, and to permit persons to whom the 17 * Software is furnished to do so, subject to the following conditions: 18 * 19 * The above copyright notice and this permission notice (including the next 20 * paragraph) shall be included in all copies or substantial portions of the 21 * Software. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 29 * OTHER DEALINGS IN THE SOFTWARE. 30 * 31 * $FreeBSD: head/sys/dev/drm2/radeon/radeon_drv.c 254885 2013-08-25 19:37:15Z dumbbell $ 32 */ 33 34 #include <drm/drmP.h> 35 #include <uapi_drm/radeon_drm.h> 36 #include "radeon_drv.h" 37 #include "radeon_gem.h" 38 #include "radeon_kms.h" 39 #include "radeon_irq_kms.h" 40 41 #include <drm/drm_pciids.h> 42 43 /* 44 * KMS wrapper. 45 * - 2.0.0 - initial interface 46 * - 2.1.0 - add square tiling interface 47 * - 2.2.0 - add r6xx/r7xx const buffer support 48 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs 49 * - 2.4.0 - add crtc id query 50 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen 51 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500) 52 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs 53 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query 54 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query 55 * 2.10.0 - fusion 2D tiling 56 * 2.11.0 - backend map, initial compute support for the CS checker 57 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS 58 * 2.13.0 - virtual memory support, streamout 59 * 2.14.0 - add evergreen tiling informations 60 * 2.15.0 - add max_pipes query 61 * 2.16.0 - fix evergreen 2D tiled surface calculation 62 * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx 63 * 2.18.0 - r600-eg: allow "invalid" DB formats 64 * 2.19.0 - r600-eg: MSAA textures 65 * 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query 66 * 2.21.0 - r600-r700: FMASK and CMASK 67 * 2.22.0 - r600 only: RESOLVE_BOX allowed 68 * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880 69 * 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures 70 * 2.25.0 - eg+: new info request for num SE and num SH 71 * 2.26.0 - r600-eg: fix htile size computation 72 * 2.27.0 - r600-SI: Add CS ioctl support for async DMA 73 * 2.28.0 - r600-eg: Add MEM_WRITE packet support 74 * 2.29.0 - R500 FP16 color clear registers 75 */ 76 #define KMS_DRIVER_MAJOR 2 77 #define KMS_DRIVER_MINOR 29 78 #define KMS_DRIVER_PATCHLEVEL 0 79 int radeon_suspend_kms(struct drm_device *dev); 80 int radeon_resume_kms(struct drm_device *dev); 81 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc, 82 int *vpos, int *hpos); 83 extern struct drm_ioctl_desc radeon_ioctls_kms[]; 84 extern int radeon_max_kms_ioctl; 85 #ifdef DUMBBELL_WIP 86 int radeon_mmap(struct file *filp, struct vm_area_struct *vma); 87 #endif /* DUMBBELL_WIP */ 88 int radeon_mode_dumb_mmap(struct drm_file *filp, 89 struct drm_device *dev, 90 uint32_t handle, uint64_t *offset_p); 91 int radeon_mode_dumb_create(struct drm_file *file_priv, 92 struct drm_device *dev, 93 struct drm_mode_create_dumb *args); 94 int radeon_mode_dumb_destroy(struct drm_file *file_priv, 95 struct drm_device *dev, 96 uint32_t handle); 97 struct dma_buf *radeon_gem_prime_export(struct drm_device *dev, 98 struct drm_gem_object *obj, 99 int flags); 100 struct drm_gem_object *radeon_gem_prime_import(struct drm_device *dev, 101 struct dma_buf *dma_buf); 102 103 #if defined(CONFIG_DEBUG_FS) 104 int radeon_debugfs_init(struct drm_minor *minor); 105 void radeon_debugfs_cleanup(struct drm_minor *minor); 106 #endif 107 108 int radeon_no_wb; 109 int radeon_modeset = 1; 110 int radeon_dynclks = -1; 111 int radeon_r4xx_atom = 0; 112 int radeon_agpmode = 0; 113 int radeon_vram_limit = 0; 114 int radeon_gart_size = 512; /* default gart size */ 115 int radeon_benchmarking = 0; 116 int radeon_testing = 0; 117 int radeon_connector_table = 0; 118 int radeon_tv = 1; 119 int radeon_audio = 0; 120 int radeon_disp_priority = 0; 121 int radeon_hw_i2c = 0; 122 int radeon_pcie_gen2 = -1; 123 int radeon_msi = -1; 124 int radeon_lockup_timeout = 10000; 125 126 #ifdef DUMBBELL_WIP 127 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers"); 128 module_param_named(no_wb, radeon_no_wb, int, 0444); 129 130 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting"); 131 module_param_named(modeset, radeon_modeset, int, 0400); 132 133 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks"); 134 module_param_named(dynclks, radeon_dynclks, int, 0444); 135 136 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx"); 137 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444); 138 139 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing"); 140 module_param_named(vramlimit, radeon_vram_limit, int, 0600); 141 142 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)"); 143 module_param_named(agpmode, radeon_agpmode, int, 0444); 144 145 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc)"); 146 module_param_named(gartsize, radeon_gart_size, int, 0600); 147 148 MODULE_PARM_DESC(benchmark, "Run benchmark"); 149 module_param_named(benchmark, radeon_benchmarking, int, 0444); 150 151 MODULE_PARM_DESC(test, "Run tests"); 152 module_param_named(test, radeon_testing, int, 0444); 153 154 MODULE_PARM_DESC(connector_table, "Force connector table"); 155 module_param_named(connector_table, radeon_connector_table, int, 0444); 156 157 MODULE_PARM_DESC(tv, "TV enable (0 = disable)"); 158 module_param_named(tv, radeon_tv, int, 0444); 159 160 MODULE_PARM_DESC(audio, "Audio enable (1 = enable)"); 161 module_param_named(audio, radeon_audio, int, 0444); 162 163 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)"); 164 module_param_named(disp_priority, radeon_disp_priority, int, 0444); 165 166 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)"); 167 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444); 168 169 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)"); 170 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444); 171 172 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)"); 173 module_param_named(msi, radeon_msi, int, 0444); 174 175 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)"); 176 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444); 177 178 static int radeon_suspend(struct drm_device *dev, pm_message_t state) 179 { 180 drm_radeon_private_t *dev_priv = dev->dev_private; 181 182 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) 183 return 0; 184 185 /* Disable *all* interrupts */ 186 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) 187 RADEON_WRITE(R500_DxMODE_INT_MASK, 0); 188 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0); 189 return 0; 190 } 191 192 static int radeon_resume(struct drm_device *dev) 193 { 194 drm_radeon_private_t *dev_priv = dev->dev_private; 195 196 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) 197 return 0; 198 199 /* Restore interrupt registers */ 200 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) 201 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg); 202 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg); 203 return 0; 204 } 205 #endif /* DUMBBELL_WIP */ 206 207 static drm_pci_id_list_t pciidlist[] = { 208 radeon_PCI_IDS 209 }; 210 211 #ifdef DUMBBELL_WIP 212 static const struct file_operations radeon_driver_old_fops = { 213 .owner = THIS_MODULE, 214 .open = drm_open, 215 .release = drm_release, 216 .unlocked_ioctl = drm_ioctl, 217 .mmap = drm_mmap, 218 .poll = drm_poll, 219 .fasync = drm_fasync, 220 .read = drm_read, 221 #ifdef CONFIG_COMPAT 222 .compat_ioctl = radeon_compat_ioctl, 223 #endif 224 .llseek = noop_llseek, 225 }; 226 227 static struct drm_driver driver_old = { 228 .driver_features = 229 DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG | 230 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED, 231 .dev_priv_size = sizeof(drm_radeon_buf_priv_t), 232 .load = radeon_driver_load, 233 .firstopen = radeon_driver_firstopen, 234 .open = radeon_driver_open, 235 .preclose = radeon_driver_preclose, 236 .postclose = radeon_driver_postclose, 237 .lastclose = radeon_driver_lastclose, 238 .unload = radeon_driver_unload, 239 #ifdef DUMBBELL_WIP 240 .suspend = radeon_suspend, 241 .resume = radeon_resume, 242 #endif /* DUMBBELL_WIP */ 243 .get_vblank_counter = radeon_get_vblank_counter, 244 .enable_vblank = radeon_enable_vblank, 245 .disable_vblank = radeon_disable_vblank, 246 .master_create = radeon_master_create, 247 .master_destroy = radeon_master_destroy, 248 .irq_preinstall = radeon_driver_irq_preinstall, 249 .irq_postinstall = radeon_driver_irq_postinstall, 250 .irq_uninstall = radeon_driver_irq_uninstall, 251 .irq_handler = radeon_driver_irq_handler, 252 .ioctls = radeon_ioctls, 253 .dma_ioctl = radeon_cp_buffers, 254 .fops = &radeon_driver_old_fops, 255 .name = DRIVER_NAME, 256 .desc = DRIVER_DESC, 257 .date = DRIVER_DATE, 258 .major = DRIVER_MAJOR, 259 .minor = DRIVER_MINOR, 260 .patchlevel = DRIVER_PATCHLEVEL, 261 }; 262 #endif /* DUMBBELL_WIP */ 263 264 static struct drm_driver kms_driver; 265 266 #ifdef DUMBBELL_WIP 267 static int radeon_kick_out_firmware_fb(struct pci_dev *pdev) 268 { 269 struct apertures_struct *ap; 270 bool primary = false; 271 272 ap = alloc_apertures(1); 273 if (!ap) 274 return -ENOMEM; 275 276 ap->ranges[0].base = pci_resource_start(pdev, 0); 277 ap->ranges[0].size = pci_resource_len(pdev, 0); 278 279 #ifdef CONFIG_X86 280 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; 281 #endif 282 remove_conflicting_framebuffers(ap, "radeondrmfb", primary); 283 kfree(ap); 284 285 return 0; 286 } 287 288 static int radeon_pci_probe(struct pci_dev *pdev, 289 const struct pci_device_id *ent) 290 { 291 int ret; 292 293 /* Get rid of things like offb */ 294 ret = radeon_kick_out_firmware_fb(pdev); 295 if (ret) 296 return ret; 297 298 return drm_get_pci_dev(pdev, ent, &kms_driver); 299 } 300 301 static void 302 radeon_pci_remove(struct pci_dev *pdev) 303 { 304 struct drm_device *dev = pci_get_drvdata(pdev); 305 306 drm_put_dev(dev); 307 } 308 309 static int 310 radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state) 311 { 312 struct drm_device *dev = pci_get_drvdata(pdev); 313 return radeon_suspend_kms(dev, state); 314 } 315 316 static int 317 radeon_pci_resume(struct pci_dev *pdev) 318 { 319 struct drm_device *dev = pci_get_drvdata(pdev); 320 return radeon_resume_kms(dev); 321 } 322 323 static const struct file_operations radeon_driver_kms_fops = { 324 .owner = THIS_MODULE, 325 .open = drm_open, 326 .release = drm_release, 327 .unlocked_ioctl = drm_ioctl, 328 .mmap = radeon_mmap, 329 .poll = drm_poll, 330 .fasync = drm_fasync, 331 .read = drm_read, 332 #ifdef CONFIG_COMPAT 333 .compat_ioctl = radeon_kms_compat_ioctl, 334 #endif 335 }; 336 #endif /* DUMBBELL_WIP */ 337 338 static struct drm_driver kms_driver = { 339 .driver_features = 340 DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG | 341 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM | 342 DRIVER_PRIME /* | DRIVE_MODESET */, 343 #ifdef DUMBBELL_WIP 344 .dev_priv_size = 0, 345 #endif /* DUMBBELL_WIP */ 346 .load = radeon_driver_load_kms, 347 .use_msi = radeon_msi_ok, 348 .firstopen = radeon_driver_firstopen_kms, 349 .open = radeon_driver_open_kms, 350 .preclose = radeon_driver_preclose_kms, 351 .postclose = radeon_driver_postclose_kms, 352 .lastclose = radeon_driver_lastclose_kms, 353 .unload = radeon_driver_unload_kms, 354 #ifdef DUMBBELL_WIP 355 .suspend = radeon_suspend_kms, 356 .resume = radeon_resume_kms, 357 #endif /* DUMBBELL_WIP */ 358 .get_vblank_counter = radeon_get_vblank_counter_kms, 359 .enable_vblank = radeon_enable_vblank_kms, 360 .disable_vblank = radeon_disable_vblank_kms, 361 .get_vblank_timestamp = radeon_get_vblank_timestamp_kms, 362 .get_scanout_position = radeon_get_crtc_scanoutpos, 363 .irq_preinstall = radeon_driver_irq_preinstall_kms, 364 .irq_postinstall = radeon_driver_irq_postinstall_kms, 365 .irq_uninstall = radeon_driver_irq_uninstall_kms, 366 .irq_handler = radeon_driver_irq_handler_kms, 367 .ioctls = radeon_ioctls_kms, 368 .gem_init_object = radeon_gem_object_init, 369 .gem_free_object = radeon_gem_object_free, 370 .gem_open_object = radeon_gem_object_open, 371 .gem_close_object = radeon_gem_object_close, 372 .dma_ioctl = radeon_dma_ioctl_kms, 373 .dumb_create = radeon_mode_dumb_create, 374 .dumb_map_offset = radeon_mode_dumb_mmap, 375 .dumb_destroy = radeon_mode_dumb_destroy, 376 #ifdef DUMBBELL_WIP 377 .fops = &radeon_driver_kms_fops, 378 #endif /* DUMBBELL_WIP */ 379 380 #ifdef DUMBBELL_WIP 381 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 382 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 383 .gem_prime_export = radeon_gem_prime_export, 384 .gem_prime_import = radeon_gem_prime_import, 385 #endif /* DUMBBELL_WIP */ 386 387 .name = DRIVER_NAME, 388 .desc = DRIVER_DESC, 389 .date = DRIVER_DATE, 390 .major = KMS_DRIVER_MAJOR, 391 .minor = KMS_DRIVER_MINOR, 392 .patchlevel = KMS_DRIVER_PATCHLEVEL, 393 }; 394 395 #ifdef DUMBBELL_WIP 396 static int __init radeon_init(void) 397 { 398 driver = &driver_old; 399 pdriver = &radeon_pci_driver; 400 driver->num_ioctls = radeon_max_ioctl; 401 #ifdef CONFIG_VGA_CONSOLE 402 if (vgacon_text_force() && radeon_modeset == -1) { 403 DRM_INFO("VGACON disable radeon kernel modesetting.\n"); 404 driver = &driver_old; 405 pdriver = &radeon_pci_driver; 406 driver->driver_features &= ~DRIVER_MODESET; 407 radeon_modeset = 0; 408 } 409 #endif 410 /* if enabled by default */ 411 if (radeon_modeset == -1) { 412 #ifdef CONFIG_DRM_RADEON_KMS 413 DRM_INFO("radeon defaulting to kernel modesetting.\n"); 414 radeon_modeset = 1; 415 #else 416 DRM_INFO("radeon defaulting to userspace modesetting.\n"); 417 radeon_modeset = 0; 418 #endif 419 } 420 if (radeon_modeset == 1) { 421 DRM_INFO("radeon kernel modesetting enabled.\n"); 422 driver = &kms_driver; 423 pdriver = &radeon_kms_pci_driver; 424 driver->driver_features |= DRIVER_MODESET; 425 driver->num_ioctls = radeon_max_kms_ioctl; 426 radeon_register_atpx_handler(); 427 } 428 /* if the vga console setting is enabled still 429 * let modprobe override it */ 430 return drm_pci_init(driver, pdriver); 431 } 432 433 static void __exit radeon_exit(void) 434 { 435 drm_pci_exit(driver, pdriver); 436 radeon_unregister_atpx_handler(); 437 } 438 #endif /* DUMBBELL_WIP */ 439 440 /* =================================================================== */ 441 442 static int 443 radeon_probe(device_t kdev) 444 { 445 446 return drm_probe(kdev, pciidlist); 447 } 448 449 static int 450 radeon_attach(device_t kdev) 451 { 452 struct drm_device *dev; 453 454 dev = device_get_softc(kdev); 455 if (radeon_modeset == 1) { 456 kms_driver.driver_features |= DRIVER_MODESET; 457 kms_driver.max_ioctl = radeon_max_kms_ioctl; 458 radeon_register_atpx_handler(); 459 } 460 dev->driver = &kms_driver; 461 return (drm_attach(kdev, pciidlist)); 462 } 463 464 static int 465 radeon_suspend(device_t kdev) 466 { 467 struct drm_device *dev; 468 int ret; 469 470 dev = device_get_softc(kdev); 471 ret = radeon_suspend_kms(dev); 472 473 return (-ret); 474 } 475 476 static int 477 radeon_resume(device_t kdev) 478 { 479 struct drm_device *dev; 480 int ret; 481 482 dev = device_get_softc(kdev); 483 ret = radeon_resume_kms(dev); 484 485 return (-ret); 486 } 487 488 static device_method_t radeon_methods[] = { 489 /* Device interface */ 490 DEVMETHOD(device_probe, radeon_probe), 491 DEVMETHOD(device_attach, radeon_attach), 492 DEVMETHOD(device_suspend, radeon_suspend), 493 DEVMETHOD(device_resume, radeon_resume), 494 DEVMETHOD(device_detach, drm_detach), 495 DEVMETHOD_END 496 }; 497 498 static driver_t radeon_driver = { 499 "drm", 500 radeon_methods, 501 sizeof(struct drm_device) 502 }; 503 504 extern devclass_t drm_devclass; 505 DRIVER_MODULE_ORDERED(radeonkms, vgapci, radeon_driver, drm_devclass, 506 NULL, NULL, SI_ORDER_ANY); 507 MODULE_DEPEND(radeonkms, drm, 1, 1, 1); 508 MODULE_DEPEND(radeonkms, agp, 1, 1, 1); 509 MODULE_DEPEND(radeonkms, iicbus, 1, 1, 1); 510 MODULE_DEPEND(radeonkms, iic, 1, 1, 1); 511 MODULE_DEPEND(radeonkms, iicbb, 1, 1, 1); 512