xref: /dragonfly/sys/dev/drm/radeon/radeon_drv.c (revision e5a92d33)
1 /**
2  * \file radeon_drv.c
3  * ATI Radeon driver
4  *
5  * \author Gareth Hughes <gareth@valinux.com>
6  */
7 
8 /*
9  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
10  * All Rights Reserved.
11  *
12  * Permission is hereby granted, free of charge, to any person obtaining a
13  * copy of this software and associated documentation files (the "Software"),
14  * to deal in the Software without restriction, including without limitation
15  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16  * and/or sell copies of the Software, and to permit persons to whom the
17  * Software is furnished to do so, subject to the following conditions:
18  *
19  * The above copyright notice and this permission notice (including the next
20  * paragraph) shall be included in all copies or substantial portions of the
21  * Software.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
26  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
29  * OTHER DEALINGS IN THE SOFTWARE.
30  */
31 
32 #include <drm/drmP.h>
33 #include <drm/radeon_drm.h>
34 #include "radeon_drv.h"
35 
36 #include <drm/drm_pciids.h>
37 #include <linux/apple-gmux.h>
38 #include <linux/console.h>
39 #include <linux/module.h>
40 #include <linux/pm_runtime.h>
41 #include <linux/vgaarb.h>
42 #include <linux/vga_switcheroo.h>
43 #include <drm/drm_gem.h>
44 
45 #include "drm_crtc_helper.h"
46 #include "radeon_kfd.h"
47 
48 /*
49  * KMS wrapper.
50  * - 2.0.0 - initial interface
51  * - 2.1.0 - add square tiling interface
52  * - 2.2.0 - add r6xx/r7xx const buffer support
53  * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
54  * - 2.4.0 - add crtc id query
55  * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
56  * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
57  *   2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
58  *   2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
59  *   2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
60  *   2.10.0 - fusion 2D tiling
61  *   2.11.0 - backend map, initial compute support for the CS checker
62  *   2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
63  *   2.13.0 - virtual memory support, streamout
64  *   2.14.0 - add evergreen tiling informations
65  *   2.15.0 - add max_pipes query
66  *   2.16.0 - fix evergreen 2D tiled surface calculation
67  *   2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
68  *   2.18.0 - r600-eg: allow "invalid" DB formats
69  *   2.19.0 - r600-eg: MSAA textures
70  *   2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
71  *   2.21.0 - r600-r700: FMASK and CMASK
72  *   2.22.0 - r600 only: RESOLVE_BOX allowed
73  *   2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
74  *   2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
75  *   2.25.0 - eg+: new info request for num SE and num SH
76  *   2.26.0 - r600-eg: fix htile size computation
77  *   2.27.0 - r600-SI: Add CS ioctl support for async DMA
78  *   2.28.0 - r600-eg: Add MEM_WRITE packet support
79  *   2.29.0 - R500 FP16 color clear registers
80  *   2.30.0 - fix for FMASK texturing
81  *   2.31.0 - Add fastfb support for rs690
82  *   2.32.0 - new info request for rings working
83  *   2.33.0 - Add SI tiling mode array query
84  *   2.34.0 - Add CIK tiling mode array query
85  *   2.35.0 - Add CIK macrotile mode array query
86  *   2.36.0 - Fix CIK DCE tiling setup
87  *   2.37.0 - allow GS ring setup on r6xx/r7xx
88  *   2.38.0 - RADEON_GEM_OP (GET_INITIAL_DOMAIN, SET_INITIAL_DOMAIN),
89  *            CIK: 1D and linear tiling modes contain valid PIPE_CONFIG
90  *   2.39.0 - Add INFO query for number of active CUs
91  *   2.40.0 - Add RADEON_GEM_GTT_WC/UC, flush HDP cache before submitting
92  *            CS to GPU on >= r600
93  *   2.41.0 - evergreen/cayman: Add SET_BASE/DRAW_INDIRECT command parsing support
94  *   2.42.0 - Add VCE/VUI (Video Usability Information) support
95  *   2.43.0 - RADEON_INFO_GPU_RESET_COUNTER
96  *   2.44.0 - SET_APPEND_CNT packet3 support
97  *   2.45.0 - Allow setting shader registers using DMA/COPY packet3 on SI
98  */
99 #define KMS_DRIVER_MAJOR	2
100 #define KMS_DRIVER_MINOR	45
101 #define KMS_DRIVER_PATCHLEVEL	0
102 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
103 int radeon_driver_unload_kms(struct drm_device *dev);
104 void radeon_driver_lastclose_kms(struct drm_device *dev);
105 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
106 void radeon_driver_postclose_kms(struct drm_device *dev,
107 				 struct drm_file *file_priv);
108 void radeon_driver_preclose_kms(struct drm_device *dev,
109 				struct drm_file *file_priv);
110 int radeon_suspend_kms(struct drm_device *dev, bool suspend,
111 		       bool fbcon, bool freeze);
112 int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon);
113 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, unsigned int pipe);
114 int radeon_enable_vblank_kms(struct drm_device *dev, unsigned int pipe);
115 void radeon_disable_vblank_kms(struct drm_device *dev, unsigned int pipe);
116 int radeon_get_vblank_timestamp_kms(struct drm_device *dev, unsigned int pipe,
117 				    int *max_error,
118 				    struct timeval *vblank_time,
119 				    unsigned flags);
120 void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
121 int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
122 void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
123 irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg);
124 void radeon_gem_object_free(struct drm_gem_object *obj);
125 int radeon_gem_object_open(struct drm_gem_object *obj,
126 				struct drm_file *file_priv);
127 void radeon_gem_object_close(struct drm_gem_object *obj,
128 				struct drm_file *file_priv);
129 struct dma_buf *radeon_gem_prime_export(struct drm_device *dev,
130 					struct drm_gem_object *gobj,
131 					int flags);
132 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, unsigned int crtc,
133 				      unsigned int flags, int *vpos, int *hpos,
134 				      ktime_t *stime, ktime_t *etime,
135 				      const struct drm_display_mode *mode);
136 extern bool radeon_is_px(struct drm_device *dev);
137 extern const struct drm_ioctl_desc radeon_ioctls_kms[];
138 extern int radeon_max_kms_ioctl;
139 #ifdef DUMBBELL_WIP
140 int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
141 #endif /* DUMBBELL_WIP */
142 int radeon_mode_dumb_mmap(struct drm_file *filp,
143 			  struct drm_device *dev,
144 			  uint32_t handle, uint64_t *offset_p);
145 int radeon_mode_dumb_create(struct drm_file *file_priv,
146 			    struct drm_device *dev,
147 			    struct drm_mode_create_dumb *args);
148 struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj);
149 struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
150 							struct dma_buf_attachment *,
151 							struct sg_table *sg);
152 int radeon_gem_prime_pin(struct drm_gem_object *obj);
153 void radeon_gem_prime_unpin(struct drm_gem_object *obj);
154 struct reservation_object *radeon_gem_prime_res_obj(struct drm_gem_object *);
155 void *radeon_gem_prime_vmap(struct drm_gem_object *obj);
156 void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
157 extern long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd,
158 				    unsigned long arg);
159 
160 #if defined(CONFIG_DEBUG_FS)
161 int radeon_debugfs_init(struct drm_minor *minor);
162 void radeon_debugfs_cleanup(struct drm_minor *minor);
163 #endif
164 
165 /* atpx handler */
166 #if defined(CONFIG_VGA_SWITCHEROO)
167 void radeon_register_atpx_handler(void);
168 void radeon_unregister_atpx_handler(void);
169 #else
170 static inline void radeon_register_atpx_handler(void) {}
171 static inline void radeon_unregister_atpx_handler(void) {}
172 #endif
173 
174 int radeon_no_wb;
175 int radeon_modeset = -1;
176 int radeon_dynclks = -1;
177 int radeon_r4xx_atom = 0;
178 int radeon_agpmode = 0;
179 int radeon_vram_limit = 0;
180 int radeon_gart_size = -1; /* auto */
181 int radeon_benchmarking = 0;
182 int radeon_testing = 0;
183 int radeon_connector_table = 0;
184 int radeon_tv = 1;
185 int radeon_audio = -1;
186 int radeon_disp_priority = 0;
187 #ifdef __DragonFly__
188 int radeon_hw_i2c = 1;
189 #else
190 int radeon_hw_i2c = 0;
191 #endif
192 int radeon_pcie_gen2 = -1;
193 int radeon_msi = -1;
194 int radeon_lockup_timeout = 10000;
195 int radeon_fastfb = 0;
196 int radeon_dpm = -1;
197 int radeon_aspm = -1;
198 int radeon_runtime_pm = -1;
199 int radeon_hard_reset = 0;
200 int radeon_vm_size = 8;
201 int radeon_vm_block_size = -1;
202 int radeon_deep_color = 0;
203 int radeon_use_pflipirq = 2;
204 int radeon_bapm = -1;
205 int radeon_backlight = -1;
206 int radeon_auxch = -1;
207 int radeon_mst = 0;
208 int radeon_uvd = 1;
209 int radeon_vce = 1;
210 
211 TUNABLE_INT("drm.radeon.no_wb", &radeon_no_wb);
212 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
213 module_param_named(no_wb, radeon_no_wb, int, 0444);
214 
215 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
216 module_param_named(modeset, radeon_modeset, int, 0400);
217 
218 TUNABLE_INT("drm.radeon.dynclks", &radeon_dynclks);
219 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
220 module_param_named(dynclks, radeon_dynclks, int, 0444);
221 
222 TUNABLE_INT("drm.radeon.r4xx_atom", &radeon_r4xx_atom);
223 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
224 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
225 
226 TUNABLE_INT("drm.radeon.vram_limit", &radeon_vram_limit);
227 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
228 module_param_named(vramlimit, radeon_vram_limit, int, 0600);
229 
230 TUNABLE_INT("drm.radeon.agpmode", &radeon_agpmode);
231 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
232 module_param_named(agpmode, radeon_agpmode, int, 0444);
233 
234 TUNABLE_INT("drm.radeon.gart_size", &radeon_gart_size);
235 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)");
236 module_param_named(gartsize, radeon_gart_size, int, 0600);
237 
238 TUNABLE_INT("drm.radeon.benchmarking", &radeon_benchmarking);
239 MODULE_PARM_DESC(benchmark, "Run benchmark");
240 module_param_named(benchmark, radeon_benchmarking, int, 0444);
241 
242 TUNABLE_INT("drm.radeon.testing", &radeon_testing);
243 MODULE_PARM_DESC(test, "Run tests");
244 module_param_named(test, radeon_testing, int, 0444);
245 
246 TUNABLE_INT("drm.radeon.connector_table", &radeon_connector_table);
247 MODULE_PARM_DESC(connector_table, "Force connector table");
248 module_param_named(connector_table, radeon_connector_table, int, 0444);
249 
250 TUNABLE_INT("drm.radeon.tv", &radeon_tv);
251 MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
252 module_param_named(tv, radeon_tv, int, 0444);
253 
254 TUNABLE_INT("drm.radeon.audio", &radeon_audio);
255 MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)");
256 module_param_named(audio, radeon_audio, int, 0444);
257 
258 TUNABLE_INT("drm.radeon.disp_priority", &radeon_disp_priority);
259 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
260 module_param_named(disp_priority, radeon_disp_priority, int, 0444);
261 
262 TUNABLE_INT("drm.radeon.hw_i2c", &radeon_hw_i2c);
263 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
264 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
265 
266 TUNABLE_INT("drm.radeon.pcie_gen2", &radeon_pcie_gen2);
267 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
268 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
269 
270 TUNABLE_INT("drm.radeon.msi", &radeon_msi);
271 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
272 module_param_named(msi, radeon_msi, int, 0444);
273 
274 TUNABLE_INT("drm.radeon.lockup_timeout", &radeon_lockup_timeout);
275 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (default 10000 = 10 seconds, 0 = disable)");
276 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
277 
278 TUNABLE_INT("drm.radeon.fastfb", &radeon_fastfb);
279 MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)");
280 module_param_named(fastfb, radeon_fastfb, int, 0444);
281 
282 TUNABLE_INT("drm.radeon.dpm", &radeon_dpm);
283 MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
284 module_param_named(dpm, radeon_dpm, int, 0444);
285 
286 TUNABLE_INT("drm.radeon.aspm", &radeon_aspm);
287 MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)");
288 module_param_named(aspm, radeon_aspm, int, 0444);
289 
290 TUNABLE_INT("drm.radeon.runtime_pm", &radeon_runtime_pm);	/* careful with this */
291 MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)");
292 module_param_named(runpm, radeon_runtime_pm, int, 0444);
293 
294 TUNABLE_INT("drm.radeon.hard_reset", &radeon_hard_reset);	/* very careful with this */
295 MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))");
296 module_param_named(hard_reset, radeon_hard_reset, int, 0444);
297 
298 TUNABLE_INT("drm.radeon.vm_size", &radeon_vm_size);
299 MODULE_PARM_DESC(vm_size, "VM address space size in gigabytes (default 4GB)");
300 module_param_named(vm_size, radeon_vm_size, int, 0444);
301 
302 TUNABLE_INT("drm.radeon.vm_block_size", &radeon_vm_block_size);
303 MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default depending on vm_size)");
304 module_param_named(vm_block_size, radeon_vm_block_size, int, 0444);
305 
306 TUNABLE_INT("drm.radeon.deep_color", &radeon_deep_color);
307 MODULE_PARM_DESC(deep_color, "Deep Color support (1 = enable, 0 = disable (default))");
308 module_param_named(deep_color, radeon_deep_color, int, 0444);
309 
310 TUNABLE_INT("drm.radeon.use_pflipirq", &radeon_use_pflipirq);
311 MODULE_PARM_DESC(use_pflipirq, "Pflip irqs for pageflip completion (0 = disable, 1 = as fallback, 2 = exclusive (default))");
312 module_param_named(use_pflipirq, radeon_use_pflipirq, int, 0444);
313 
314 TUNABLE_INT("drm.radeon.bapm", &radeon_bapm);
315 MODULE_PARM_DESC(bapm, "BAPM support (1 = enable, 0 = disable, -1 = auto)");
316 module_param_named(bapm, radeon_bapm, int, 0444);
317 
318 TUNABLE_INT("drm.radeon.backlight", &radeon_backlight);
319 MODULE_PARM_DESC(backlight, "backlight support (1 = enable, 0 = disable, -1 = auto)");
320 module_param_named(backlight, radeon_backlight, int, 0444);
321 
322 TUNABLE_INT("drm.radeon.auxch", &radeon_auxch);
323 MODULE_PARM_DESC(auxch, "Use native auxch experimental support (1 = enable, 0 = disable, -1 = auto)");
324 module_param_named(auxch, radeon_auxch, int, 0444);
325 
326 TUNABLE_INT("drm.radeon.mst", &radeon_mst);
327 MODULE_PARM_DESC(mst, "DisplayPort MST experimental support (1 = enable, 0 = disable)");
328 module_param_named(mst, radeon_mst, int, 0444);
329 
330 TUNABLE_INT("drm.radeon.uvd", &radeon_uvd);
331 MODULE_PARM_DESC(uvd, "uvd enable/disable uvd support (1 = enable, 0 = disable)");
332 module_param_named(uvd, radeon_uvd, int, 0444);
333 
334 TUNABLE_INT("drm.radeon.vce", &radeon_vce);
335 MODULE_PARM_DESC(vce, "vce enable/disable vce support (1 = enable, 0 = disable)");
336 module_param_named(vce, radeon_vce, int, 0444);
337 
338 static drm_pci_id_list_t pciidlist[] = {
339 	radeon_PCI_IDS
340 };
341 
342 static struct drm_driver kms_driver;
343 
344 #ifdef DUMBBELL_WIP
345 static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
346 {
347 	struct apertures_struct *ap;
348 	bool primary = false;
349 
350 	ap = alloc_apertures(1);
351 	if (!ap)
352 		return -ENOMEM;
353 
354 	ap->ranges[0].base = pci_resource_start(pdev, 0);
355 	ap->ranges[0].size = pci_resource_len(pdev, 0);
356 
357 #ifdef CONFIG_X86
358 	primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
359 #endif
360 	remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
361 	kfree(ap);
362 
363 	return 0;
364 }
365 
366 static int radeon_pci_probe(struct pci_dev *pdev,
367 			    const struct pci_device_id *ent)
368 {
369 	int ret;
370 
371 	/*
372 	 * Initialize amdkfd before starting radeon. If it was not loaded yet,
373 	 * defer radeon probing
374 	 */
375 	ret = radeon_kfd_init();
376 	if (ret == -EPROBE_DEFER)
377 		return ret;
378 
379 	/*
380 	 * apple-gmux is needed on dual GPU MacBook Pro
381 	 * to probe the panel if we're the inactive GPU.
382 	 */
383 	if (IS_ENABLED(CONFIG_VGA_ARB) && IS_ENABLED(CONFIG_VGA_SWITCHEROO) &&
384 	    apple_gmux_present() && pdev != vga_default_device() &&
385 	    !vga_switcheroo_handler_flags())
386 		return -EPROBE_DEFER;
387 
388 	/* Get rid of things like offb */
389 	ret = radeon_kick_out_firmware_fb(pdev);
390 	if (ret)
391 		return ret;
392 
393 	return drm_get_pci_dev(pdev, ent, &kms_driver);
394 }
395 
396 static void
397 radeon_pci_remove(struct pci_dev *pdev)
398 {
399 	struct drm_device *dev = pci_get_drvdata(pdev);
400 
401 	drm_put_dev(dev);
402 }
403 
404 static int radeon_pmops_suspend(struct device *dev)
405 {
406 	struct pci_dev *pdev = to_pci_dev(dev);
407 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
408 	return radeon_suspend_kms(drm_dev, true, true, false);
409 }
410 
411 static int radeon_pmops_resume(struct device *dev)
412 {
413 	struct pci_dev *pdev = to_pci_dev(dev);
414 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
415 	return radeon_resume_kms(drm_dev, true, true);
416 }
417 
418 static int radeon_pmops_freeze(struct device *dev)
419 {
420 	struct pci_dev *pdev = to_pci_dev(dev);
421 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
422 	return radeon_suspend_kms(drm_dev, false, true, true);
423 }
424 
425 static int radeon_pmops_thaw(struct device *dev)
426 {
427 	struct pci_dev *pdev = to_pci_dev(dev);
428 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
429 	return radeon_resume_kms(drm_dev, false, true);
430 }
431 
432 static int radeon_pmops_runtime_suspend(struct device *dev)
433 {
434 	struct pci_dev *pdev = to_pci_dev(dev);
435 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
436 	int ret;
437 
438 	if (!radeon_is_px(drm_dev)) {
439 		pm_runtime_forbid(dev);
440 		return -EBUSY;
441 	}
442 
443 	drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
444 	drm_kms_helper_poll_disable(drm_dev);
445 	vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
446 
447 	ret = radeon_suspend_kms(drm_dev, false, false, false);
448 	pci_save_state(pdev);
449 	pci_disable_device(pdev);
450 	pci_ignore_hotplug(pdev);
451 	pci_set_power_state(pdev, PCI_D3cold);
452 	drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
453 
454 	return 0;
455 }
456 
457 static int radeon_pmops_runtime_resume(struct device *dev)
458 {
459 	struct pci_dev *pdev = to_pci_dev(dev);
460 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
461 	int ret;
462 
463 	if (!radeon_is_px(drm_dev))
464 		return -EINVAL;
465 
466 	drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
467 
468 	pci_set_power_state(pdev, PCI_D0);
469 	pci_restore_state(pdev);
470 	ret = pci_enable_device(pdev);
471 	if (ret)
472 		return ret;
473 	pci_set_master(pdev);
474 
475 	ret = radeon_resume_kms(drm_dev, false, false);
476 	drm_kms_helper_poll_enable(drm_dev);
477 	vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
478 	drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
479 	return 0;
480 }
481 
482 static int radeon_pmops_runtime_idle(struct device *dev)
483 {
484 	struct pci_dev *pdev = to_pci_dev(dev);
485 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
486 	struct drm_crtc *crtc;
487 
488 	if (!radeon_is_px(drm_dev)) {
489 		pm_runtime_forbid(dev);
490 		return -EBUSY;
491 	}
492 
493 	list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) {
494 		if (crtc->enabled) {
495 			DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
496 			return -EBUSY;
497 		}
498 	}
499 
500 	pm_runtime_mark_last_busy(dev);
501 	pm_runtime_autosuspend(dev);
502 	/* we don't want the main rpm_idle to call suspend - we want to autosuspend */
503 	return 1;
504 }
505 
506 long radeon_drm_ioctl(struct file *filp,
507 		      unsigned int cmd, unsigned long arg)
508 {
509 	struct drm_file *file_priv = filp->private_data;
510 	struct drm_device *dev;
511 	long ret;
512 	dev = file_priv->minor->dev;
513 	ret = pm_runtime_get_sync(dev->dev);
514 	if (ret < 0)
515 		return ret;
516 
517 	ret = drm_ioctl(filp, cmd, arg);
518 
519 	pm_runtime_mark_last_busy(dev->dev);
520 	pm_runtime_put_autosuspend(dev->dev);
521 	return ret;
522 }
523 
524 static const struct dev_pm_ops radeon_pm_ops = {
525 	.suspend = radeon_pmops_suspend,
526 	.resume = radeon_pmops_resume,
527 	.freeze = radeon_pmops_freeze,
528 	.thaw = radeon_pmops_thaw,
529 	.poweroff = radeon_pmops_freeze,
530 	.restore = radeon_pmops_resume,
531 	.runtime_suspend = radeon_pmops_runtime_suspend,
532 	.runtime_resume = radeon_pmops_runtime_resume,
533 	.runtime_idle = radeon_pmops_runtime_idle,
534 };
535 #endif /* DUMBBELL_WIP */
536 
537 static const struct file_operations radeon_driver_kms_fops = {
538 	.owner = THIS_MODULE,
539 #if 0
540 	.open = drm_open,
541 	.release = drm_release,
542 	.unlocked_ioctl = radeon_drm_ioctl,
543 	.mmap = radeon_mmap,
544 	.poll = drm_poll,
545 	.read = drm_read,
546 #endif
547 #ifdef CONFIG_COMPAT
548 	.compat_ioctl = radeon_kms_compat_ioctl,
549 #endif
550 };
551 
552 static int radeon_sysctl_init(struct drm_device *dev, struct sysctl_ctx_list *ctx,
553 			      struct sysctl_oid *top)
554 {
555 	return drm_add_busid_modesetting(dev, ctx, top);
556 }
557 
558 static struct drm_driver kms_driver = {
559 	.driver_features =
560 	    DRIVER_USE_AGP |
561 	    DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
562 	    DRIVER_PRIME | DRIVER_RENDER,
563 	.load = radeon_driver_load_kms,
564 	.open = radeon_driver_open_kms,
565 	.preclose = radeon_driver_preclose_kms,
566 	.postclose = radeon_driver_postclose_kms,
567 	.lastclose = radeon_driver_lastclose_kms,
568 	.set_busid = drm_pci_set_busid,
569 	.unload = radeon_driver_unload_kms,
570 	.get_vblank_counter = radeon_get_vblank_counter_kms,
571 	.enable_vblank = radeon_enable_vblank_kms,
572 	.disable_vblank = radeon_disable_vblank_kms,
573 	.get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
574 	.get_scanout_position = radeon_get_crtc_scanoutpos,
575 #if defined(CONFIG_DEBUG_FS)
576 	.debugfs_init = radeon_debugfs_init,
577 	.debugfs_cleanup = radeon_debugfs_cleanup,
578 #endif
579 	.irq_preinstall = radeon_driver_irq_preinstall_kms,
580 	.irq_postinstall = radeon_driver_irq_postinstall_kms,
581 	.irq_uninstall = radeon_driver_irq_uninstall_kms,
582 	.irq_handler = radeon_driver_irq_handler_kms,
583 	.sysctl_init = radeon_sysctl_init,
584 	.ioctls = radeon_ioctls_kms,
585 	.gem_free_object_unlocked = radeon_gem_object_free,
586 	.gem_open_object = radeon_gem_object_open,
587 	.gem_close_object = radeon_gem_object_close,
588 	.dumb_create = radeon_mode_dumb_create,
589 	.dumb_map_offset = radeon_mode_dumb_mmap,
590 	.dumb_destroy = drm_gem_dumb_destroy,
591 	.fops = &radeon_driver_kms_fops,
592 
593 	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
594 	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
595 	.gem_prime_export = radeon_gem_prime_export,
596 	.gem_prime_import = drm_gem_prime_import,
597 	.gem_prime_pin = radeon_gem_prime_pin,
598 	.gem_prime_unpin = radeon_gem_prime_unpin,
599 	.gem_prime_res_obj = radeon_gem_prime_res_obj,
600 	.gem_prime_get_sg_table = radeon_gem_prime_get_sg_table,
601 	.gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
602 	.gem_prime_vmap = radeon_gem_prime_vmap,
603 	.gem_prime_vunmap = radeon_gem_prime_vunmap,
604 
605 	.name = DRIVER_NAME,
606 	.desc = DRIVER_DESC,
607 	.date = DRIVER_DATE,
608 	.major = KMS_DRIVER_MAJOR,
609 	.minor = KMS_DRIVER_MINOR,
610 	.patchlevel = KMS_DRIVER_PATCHLEVEL,
611 };
612 
613 static struct drm_driver *driver;
614 static struct pci_driver *pdriver;
615 
616 #ifdef CONFIG_DRM_RADEON_UMS
617 static struct pci_driver radeon_pci_driver = {
618 	.name = DRIVER_NAME,
619 	.id_table = pciidlist,
620 };
621 #endif
622 
623 static struct pci_driver radeon_kms_pci_driver = {
624 #if 0
625 	.name = DRIVER_NAME,
626 	.id_table = pciidlist,
627 	.probe = radeon_pci_probe,
628 	.remove = radeon_pci_remove,
629 	.driver.pm = &radeon_pm_ops,
630 #endif
631 };
632 
633 static int __init radeon_init(void)
634 {
635 	if (vgacon_text_force() && radeon_modeset == -1) {
636 		DRM_INFO("VGACON disable radeon kernel modesetting.\n");
637 		radeon_modeset = 0;
638 	}
639 	/* set to modesetting by default if not nomodeset */
640 	if (radeon_modeset == -1)
641 		radeon_modeset = 1;
642 
643 	if (radeon_modeset == 1) {
644 		DRM_INFO("radeon kernel modesetting enabled.\n");
645 		driver = &kms_driver;
646 		pdriver = &radeon_kms_pci_driver;
647 		driver->driver_features |= DRIVER_MODESET;
648 		driver->num_ioctls = radeon_max_kms_ioctl;
649 		radeon_register_atpx_handler();
650 
651 	} else {
652 #ifdef CONFIG_DRM_RADEON_UMS
653 		DRM_INFO("radeon userspace modesetting enabled.\n");
654 		driver = &driver_old;
655 		pdriver = &radeon_pci_driver;
656 		driver->driver_features &= ~DRIVER_MODESET;
657 		driver->num_ioctls = radeon_max_ioctl;
658 #else
659 		DRM_ERROR("No UMS support in radeon module!\n");
660 		return -EINVAL;
661 #endif
662 	}
663 
664 	/* let modprobe override vga console setting */
665 	return drm_pci_init(driver, pdriver);
666 }
667 
668 static void __exit radeon_exit(void)
669 {
670 	radeon_kfd_fini();
671 #if 0
672 	drm_pci_exit(driver, pdriver);
673 #endif
674 	radeon_unregister_atpx_handler();
675 }
676 
677 /* =================================================================== */
678 
679 static int
680 radeon_probe(device_t kdev)
681 {
682 
683 	return drm_probe(kdev, pciidlist);
684 }
685 
686 static int
687 radeon_attach(device_t kdev)
688 {
689 	struct drm_device *dev;
690 
691 	dev = device_get_softc(kdev);
692 	if (radeon_modeset == 1) {
693 		kms_driver.driver_features |= DRIVER_MODESET;
694 		kms_driver.num_ioctls = radeon_max_kms_ioctl;
695 		radeon_register_atpx_handler();
696 	}
697 	dev->driver = &kms_driver;
698 	return (drm_attach(kdev, pciidlist));
699 }
700 
701 static int
702 radeon_suspend(device_t kdev)
703 {
704 	struct drm_device *dev;
705 	int ret;
706 
707 	dev = device_get_softc(kdev);
708 	ret = radeon_suspend_kms(dev, true, true, false);
709 
710 	return (-ret);
711 }
712 
713 static int
714 radeon_resume(device_t kdev)
715 {
716 	struct drm_device *dev;
717 	int ret;
718 
719 	dev = device_get_softc(kdev);
720 	ret = radeon_resume_kms(dev, true, true);
721 
722 	return (-ret);
723 }
724 
725 static device_method_t radeon_methods[] = {
726 	/* Device interface */
727 	DEVMETHOD(device_probe,		radeon_probe),
728 	DEVMETHOD(device_attach,	radeon_attach),
729 	DEVMETHOD(device_suspend,	radeon_suspend),
730 	DEVMETHOD(device_resume,	radeon_resume),
731 	DEVMETHOD(device_detach,	drm_release),
732 	DEVMETHOD_END
733 };
734 
735 static driver_t radeon_driver = {
736 	"drm",
737 	radeon_methods,
738 	sizeof(struct drm_device)
739 };
740 
741 module_init(radeon_init);
742 module_exit(radeon_exit);
743 
744 extern devclass_t drm_devclass;
745 DRIVER_MODULE_ORDERED(radeon, vgapci, radeon_driver, drm_devclass,
746     NULL, NULL, SI_ORDER_ANY);
747 MODULE_DEPEND(radeon, drm, 1, 1, 1);
748 #ifdef CONFIG_ACPI
749 MODULE_DEPEND(radeon, acpi, 1, 1, 1);
750 #endif
751