1 /* 2 * Copyright 2007-8 Advanced Micro Devices, Inc. 3 * Copyright 2008 Red Hat Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 * 23 * Authors: Dave Airlie 24 * Alex Deucher 25 */ 26 #include <drm/drmP.h> 27 #include <drm/drm_crtc_helper.h> 28 #include <drm/radeon_drm.h> 29 #include "radeon.h" 30 #include "atom.h" 31 32 33 static uint32_t radeon_encoder_clones(struct drm_encoder *encoder) 34 { 35 struct drm_device *dev = encoder->dev; 36 struct radeon_device *rdev = dev->dev_private; 37 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 38 struct drm_encoder *clone_encoder; 39 uint32_t index_mask = 0; 40 int count; 41 42 /* DIG routing gets problematic */ 43 if (rdev->family >= CHIP_R600) 44 return index_mask; 45 /* LVDS/TV are too wacky */ 46 if (radeon_encoder->devices & ATOM_DEVICE_LCD_SUPPORT) 47 return index_mask; 48 /* DVO requires 2x ppll clocks depending on tmds chip */ 49 if (radeon_encoder->devices & ATOM_DEVICE_DFP2_SUPPORT) 50 return index_mask; 51 52 count = -1; 53 list_for_each_entry(clone_encoder, &dev->mode_config.encoder_list, head) { 54 struct radeon_encoder *radeon_clone = to_radeon_encoder(clone_encoder); 55 count++; 56 57 if (clone_encoder == encoder) 58 continue; 59 if (radeon_clone->devices & (ATOM_DEVICE_LCD_SUPPORT)) 60 continue; 61 if (radeon_clone->devices & ATOM_DEVICE_DFP2_SUPPORT) 62 continue; 63 else 64 index_mask |= (1 << count); 65 } 66 return index_mask; 67 } 68 69 void radeon_setup_encoder_clones(struct drm_device *dev) 70 { 71 struct drm_encoder *encoder; 72 73 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { 74 encoder->possible_clones = radeon_encoder_clones(encoder); 75 } 76 } 77 78 uint32_t 79 radeon_get_encoder_enum(struct drm_device *dev, uint32_t supported_device, uint8_t dac) 80 { 81 struct radeon_device *rdev = dev->dev_private; 82 uint32_t ret = 0; 83 84 switch (supported_device) { 85 case ATOM_DEVICE_CRT1_SUPPORT: 86 case ATOM_DEVICE_TV1_SUPPORT: 87 case ATOM_DEVICE_TV2_SUPPORT: 88 case ATOM_DEVICE_CRT2_SUPPORT: 89 case ATOM_DEVICE_CV_SUPPORT: 90 switch (dac) { 91 case 1: /* dac a */ 92 if ((rdev->family == CHIP_RS300) || 93 (rdev->family == CHIP_RS400) || 94 (rdev->family == CHIP_RS480)) 95 ret = ENCODER_INTERNAL_DAC2_ENUM_ID1; 96 else if (ASIC_IS_AVIVO(rdev)) 97 ret = ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1; 98 else 99 ret = ENCODER_INTERNAL_DAC1_ENUM_ID1; 100 break; 101 case 2: /* dac b */ 102 if (ASIC_IS_AVIVO(rdev)) 103 ret = ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1; 104 else { 105 /*if (rdev->family == CHIP_R200) 106 ret = ENCODER_INTERNAL_DVO1_ENUM_ID1; 107 else*/ 108 ret = ENCODER_INTERNAL_DAC2_ENUM_ID1; 109 } 110 break; 111 case 3: /* external dac */ 112 if (ASIC_IS_AVIVO(rdev)) 113 ret = ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1; 114 else 115 ret = ENCODER_INTERNAL_DVO1_ENUM_ID1; 116 break; 117 } 118 break; 119 case ATOM_DEVICE_LCD1_SUPPORT: 120 if (ASIC_IS_AVIVO(rdev)) 121 ret = ENCODER_INTERNAL_LVTM1_ENUM_ID1; 122 else 123 ret = ENCODER_INTERNAL_LVDS_ENUM_ID1; 124 break; 125 case ATOM_DEVICE_DFP1_SUPPORT: 126 if ((rdev->family == CHIP_RS300) || 127 (rdev->family == CHIP_RS400) || 128 (rdev->family == CHIP_RS480)) 129 ret = ENCODER_INTERNAL_DVO1_ENUM_ID1; 130 else if (ASIC_IS_AVIVO(rdev)) 131 ret = ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1; 132 else 133 ret = ENCODER_INTERNAL_TMDS1_ENUM_ID1; 134 break; 135 case ATOM_DEVICE_LCD2_SUPPORT: 136 case ATOM_DEVICE_DFP2_SUPPORT: 137 if ((rdev->family == CHIP_RS600) || 138 (rdev->family == CHIP_RS690) || 139 (rdev->family == CHIP_RS740)) 140 ret = ENCODER_INTERNAL_DDI_ENUM_ID1; 141 else if (ASIC_IS_AVIVO(rdev)) 142 ret = ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1; 143 else 144 ret = ENCODER_INTERNAL_DVO1_ENUM_ID1; 145 break; 146 case ATOM_DEVICE_DFP3_SUPPORT: 147 ret = ENCODER_INTERNAL_LVTM1_ENUM_ID1; 148 break; 149 } 150 151 return ret; 152 } 153 154 static void radeon_encoder_add_backlight(struct radeon_encoder *radeon_encoder, 155 struct drm_connector *connector) 156 { 157 struct drm_device *dev = radeon_encoder->base.dev; 158 struct radeon_device *rdev = dev->dev_private; 159 bool use_bl = false; 160 161 if (!(radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT))) 162 return; 163 164 if (radeon_backlight == 0) { 165 return; 166 } else if (radeon_backlight == 1) { 167 use_bl = true; 168 } else if (radeon_backlight == -1) { 169 /* Quirks */ 170 /* Amilo Xi 2550 only works with acpi bl */ 171 if ((rdev->pdev->device == 0x9583) && 172 (rdev->pdev->subsystem_vendor == 0x1734) && 173 (rdev->pdev->subsystem_device == 0x1107)) 174 use_bl = false; 175 /* Older PPC macs use on-GPU backlight controller */ 176 #ifndef CONFIG_PPC_PMAC 177 /* disable native backlight control on older asics */ 178 else if (rdev->family < CHIP_R600) 179 use_bl = false; 180 #endif 181 else 182 use_bl = true; 183 } 184 185 if (use_bl) { 186 if (rdev->is_atom_bios) 187 radeon_atom_backlight_init(radeon_encoder, connector); 188 else 189 radeon_legacy_backlight_init(radeon_encoder, connector); 190 rdev->mode_info.bl_encoder = radeon_encoder; 191 } 192 } 193 194 void 195 radeon_link_encoder_connector(struct drm_device *dev) 196 { 197 struct drm_connector *connector; 198 struct radeon_connector *radeon_connector; 199 struct drm_encoder *encoder; 200 struct radeon_encoder *radeon_encoder; 201 202 /* walk the list and link encoders to connectors */ 203 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { 204 radeon_connector = to_radeon_connector(connector); 205 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { 206 radeon_encoder = to_radeon_encoder(encoder); 207 if (radeon_encoder->devices & radeon_connector->devices) { 208 drm_mode_connector_attach_encoder(connector, encoder); 209 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) 210 radeon_encoder_add_backlight(radeon_encoder, connector); 211 } 212 } 213 } 214 } 215 216 void radeon_encoder_set_active_device(struct drm_encoder *encoder) 217 { 218 struct drm_device *dev = encoder->dev; 219 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 220 struct drm_connector *connector; 221 222 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { 223 if (connector->encoder == encoder) { 224 struct radeon_connector *radeon_connector = to_radeon_connector(connector); 225 radeon_encoder->active_device = radeon_encoder->devices & radeon_connector->devices; 226 DRM_DEBUG_KMS("setting active device to %08x from %08x %08x for encoder %d\n", 227 radeon_encoder->active_device, radeon_encoder->devices, 228 radeon_connector->devices, encoder->encoder_type); 229 } 230 } 231 } 232 233 struct drm_connector * 234 radeon_get_connector_for_encoder(struct drm_encoder *encoder) 235 { 236 struct drm_device *dev = encoder->dev; 237 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 238 struct drm_connector *connector; 239 struct radeon_connector *radeon_connector; 240 241 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { 242 radeon_connector = to_radeon_connector(connector); 243 if (radeon_encoder->active_device & radeon_connector->devices) 244 return connector; 245 } 246 return NULL; 247 } 248 249 struct drm_connector * 250 radeon_get_connector_for_encoder_init(struct drm_encoder *encoder) 251 { 252 struct drm_device *dev = encoder->dev; 253 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 254 struct drm_connector *connector; 255 struct radeon_connector *radeon_connector; 256 257 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { 258 radeon_connector = to_radeon_connector(connector); 259 if (radeon_encoder->devices & radeon_connector->devices) 260 return connector; 261 } 262 return NULL; 263 } 264 265 struct drm_encoder *radeon_get_external_encoder(struct drm_encoder *encoder) 266 { 267 struct drm_device *dev = encoder->dev; 268 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 269 struct drm_encoder *other_encoder; 270 struct radeon_encoder *other_radeon_encoder; 271 272 if (radeon_encoder->is_ext_encoder) 273 return NULL; 274 275 list_for_each_entry(other_encoder, &dev->mode_config.encoder_list, head) { 276 if (other_encoder == encoder) 277 continue; 278 other_radeon_encoder = to_radeon_encoder(other_encoder); 279 if (other_radeon_encoder->is_ext_encoder && 280 (radeon_encoder->devices & other_radeon_encoder->devices)) 281 return other_encoder; 282 } 283 return NULL; 284 } 285 286 u16 radeon_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder) 287 { 288 struct drm_encoder *other_encoder = radeon_get_external_encoder(encoder); 289 290 if (other_encoder) { 291 struct radeon_encoder *radeon_encoder = to_radeon_encoder(other_encoder); 292 293 switch (radeon_encoder->encoder_id) { 294 case ENCODER_OBJECT_ID_TRAVIS: 295 case ENCODER_OBJECT_ID_NUTMEG: 296 return radeon_encoder->encoder_id; 297 default: 298 return ENCODER_OBJECT_ID_NONE; 299 } 300 } 301 return ENCODER_OBJECT_ID_NONE; 302 } 303 304 void radeon_panel_mode_fixup(struct drm_encoder *encoder, 305 struct drm_display_mode *adjusted_mode) 306 { 307 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 308 struct drm_device *dev = encoder->dev; 309 struct radeon_device *rdev = dev->dev_private; 310 struct drm_display_mode *native_mode = &radeon_encoder->native_mode; 311 unsigned hblank = native_mode->htotal - native_mode->hdisplay; 312 unsigned vblank = native_mode->vtotal - native_mode->vdisplay; 313 unsigned hover = native_mode->hsync_start - native_mode->hdisplay; 314 unsigned vover = native_mode->vsync_start - native_mode->vdisplay; 315 unsigned hsync_width = native_mode->hsync_end - native_mode->hsync_start; 316 unsigned vsync_width = native_mode->vsync_end - native_mode->vsync_start; 317 318 adjusted_mode->clock = native_mode->clock; 319 adjusted_mode->flags = native_mode->flags; 320 321 if (ASIC_IS_AVIVO(rdev)) { 322 adjusted_mode->hdisplay = native_mode->hdisplay; 323 adjusted_mode->vdisplay = native_mode->vdisplay; 324 } 325 326 adjusted_mode->htotal = native_mode->hdisplay + hblank; 327 adjusted_mode->hsync_start = native_mode->hdisplay + hover; 328 adjusted_mode->hsync_end = adjusted_mode->hsync_start + hsync_width; 329 330 adjusted_mode->vtotal = native_mode->vdisplay + vblank; 331 adjusted_mode->vsync_start = native_mode->vdisplay + vover; 332 adjusted_mode->vsync_end = adjusted_mode->vsync_start + vsync_width; 333 334 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V); 335 336 if (ASIC_IS_AVIVO(rdev)) { 337 adjusted_mode->crtc_hdisplay = native_mode->hdisplay; 338 adjusted_mode->crtc_vdisplay = native_mode->vdisplay; 339 } 340 341 adjusted_mode->crtc_htotal = adjusted_mode->crtc_hdisplay + hblank; 342 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + hover; 343 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + hsync_width; 344 345 adjusted_mode->crtc_vtotal = adjusted_mode->crtc_vdisplay + vblank; 346 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + vover; 347 adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + vsync_width; 348 349 } 350 351 bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder, 352 u32 pixel_clock) 353 { 354 struct drm_device *dev = encoder->dev; 355 struct radeon_device *rdev = dev->dev_private; 356 struct drm_connector *connector; 357 struct radeon_connector *radeon_connector; 358 struct radeon_connector_atom_dig *dig_connector; 359 360 connector = radeon_get_connector_for_encoder(encoder); 361 /* if we don't have an active device yet, just use one of 362 * the connectors tied to the encoder. 363 */ 364 if (!connector) 365 connector = radeon_get_connector_for_encoder_init(encoder); 366 radeon_connector = to_radeon_connector(connector); 367 368 switch (connector->connector_type) { 369 case DRM_MODE_CONNECTOR_DVII: 370 case DRM_MODE_CONNECTOR_HDMIB: 371 if (radeon_connector->use_digital) { 372 /* HDMI 1.3 supports up to 340 Mhz over single link */ 373 if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) { 374 if (pixel_clock > 340000) 375 return true; 376 else 377 return false; 378 } else { 379 if (pixel_clock > 165000) 380 return true; 381 else 382 return false; 383 } 384 } else 385 return false; 386 case DRM_MODE_CONNECTOR_DVID: 387 case DRM_MODE_CONNECTOR_HDMIA: 388 case DRM_MODE_CONNECTOR_DisplayPort: 389 dig_connector = radeon_connector->con_priv; 390 if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || 391 (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) 392 return false; 393 else { 394 /* HDMI 1.3 supports up to 340 Mhz over single link */ 395 if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) { 396 if (pixel_clock > 340000) 397 return true; 398 else 399 return false; 400 } else { 401 if (pixel_clock > 165000) 402 return true; 403 else 404 return false; 405 } 406 } 407 default: 408 return false; 409 } 410 } 411 412 bool radeon_encoder_is_digital(struct drm_encoder *encoder) 413 { 414 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 415 switch (radeon_encoder->encoder_id) { 416 case ENCODER_OBJECT_ID_INTERNAL_LVDS: 417 case ENCODER_OBJECT_ID_INTERNAL_TMDS1: 418 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1: 419 case ENCODER_OBJECT_ID_INTERNAL_LVTM1: 420 case ENCODER_OBJECT_ID_INTERNAL_DVO1: 421 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1: 422 case ENCODER_OBJECT_ID_INTERNAL_DDI: 423 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: 424 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA: 425 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: 426 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: 427 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY3: 428 return true; 429 default: 430 return false; 431 } 432 } 433