1 /* 2 * Copyright 2007-8 Advanced Micro Devices, Inc. 3 * Copyright 2008 Red Hat Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 * 23 * Authors: Dave Airlie 24 * Alex Deucher 25 */ 26 #include <drm/drmP.h> 27 #include <drm/drm_crtc_helper.h> 28 #include <uapi_drm/radeon_drm.h> 29 #include "radeon.h" 30 #include "atom.h" 31 32 33 static uint32_t radeon_encoder_clones(struct drm_encoder *encoder) 34 { 35 struct drm_device *dev = encoder->dev; 36 struct radeon_device *rdev = dev->dev_private; 37 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 38 struct drm_encoder *clone_encoder; 39 uint32_t index_mask = 0; 40 int count; 41 42 /* DIG routing gets problematic */ 43 if (rdev->family >= CHIP_R600) 44 return index_mask; 45 /* LVDS/TV are too wacky */ 46 if (radeon_encoder->devices & ATOM_DEVICE_LCD_SUPPORT) 47 return index_mask; 48 /* DVO requires 2x ppll clocks depending on tmds chip */ 49 if (radeon_encoder->devices & ATOM_DEVICE_DFP2_SUPPORT) 50 return index_mask; 51 52 count = -1; 53 list_for_each_entry(clone_encoder, &dev->mode_config.encoder_list, head) { 54 struct radeon_encoder *radeon_clone = to_radeon_encoder(clone_encoder); 55 count++; 56 57 if (clone_encoder == encoder) 58 continue; 59 if (radeon_clone->devices & (ATOM_DEVICE_LCD_SUPPORT)) 60 continue; 61 if (radeon_clone->devices & ATOM_DEVICE_DFP2_SUPPORT) 62 continue; 63 else 64 index_mask |= (1 << count); 65 } 66 return index_mask; 67 } 68 69 void radeon_setup_encoder_clones(struct drm_device *dev) 70 { 71 struct drm_encoder *encoder; 72 73 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { 74 encoder->possible_clones = radeon_encoder_clones(encoder); 75 } 76 } 77 78 uint32_t 79 radeon_get_encoder_enum(struct drm_device *dev, uint32_t supported_device, uint8_t dac) 80 { 81 struct radeon_device *rdev = dev->dev_private; 82 uint32_t ret = 0; 83 84 switch (supported_device) { 85 case ATOM_DEVICE_CRT1_SUPPORT: 86 case ATOM_DEVICE_TV1_SUPPORT: 87 case ATOM_DEVICE_TV2_SUPPORT: 88 case ATOM_DEVICE_CRT2_SUPPORT: 89 case ATOM_DEVICE_CV_SUPPORT: 90 switch (dac) { 91 case 1: /* dac a */ 92 if ((rdev->family == CHIP_RS300) || 93 (rdev->family == CHIP_RS400) || 94 (rdev->family == CHIP_RS480)) 95 ret = ENCODER_INTERNAL_DAC2_ENUM_ID1; 96 else if (ASIC_IS_AVIVO(rdev)) 97 ret = ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1; 98 else 99 ret = ENCODER_INTERNAL_DAC1_ENUM_ID1; 100 break; 101 case 2: /* dac b */ 102 if (ASIC_IS_AVIVO(rdev)) 103 ret = ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1; 104 else { 105 /*if (rdev->family == CHIP_R200) 106 ret = ENCODER_INTERNAL_DVO1_ENUM_ID1; 107 else*/ 108 ret = ENCODER_INTERNAL_DAC2_ENUM_ID1; 109 } 110 break; 111 case 3: /* external dac */ 112 if (ASIC_IS_AVIVO(rdev)) 113 ret = ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1; 114 else 115 ret = ENCODER_INTERNAL_DVO1_ENUM_ID1; 116 break; 117 } 118 break; 119 case ATOM_DEVICE_LCD1_SUPPORT: 120 if (ASIC_IS_AVIVO(rdev)) 121 ret = ENCODER_INTERNAL_LVTM1_ENUM_ID1; 122 else 123 ret = ENCODER_INTERNAL_LVDS_ENUM_ID1; 124 break; 125 case ATOM_DEVICE_DFP1_SUPPORT: 126 if ((rdev->family == CHIP_RS300) || 127 (rdev->family == CHIP_RS400) || 128 (rdev->family == CHIP_RS480)) 129 ret = ENCODER_INTERNAL_DVO1_ENUM_ID1; 130 else if (ASIC_IS_AVIVO(rdev)) 131 ret = ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1; 132 else 133 ret = ENCODER_INTERNAL_TMDS1_ENUM_ID1; 134 break; 135 case ATOM_DEVICE_LCD2_SUPPORT: 136 case ATOM_DEVICE_DFP2_SUPPORT: 137 if ((rdev->family == CHIP_RS600) || 138 (rdev->family == CHIP_RS690) || 139 (rdev->family == CHIP_RS740)) 140 ret = ENCODER_INTERNAL_DDI_ENUM_ID1; 141 else if (ASIC_IS_AVIVO(rdev)) 142 ret = ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1; 143 else 144 ret = ENCODER_INTERNAL_DVO1_ENUM_ID1; 145 break; 146 case ATOM_DEVICE_DFP3_SUPPORT: 147 ret = ENCODER_INTERNAL_LVTM1_ENUM_ID1; 148 break; 149 } 150 151 return ret; 152 } 153 154 static void radeon_encoder_add_backlight(struct radeon_encoder *radeon_encoder, 155 struct drm_connector *connector) 156 { 157 struct drm_device *dev = radeon_encoder->base.dev; 158 struct radeon_device *rdev = dev->dev_private; 159 bool use_bl = false; 160 161 if (!(radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT))) 162 return; 163 164 if (radeon_backlight == 0) { 165 return; 166 } else if (radeon_backlight == 1) { 167 use_bl = true; 168 } else if (radeon_backlight == -1) { 169 /* Quirks */ 170 /* Amilo Xi 2550 only works with acpi bl */ 171 if ((rdev->pdev->device == 0x9583) && 172 (rdev->pdev->subsystem_vendor == 0x1734) && 173 (rdev->pdev->subsystem_device == 0x1107)) 174 use_bl = false; 175 /* disable native backlight control on older asics */ 176 else if (rdev->family < CHIP_R600) 177 use_bl = false; 178 else 179 use_bl = true; 180 } 181 182 if (use_bl) { 183 if (rdev->is_atom_bios) 184 radeon_atom_backlight_init(radeon_encoder, connector); 185 else 186 radeon_legacy_backlight_init(radeon_encoder, connector); 187 rdev->mode_info.bl_encoder = radeon_encoder; 188 } 189 } 190 191 void 192 radeon_link_encoder_connector(struct drm_device *dev) 193 { 194 struct drm_connector *connector; 195 struct radeon_connector *radeon_connector; 196 struct drm_encoder *encoder; 197 struct radeon_encoder *radeon_encoder; 198 199 /* walk the list and link encoders to connectors */ 200 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { 201 radeon_connector = to_radeon_connector(connector); 202 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { 203 radeon_encoder = to_radeon_encoder(encoder); 204 if (radeon_encoder->devices & radeon_connector->devices) { 205 drm_mode_connector_attach_encoder(connector, encoder); 206 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) 207 radeon_encoder_add_backlight(radeon_encoder, connector); 208 } 209 } 210 } 211 } 212 213 void radeon_encoder_set_active_device(struct drm_encoder *encoder) 214 { 215 struct drm_device *dev = encoder->dev; 216 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 217 struct drm_connector *connector; 218 219 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { 220 if (connector->encoder == encoder) { 221 struct radeon_connector *radeon_connector = to_radeon_connector(connector); 222 radeon_encoder->active_device = radeon_encoder->devices & radeon_connector->devices; 223 DRM_DEBUG_KMS("setting active device to %08x from %08x %08x for encoder %d\n", 224 radeon_encoder->active_device, radeon_encoder->devices, 225 radeon_connector->devices, encoder->encoder_type); 226 } 227 } 228 } 229 230 struct drm_connector * 231 radeon_get_connector_for_encoder(struct drm_encoder *encoder) 232 { 233 struct drm_device *dev = encoder->dev; 234 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 235 struct drm_connector *connector; 236 struct radeon_connector *radeon_connector; 237 238 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { 239 radeon_connector = to_radeon_connector(connector); 240 if (radeon_encoder->active_device & radeon_connector->devices) 241 return connector; 242 } 243 return NULL; 244 } 245 246 struct drm_connector * 247 radeon_get_connector_for_encoder_init(struct drm_encoder *encoder) 248 { 249 struct drm_device *dev = encoder->dev; 250 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 251 struct drm_connector *connector; 252 struct radeon_connector *radeon_connector; 253 254 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { 255 radeon_connector = to_radeon_connector(connector); 256 if (radeon_encoder->devices & radeon_connector->devices) 257 return connector; 258 } 259 return NULL; 260 } 261 262 struct drm_encoder *radeon_get_external_encoder(struct drm_encoder *encoder) 263 { 264 struct drm_device *dev = encoder->dev; 265 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 266 struct drm_encoder *other_encoder; 267 struct radeon_encoder *other_radeon_encoder; 268 269 if (radeon_encoder->is_ext_encoder) 270 return NULL; 271 272 list_for_each_entry(other_encoder, &dev->mode_config.encoder_list, head) { 273 if (other_encoder == encoder) 274 continue; 275 other_radeon_encoder = to_radeon_encoder(other_encoder); 276 if (other_radeon_encoder->is_ext_encoder && 277 (radeon_encoder->devices & other_radeon_encoder->devices)) 278 return other_encoder; 279 } 280 return NULL; 281 } 282 283 u16 radeon_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder) 284 { 285 struct drm_encoder *other_encoder = radeon_get_external_encoder(encoder); 286 287 if (other_encoder) { 288 struct radeon_encoder *radeon_encoder = to_radeon_encoder(other_encoder); 289 290 switch (radeon_encoder->encoder_id) { 291 case ENCODER_OBJECT_ID_TRAVIS: 292 case ENCODER_OBJECT_ID_NUTMEG: 293 return radeon_encoder->encoder_id; 294 default: 295 return ENCODER_OBJECT_ID_NONE; 296 } 297 } 298 return ENCODER_OBJECT_ID_NONE; 299 } 300 301 void radeon_panel_mode_fixup(struct drm_encoder *encoder, 302 struct drm_display_mode *adjusted_mode) 303 { 304 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 305 struct drm_device *dev = encoder->dev; 306 struct radeon_device *rdev = dev->dev_private; 307 struct drm_display_mode *native_mode = &radeon_encoder->native_mode; 308 unsigned hblank = native_mode->htotal - native_mode->hdisplay; 309 unsigned vblank = native_mode->vtotal - native_mode->vdisplay; 310 unsigned hover = native_mode->hsync_start - native_mode->hdisplay; 311 unsigned vover = native_mode->vsync_start - native_mode->vdisplay; 312 unsigned hsync_width = native_mode->hsync_end - native_mode->hsync_start; 313 unsigned vsync_width = native_mode->vsync_end - native_mode->vsync_start; 314 315 adjusted_mode->clock = native_mode->clock; 316 adjusted_mode->flags = native_mode->flags; 317 318 if (ASIC_IS_AVIVO(rdev)) { 319 adjusted_mode->hdisplay = native_mode->hdisplay; 320 adjusted_mode->vdisplay = native_mode->vdisplay; 321 } 322 323 adjusted_mode->htotal = native_mode->hdisplay + hblank; 324 adjusted_mode->hsync_start = native_mode->hdisplay + hover; 325 adjusted_mode->hsync_end = adjusted_mode->hsync_start + hsync_width; 326 327 adjusted_mode->vtotal = native_mode->vdisplay + vblank; 328 adjusted_mode->vsync_start = native_mode->vdisplay + vover; 329 adjusted_mode->vsync_end = adjusted_mode->vsync_start + vsync_width; 330 331 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V); 332 333 if (ASIC_IS_AVIVO(rdev)) { 334 adjusted_mode->crtc_hdisplay = native_mode->hdisplay; 335 adjusted_mode->crtc_vdisplay = native_mode->vdisplay; 336 } 337 338 adjusted_mode->crtc_htotal = adjusted_mode->crtc_hdisplay + hblank; 339 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + hover; 340 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + hsync_width; 341 342 adjusted_mode->crtc_vtotal = adjusted_mode->crtc_vdisplay + vblank; 343 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + vover; 344 adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + vsync_width; 345 346 } 347 348 bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder, 349 u32 pixel_clock) 350 { 351 struct drm_device *dev = encoder->dev; 352 struct radeon_device *rdev = dev->dev_private; 353 struct drm_connector *connector; 354 struct radeon_connector *radeon_connector; 355 struct radeon_connector_atom_dig *dig_connector; 356 357 connector = radeon_get_connector_for_encoder(encoder); 358 /* if we don't have an active device yet, just use one of 359 * the connectors tied to the encoder. 360 */ 361 if (!connector) 362 connector = radeon_get_connector_for_encoder_init(encoder); 363 radeon_connector = to_radeon_connector(connector); 364 365 switch (connector->connector_type) { 366 case DRM_MODE_CONNECTOR_DVII: 367 case DRM_MODE_CONNECTOR_HDMIB: 368 if (radeon_connector->use_digital) { 369 /* HDMI 1.3 supports up to 340 Mhz over single link */ 370 if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) { 371 if (pixel_clock > 340000) 372 return true; 373 else 374 return false; 375 } else { 376 if (pixel_clock > 165000) 377 return true; 378 else 379 return false; 380 } 381 } else 382 return false; 383 case DRM_MODE_CONNECTOR_DVID: 384 case DRM_MODE_CONNECTOR_HDMIA: 385 case DRM_MODE_CONNECTOR_DisplayPort: 386 dig_connector = radeon_connector->con_priv; 387 if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || 388 (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) 389 return false; 390 else { 391 /* HDMI 1.3 supports up to 340 Mhz over single link */ 392 if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) { 393 if (pixel_clock > 340000) 394 return true; 395 else 396 return false; 397 } else { 398 if (pixel_clock > 165000) 399 return true; 400 else 401 return false; 402 } 403 } 404 default: 405 return false; 406 } 407 } 408 409 bool radeon_encoder_is_digital(struct drm_encoder *encoder) 410 { 411 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 412 switch (radeon_encoder->encoder_id) { 413 case ENCODER_OBJECT_ID_INTERNAL_LVDS: 414 case ENCODER_OBJECT_ID_INTERNAL_TMDS1: 415 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1: 416 case ENCODER_OBJECT_ID_INTERNAL_LVTM1: 417 case ENCODER_OBJECT_ID_INTERNAL_DVO1: 418 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1: 419 case ENCODER_OBJECT_ID_INTERNAL_DDI: 420 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: 421 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA: 422 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: 423 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: 424 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY3: 425 return true; 426 default: 427 return false; 428 } 429 } 430