xref: /dragonfly/sys/dev/drm/radeon/radeon_fb.c (revision 88ed2a5c)
1 /*
2  * Copyright © 2007 David Airlie
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21  * DEALINGS IN THE SOFTWARE.
22  *
23  * Authors:
24  *     David Airlie
25  */
26 #include <linux/module.h>
27 #include <linux/fb.h>
28 
29 #include <drm/drmP.h>
30 #include <drm/drm_crtc.h>
31 #include <drm/drm_crtc_helper.h>
32 #include <drm/radeon_drm.h>
33 #include "radeon.h"
34 
35 #include <drm/drm_fb_helper.h>
36 
37 #include <linux/vga_switcheroo.h>
38 
39 /* object hierarchy -
40  * this contains a helper + a radeon fb
41  * the helper contains a pointer to radeon framebuffer baseclass.
42  */
43 struct radeon_fbdev {
44 	struct drm_fb_helper helper;
45 	struct radeon_framebuffer rfb;
46 	struct radeon_device *rdev;
47 };
48 
49 static struct fb_ops radeonfb_ops = {
50 #if 0
51 	.owner = THIS_MODULE,
52 	.fb_check_var = drm_fb_helper_check_var,
53 #endif
54 	.fb_set_par = drm_fb_helper_set_par,
55 #if 0
56 	.fb_fillrect = drm_fb_helper_cfb_fillrect,
57 	.fb_copyarea = drm_fb_helper_cfb_copyarea,
58 	.fb_imageblit = drm_fb_helper_cfb_imageblit,
59 	.fb_pan_display = drm_fb_helper_pan_display,
60 #endif
61 	.fb_blank = drm_fb_helper_blank,
62 #if 0
63 	.fb_setcmap = drm_fb_helper_setcmap,
64 #endif
65 	.fb_debug_enter = drm_fb_helper_debug_enter,
66 #if 0
67 	.fb_debug_leave = drm_fb_helper_debug_leave,
68 #endif
69 };
70 
71 
72 int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled)
73 {
74 	int aligned = width;
75 	int align_large = (ASIC_IS_AVIVO(rdev)) || tiled;
76 	int pitch_mask = 0;
77 
78 	switch (bpp / 8) {
79 	case 1:
80 		pitch_mask = align_large ? 255 : 127;
81 		break;
82 	case 2:
83 		pitch_mask = align_large ? 127 : 31;
84 		break;
85 	case 3:
86 	case 4:
87 		pitch_mask = align_large ? 63 : 15;
88 		break;
89 	}
90 
91 	aligned += pitch_mask;
92 	aligned &= ~pitch_mask;
93 	return aligned;
94 }
95 
96 static void radeonfb_destroy_pinned_object(struct drm_gem_object *gobj)
97 {
98 	struct radeon_bo *rbo = gem_to_radeon_bo(gobj);
99 	int ret;
100 
101 	ret = radeon_bo_reserve(rbo, false);
102 	if (likely(ret == 0)) {
103 		radeon_bo_kunmap(rbo);
104 		radeon_bo_unpin(rbo);
105 		radeon_bo_unreserve(rbo);
106 	}
107 	drm_gem_object_unreference_unlocked(gobj);
108 }
109 
110 static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev,
111 					 struct drm_mode_fb_cmd2 *mode_cmd,
112 					 struct drm_gem_object **gobj_p)
113 {
114 	struct radeon_device *rdev = rfbdev->rdev;
115 	struct drm_gem_object *gobj = NULL;
116 	struct radeon_bo *rbo = NULL;
117 	bool fb_tiled = false; /* useful for testing */
118 	u32 tiling_flags = 0;
119 	int ret;
120 	int aligned_size, size;
121 	int height = mode_cmd->height;
122 	u32 bpp, depth;
123 
124 	drm_fb_get_bpp_depth(mode_cmd->pixel_format, &depth, &bpp);
125 
126 	/* need to align pitch with crtc limits */
127 	mode_cmd->pitches[0] = radeon_align_pitch(rdev, mode_cmd->width, bpp,
128 						  fb_tiled) * ((bpp + 1) / 8);
129 
130 	if (rdev->family >= CHIP_R600)
131 		height = ALIGN(mode_cmd->height, 8);
132 	size = mode_cmd->pitches[0] * height;
133 	aligned_size = ALIGN(size, PAGE_SIZE);
134 	ret = radeon_gem_object_create(rdev, aligned_size, 0,
135 				       RADEON_GEM_DOMAIN_VRAM,
136 				       0, true, &gobj);
137 	if (ret) {
138 		printk(KERN_ERR "failed to allocate framebuffer (%d)\n",
139 		       aligned_size);
140 		return -ENOMEM;
141 	}
142 	rbo = gem_to_radeon_bo(gobj);
143 
144 	if (fb_tiled)
145 		tiling_flags = RADEON_TILING_MACRO;
146 
147 #ifdef __BIG_ENDIAN
148 	switch (bpp) {
149 	case 32:
150 		tiling_flags |= RADEON_TILING_SWAP_32BIT;
151 		break;
152 	case 16:
153 		tiling_flags |= RADEON_TILING_SWAP_16BIT;
154 	default:
155 		break;
156 	}
157 #endif
158 
159 	if (tiling_flags) {
160 		ret = radeon_bo_set_tiling_flags(rbo,
161 						 tiling_flags | RADEON_TILING_SURFACE,
162 						 mode_cmd->pitches[0]);
163 		if (ret)
164 			dev_err(rdev->dev, "FB failed to set tiling flags\n");
165 	}
166 
167 
168 	ret = radeon_bo_reserve(rbo, false);
169 	if (unlikely(ret != 0))
170 		goto out_unref;
171 	/* Only 27 bit offset for legacy CRTC */
172 	ret = radeon_bo_pin_restricted(rbo, RADEON_GEM_DOMAIN_VRAM,
173 				       ASIC_IS_AVIVO(rdev) ? 0 : 1 << 27,
174 				       NULL);
175 	if (ret) {
176 		radeon_bo_unreserve(rbo);
177 		goto out_unref;
178 	}
179 	if (fb_tiled)
180 		radeon_bo_check_tiling(rbo, 0, 0);
181 	ret = radeon_bo_kmap(rbo, NULL);
182 	radeon_bo_unreserve(rbo);
183 	if (ret) {
184 		goto out_unref;
185 	}
186 
187 	*gobj_p = gobj;
188 	return 0;
189 out_unref:
190 	radeonfb_destroy_pinned_object(gobj);
191 	*gobj_p = NULL;
192 	return ret;
193 }
194 
195 static int radeonfb_create(struct drm_fb_helper *helper,
196 			   struct drm_fb_helper_surface_size *sizes)
197 {
198 	struct radeon_fbdev *rfbdev =
199 		container_of(helper, struct radeon_fbdev, helper);
200 	struct radeon_device *rdev = rfbdev->rdev;
201 	struct fb_info *info;
202 	struct drm_framebuffer *fb = NULL;
203 	struct drm_mode_fb_cmd2 mode_cmd;
204 	struct drm_gem_object *gobj = NULL;
205 	struct radeon_bo *rbo = NULL;
206 	int ret;
207 	device_t vga_dev = device_get_parent(rdev->dev->bsddev);
208 
209 	mode_cmd.width = sizes->surface_width;
210 	mode_cmd.height = sizes->surface_height;
211 
212 	/* avivo can't scanout real 24bpp */
213 	if ((sizes->surface_bpp == 24) && ASIC_IS_AVIVO(rdev))
214 		sizes->surface_bpp = 32;
215 
216 	mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp,
217 							  sizes->surface_depth);
218 
219 	ret = radeonfb_create_pinned_object(rfbdev, &mode_cmd, &gobj);
220 	if (ret) {
221 		DRM_ERROR("failed to create fbcon object %d\n", ret);
222 		return ret;
223 	}
224 
225 	rbo = gem_to_radeon_bo(gobj);
226 
227 	/* okay we have an object now allocate the framebuffer */
228 	info = drm_fb_helper_alloc_fbi(helper);
229 	if (IS_ERR(info)) {
230 		ret = PTR_ERR(info);
231 		goto out_unref;
232 	}
233 
234 	info->par = rfbdev;
235 
236 	ret = radeon_framebuffer_init(rdev->ddev, &rfbdev->rfb, &mode_cmd, gobj);
237 	if (ret) {
238 		DRM_ERROR("failed to initialize framebuffer %d\n", ret);
239 		goto out_destroy_fbi;
240 	}
241 
242 	fb = &rfbdev->rfb.base;
243 
244 	/* setup helper */
245 	rfbdev->helper.fb = fb;
246 
247 	memset_io(rbo->kptr, 0x0, radeon_bo_size(rbo));
248 
249 #ifdef __DragonFly__
250 	info->width = sizes->fb_width;
251 	info->height = sizes->fb_height;
252 	info->stride = fb->pitches[0];
253 	info->depth = sizes->surface_bpp;
254 	info->is_vga_boot_display = vga_pci_is_boot_display(vga_dev);
255 	info->fbops = radeonfb_ops;
256 	/* We use info->screen_base and info->screen_size would-be values */
257 #if 0
258 	info->paddr = (vm_paddr_t)rbo->kptr;
259 	info->vaddr = (vm_offset_t)pmap_mapdev_attr(info->paddr,
260 		radeon_bo_size(rbo),
261 		VM_MEMATTR_WRITE_COMBINING);
262 #endif
263 	unsigned long tmp = radeon_bo_gpu_offset(rbo) - rdev->mc.vram_start;
264 	info->vaddr = (vm_offset_t)rbo->kptr;
265 	info->paddr = rdev->mc.aper_base + tmp;
266 #else
267 	strcpy(info->fix.id, "radeondrmfb");
268 
269 	drm_fb_helper_fill_fix(info, fb->pitches[0], fb->depth);
270 
271 	info->flags = FBINFO_DEFAULT | FBINFO_CAN_FORCE_OUTPUT;
272 	info->fbops = &radeonfb_ops;
273 
274 	tmp = radeon_bo_gpu_offset(rbo) - rdev->mc.vram_start;
275 	info->fix.smem_start = rdev->mc.aper_base + tmp;
276 	info->fix.smem_len = radeon_bo_size(rbo);
277 	info->screen_base = rbo->kptr;
278 	info->screen_size = radeon_bo_size(rbo);
279 
280 	drm_fb_helper_fill_var(info, &rfbdev->helper, sizes->fb_width, sizes->fb_height);
281 
282 	/* setup aperture base/size for vesafb takeover */
283 	info->apertures->ranges[0].base = rdev->ddev->mode_config.fb_base;
284 	info->apertures->ranges[0].size = rdev->mc.aper_size;
285 
286 	/* Use default scratch pixmap (info->pixmap.flags = FB_PIXMAP_SYSTEM) */
287 
288 	if (info->screen_base == NULL) {
289 		ret = -ENOSPC;
290 		goto out_destroy_fbi;
291 	}
292 #endif
293 
294 	DRM_INFO("fb mappable at 0x%jX\n",  info->paddr);
295 	DRM_INFO("vram apper at 0x%lX\n",  (unsigned long)rdev->mc.aper_base);
296 	DRM_INFO("size %lu\n", (unsigned long)radeon_bo_size(rbo));
297 	DRM_INFO("fb depth is %d\n", fb->depth);
298 	DRM_INFO("   pitch is %d\n", fb->pitches[0]);
299 
300 	vga_switcheroo_client_fb_set(rdev->ddev->pdev, info);
301 	return 0;
302 
303 out_destroy_fbi:
304 	drm_fb_helper_release_fbi(helper);
305 out_unref:
306 	if (rbo) {
307 
308 	}
309 	if (fb && ret) {
310 		drm_gem_object_unreference_unlocked(gobj);
311 		drm_framebuffer_unregister_private(fb);
312 		drm_framebuffer_cleanup(fb);
313 		kfree(fb);
314 	}
315 	return ret;
316 }
317 
318 void radeon_fb_output_poll_changed(struct radeon_device *rdev)
319 {
320 	if (rdev->mode_info.rfbdev)
321 		drm_fb_helper_hotplug_event(&rdev->mode_info.rfbdev->helper);
322 }
323 
324 static int radeon_fbdev_destroy(struct drm_device *dev, struct radeon_fbdev *rfbdev)
325 {
326 	struct radeon_framebuffer *rfb = &rfbdev->rfb;
327 
328 	drm_fb_helper_unregister_fbi(&rfbdev->helper);
329 	drm_fb_helper_release_fbi(&rfbdev->helper);
330 
331 	if (rfb->obj) {
332 		radeonfb_destroy_pinned_object(rfb->obj);
333 		rfb->obj = NULL;
334 	}
335 	drm_fb_helper_fini(&rfbdev->helper);
336 	drm_framebuffer_unregister_private(&rfb->base);
337 	drm_framebuffer_cleanup(&rfb->base);
338 
339 	return 0;
340 }
341 
342 static const struct drm_fb_helper_funcs radeon_fb_helper_funcs = {
343 	.gamma_set = radeon_crtc_fb_gamma_set,
344 	.gamma_get = radeon_crtc_fb_gamma_get,
345 	.fb_probe = radeonfb_create,
346 };
347 
348 int radeon_fbdev_init(struct radeon_device *rdev)
349 {
350 	struct radeon_fbdev *rfbdev;
351 	int bpp_sel = 32;
352 	int ret;
353 
354 	/* don't enable fbdev if no connectors */
355 	if (list_empty(&rdev->ddev->mode_config.connector_list))
356 		return 0;
357 
358 	/* select 8 bpp console on RN50 or 16MB cards */
359 	if (ASIC_IS_RN50(rdev) || rdev->mc.real_vram_size <= (32*1024*1024))
360 		bpp_sel = 8;
361 
362 	rfbdev = kzalloc(sizeof(struct radeon_fbdev), GFP_KERNEL);
363 	if (!rfbdev)
364 		return -ENOMEM;
365 
366 	rfbdev->rdev = rdev;
367 	rdev->mode_info.rfbdev = rfbdev;
368 
369 	drm_fb_helper_prepare(rdev->ddev, &rfbdev->helper,
370 			      &radeon_fb_helper_funcs);
371 
372 	ret = drm_fb_helper_init(rdev->ddev, &rfbdev->helper,
373 				 rdev->num_crtc,
374 				 RADEONFB_CONN_LIMIT);
375 	if (ret)
376 		goto free;
377 
378 	ret = drm_fb_helper_single_add_all_connectors(&rfbdev->helper);
379 	if (ret)
380 		goto fini;
381 
382 	/* disable all the possible outputs/crtcs before entering KMS mode */
383 	drm_helper_disable_unused_functions(rdev->ddev);
384 
385 	ret = drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel);
386 	if (ret)
387 		goto fini;
388 
389 	return 0;
390 
391 fini:
392 	drm_fb_helper_fini(&rfbdev->helper);
393 free:
394 	kfree(rfbdev);
395 	return ret;
396 }
397 
398 void radeon_fbdev_fini(struct radeon_device *rdev)
399 {
400 	if (!rdev->mode_info.rfbdev)
401 		return;
402 
403 	radeon_fbdev_destroy(rdev->ddev, rdev->mode_info.rfbdev);
404 	kfree(rdev->mode_info.rfbdev);
405 	rdev->mode_info.rfbdev = NULL;
406 }
407 
408 void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state)
409 {
410 #ifdef DUMBBELL_WIP
411 	if (rdev->mode_info.rfbdev)
412 		fb_set_suspend(rdev->mode_info.rfbdev->helper.fbdev, state);
413 #endif /* DUMBBELL_WIP */
414 }
415 
416 bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj)
417 {
418 	if (!rdev->mode_info.rfbdev)
419 		return false;
420 
421 	if (robj == gem_to_radeon_bo(rdev->mode_info.rfbdev->rfb.obj))
422 		return true;
423 	return false;
424 }
425 
426 void radeon_fb_add_connector(struct radeon_device *rdev, struct drm_connector *connector)
427 {
428 	if (rdev->mode_info.rfbdev)
429 		drm_fb_helper_add_one_connector(&rdev->mode_info.rfbdev->helper, connector);
430 }
431 
432 void radeon_fb_remove_connector(struct radeon_device *rdev, struct drm_connector *connector)
433 {
434 	if (rdev->mode_info.rfbdev)
435 		drm_fb_helper_remove_one_connector(&rdev->mode_info.rfbdev->helper, connector);
436 }
437 
438 void radeon_fbdev_restore_mode(struct radeon_device *rdev)
439 {
440 	struct radeon_fbdev *rfbdev = rdev->mode_info.rfbdev;
441 	struct drm_fb_helper *fb_helper;
442 	int ret;
443 
444 	if (!rfbdev)
445 		return;
446 
447 	fb_helper = &rfbdev->helper;
448 
449 	ret = drm_fb_helper_restore_fbdev_mode_unlocked(fb_helper);
450 	if (ret)
451 		DRM_DEBUG("failed to restore crtc mode\n");
452 }
453