xref: /dragonfly/sys/dev/drm/radeon/radeon_fb.c (revision b0d289c2)
1 /*
2  * Copyright © 2007 David Airlie
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21  * DEALINGS IN THE SOFTWARE.
22  *
23  * Authors:
24  *     David Airlie
25  *
26  * $FreeBSD: head/sys/dev/drm2/radeon/radeon_fb.c 254885 2013-08-25 19:37:15Z dumbbell $
27  */
28 
29 #include <drm/drmP.h>
30 #include <drm/drm_crtc.h>
31 #include <drm/drm_crtc_helper.h>
32 #include <uapi_drm/radeon_drm.h>
33 #include "radeon.h"
34 
35 #include <drm/drm_fb_helper.h>
36 
37 /* object hierarchy -
38    this contains a helper + a radeon fb
39    the helper contains a pointer to radeon framebuffer baseclass.
40 */
41 struct radeon_fbdev {
42 	struct drm_fb_helper helper;
43 	struct radeon_framebuffer rfb;
44 	struct list_head fbdev_list;
45 	struct radeon_device *rdev;
46 };
47 
48 #ifdef DUMBBELL_WIP
49 static struct fb_ops radeonfb_ops = {
50 	.owner = THIS_MODULE,
51 	.fb_check_var = drm_fb_helper_check_var,
52 	.fb_set_par = drm_fb_helper_set_par,
53 	.fb_fillrect = cfb_fillrect,
54 	.fb_copyarea = cfb_copyarea,
55 	.fb_imageblit = cfb_imageblit,
56 	.fb_pan_display = drm_fb_helper_pan_display,
57 	.fb_blank = drm_fb_helper_blank,
58 	.fb_setcmap = drm_fb_helper_setcmap,
59 	.fb_debug_enter = drm_fb_helper_debug_enter,
60 	.fb_debug_leave = drm_fb_helper_debug_leave,
61 };
62 #endif /* DUMBBELL_WIP */
63 
64 
65 int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled)
66 {
67 	int aligned = width;
68 	int align_large = (ASIC_IS_AVIVO(rdev)) || tiled;
69 	int pitch_mask = 0;
70 
71 	switch (bpp / 8) {
72 	case 1:
73 		pitch_mask = align_large ? 255 : 127;
74 		break;
75 	case 2:
76 		pitch_mask = align_large ? 127 : 31;
77 		break;
78 	case 3:
79 	case 4:
80 		pitch_mask = align_large ? 63 : 15;
81 		break;
82 	}
83 
84 	aligned += pitch_mask;
85 	aligned &= ~pitch_mask;
86 	return aligned;
87 }
88 
89 static void radeonfb_destroy_pinned_object(struct drm_gem_object *gobj)
90 {
91 	struct radeon_bo *rbo = gem_to_radeon_bo(gobj);
92 	int ret;
93 
94 	ret = radeon_bo_reserve(rbo, false);
95 	if (likely(ret == 0)) {
96 		radeon_bo_kunmap(rbo);
97 		radeon_bo_unpin(rbo);
98 		radeon_bo_unreserve(rbo);
99 	}
100 	drm_gem_object_unreference_unlocked(gobj);
101 }
102 
103 static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev,
104 					 struct drm_mode_fb_cmd2 *mode_cmd,
105 					 struct drm_gem_object **gobj_p)
106 {
107 	struct radeon_device *rdev = rfbdev->rdev;
108 	struct drm_gem_object *gobj = NULL;
109 	struct radeon_bo *rbo = NULL;
110 	bool fb_tiled = false; /* useful for testing */
111 	u32 tiling_flags = 0;
112 	int ret;
113 	int aligned_size, size;
114 	int height = mode_cmd->height;
115 	u32 bpp, depth;
116 
117 	drm_fb_get_bpp_depth(mode_cmd->pixel_format, &depth, &bpp);
118 
119 	/* need to align pitch with crtc limits */
120 	mode_cmd->pitches[0] = radeon_align_pitch(rdev, mode_cmd->width, bpp,
121 						  fb_tiled) * ((bpp + 1) / 8);
122 
123 	if (rdev->family >= CHIP_R600)
124 		height = ALIGN(mode_cmd->height, 8);
125 	size = mode_cmd->pitches[0] * height;
126 	aligned_size = ALIGN(size, PAGE_SIZE);
127 	ret = radeon_gem_object_create(rdev, aligned_size, 0,
128 				       RADEON_GEM_DOMAIN_VRAM,
129 				       false, true,
130 				       &gobj);
131 	if (ret) {
132 		printk(KERN_ERR "failed to allocate framebuffer (%d)\n",
133 		       aligned_size);
134 		return -ENOMEM;
135 	}
136 	rbo = gem_to_radeon_bo(gobj);
137 
138 	if (fb_tiled)
139 		tiling_flags = RADEON_TILING_MACRO;
140 
141 #ifdef __BIG_ENDIAN
142 	switch (bpp) {
143 	case 32:
144 		tiling_flags |= RADEON_TILING_SWAP_32BIT;
145 		break;
146 	case 16:
147 		tiling_flags |= RADEON_TILING_SWAP_16BIT;
148 	default:
149 		break;
150 	}
151 #endif
152 
153 	if (tiling_flags) {
154 		ret = radeon_bo_set_tiling_flags(rbo,
155 						 tiling_flags | RADEON_TILING_SURFACE,
156 						 mode_cmd->pitches[0]);
157 		if (ret)
158 			dev_err(rdev->dev, "FB failed to set tiling flags\n");
159 	}
160 
161 
162 	ret = radeon_bo_reserve(rbo, false);
163 	if (unlikely(ret != 0))
164 		goto out_unref;
165 	/* Only 27 bit offset for legacy CRTC */
166 	ret = radeon_bo_pin_restricted(rbo, RADEON_GEM_DOMAIN_VRAM,
167 				       ASIC_IS_AVIVO(rdev) ? 0 : 1 << 27,
168 				       NULL);
169 	if (ret) {
170 		radeon_bo_unreserve(rbo);
171 		goto out_unref;
172 	}
173 	if (fb_tiled)
174 		radeon_bo_check_tiling(rbo, 0, 0);
175 	ret = radeon_bo_kmap(rbo, NULL);
176 	radeon_bo_unreserve(rbo);
177 	if (ret) {
178 		goto out_unref;
179 	}
180 
181 	*gobj_p = gobj;
182 	return 0;
183 out_unref:
184 	radeonfb_destroy_pinned_object(gobj);
185 	*gobj_p = NULL;
186 	return ret;
187 }
188 
189 static int radeonfb_create(struct drm_fb_helper *helper,
190 			   struct drm_fb_helper_surface_size *sizes)
191 {
192 	struct radeon_fbdev *rfbdev = (struct radeon_fbdev *)helper;
193 	struct radeon_device *rdev = rfbdev->rdev;
194 	struct fb_info *info;
195 	struct drm_framebuffer *fb = NULL;
196 	struct drm_mode_fb_cmd2 mode_cmd;
197 	struct drm_gem_object *gobj = NULL;
198 	struct radeon_bo *rbo = NULL;
199 #ifdef DUMBBELL_WIP
200 	device_t device = rdev->dev;
201 #endif /* DUMBBELL_WIP */
202 	device_t vga_dev = device_get_parent(rdev->dev);
203 	int ret;
204 	unsigned long tmp;
205 
206 	mode_cmd.width = sizes->surface_width;
207 	mode_cmd.height = sizes->surface_height;
208 
209 	/* avivo can't scanout real 24bpp */
210 	if ((sizes->surface_bpp == 24) && ASIC_IS_AVIVO(rdev))
211 		sizes->surface_bpp = 32;
212 
213 	mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp,
214 							  sizes->surface_depth);
215 
216 	ret = radeonfb_create_pinned_object(rfbdev, &mode_cmd, &gobj);
217 	if (ret) {
218 		DRM_ERROR("failed to create fbcon object %d\n", ret);
219 		return ret;
220 	}
221 
222 	rbo = gem_to_radeon_bo(gobj);
223 
224 	info = kmalloc(sizeof(*info), M_DRM, M_WAITOK | M_ZERO);
225 
226 	ret = radeon_framebuffer_init(rdev->ddev, &rfbdev->rfb, &mode_cmd, gobj);
227 	if (ret) {
228 		DRM_ERROR("failed to initialize framebuffer %d\n", ret);
229 		goto out_unref;
230 	}
231 
232 	fb = &rfbdev->rfb.base;
233 
234 	/* setup helper */
235 	rfbdev->helper.fb = fb;
236 	rfbdev->helper.fbdev = info;
237 
238 	memset(rbo->kptr, 0, radeon_bo_size(rbo));
239 	tmp = radeon_bo_gpu_offset(rbo) - rdev->mc.vram_start;
240 	info->vaddr = (vm_offset_t)rbo->kptr;
241 	info->paddr = rdev->mc.aper_base + tmp;
242 	info->width = sizes->surface_width;
243 	info->height = sizes->surface_height;
244 	info->stride = sizes->surface_width * (sizes->surface_bpp/8);
245 	info->depth = sizes->surface_bpp;
246 	info->is_vga_boot_display = vga_pci_is_boot_display(vga_dev);
247 
248 	DRM_INFO("fb mappable at 0x%jX\n",  info->paddr);
249 	DRM_INFO("vram apper at 0x%lX\n",  (unsigned long)rdev->mc.aper_base);
250 	DRM_INFO("size %lu\n", (unsigned long)radeon_bo_size(rbo));
251 	DRM_INFO("fb depth is %d\n", fb->depth);
252 	DRM_INFO("   pitch is %d\n", fb->pitches[0]);
253 	return 0;
254 
255 out_unref:
256 	if (rbo) {
257 
258 	}
259 	if (fb && ret) {
260 		drm_gem_object_unreference(gobj);
261 		drm_framebuffer_unregister_private(fb);
262 		drm_framebuffer_cleanup(fb);
263 		kfree(fb); /* XXX malloc'd in radeon_user_framebuffer_create? */
264 	}
265 	return ret;
266 }
267 
268 void radeon_fb_output_poll_changed(struct radeon_device *rdev)
269 {
270 	drm_fb_helper_hotplug_event(&rdev->mode_info.rfbdev->helper);
271 }
272 
273 static int radeon_fbdev_destroy(struct drm_device *dev, struct radeon_fbdev *rfbdev)
274 {
275 	/* XXX unconfigure fb_info from syscons */
276 #ifdef DUMBBELL_WIP
277 	struct fb_info *info;
278 #endif /* DUMBBELL_WIP */
279 	struct radeon_framebuffer *rfb = &rfbdev->rfb;
280 
281 #ifdef DUMBBELL_WIP
282 	if (rfbdev->helper.fbdev) {
283 		info = rfbdev->helper.fbdev;
284 
285 		unregister_framebuffer(info);
286 		if (info->cmap.len)
287 			fb_dealloc_cmap(&info->cmap);
288 		framebuffer_release(info);
289 	}
290 #endif /* DUMBBELL_WIP */
291 
292 	if (rfb->obj) {
293 		DRM_UNLOCK(dev); /* Work around lock recursion. dumbbell@ */
294 		radeonfb_destroy_pinned_object(rfb->obj);
295 		DRM_LOCK(dev);
296 		rfb->obj = NULL;
297 	}
298 	drm_fb_helper_fini(&rfbdev->helper);
299 	drm_framebuffer_unregister_private(&rfb->base);
300 	drm_framebuffer_cleanup(&rfb->base);
301 
302 	return 0;
303 }
304 
305 static struct drm_fb_helper_funcs radeon_fb_helper_funcs = {
306 	.gamma_set = radeon_crtc_fb_gamma_set,
307 	.gamma_get = radeon_crtc_fb_gamma_get,
308 	.fb_probe = radeonfb_create,
309 };
310 
311 int radeon_fbdev_init(struct radeon_device *rdev)
312 {
313 	struct radeon_fbdev *rfbdev;
314 	int bpp_sel = 32;
315 	int ret;
316 
317 	/* select 8 bpp console on RN50 or 16MB cards */
318 	if (ASIC_IS_RN50(rdev) || rdev->mc.real_vram_size <= (32*1024*1024))
319 		bpp_sel = 8;
320 
321 	rfbdev = kzalloc(sizeof(struct radeon_fbdev), GFP_KERNEL);
322 	if (!rfbdev)
323 		return -ENOMEM;
324 
325 	rfbdev->rdev = rdev;
326 	rdev->mode_info.rfbdev = rfbdev;
327 	rfbdev->helper.funcs = &radeon_fb_helper_funcs;
328 
329 	ret = drm_fb_helper_init(rdev->ddev, &rfbdev->helper,
330 				 rdev->num_crtc,
331 				 RADEONFB_CONN_LIMIT);
332 	if (ret) {
333 		kfree(rfbdev);
334 		return ret;
335 	}
336 
337 	drm_fb_helper_single_add_all_connectors(&rfbdev->helper);
338 
339 	/* disable all the possible outputs/crtcs before entering KMS mode */
340 	drm_helper_disable_unused_functions(rdev->ddev);
341 
342 	drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel);
343 	return 0;
344 }
345 
346 void radeon_fbdev_fini(struct radeon_device *rdev)
347 {
348 	if (!rdev->mode_info.rfbdev)
349 		return;
350 
351 	radeon_fbdev_destroy(rdev->ddev, rdev->mode_info.rfbdev);
352 	kfree(rdev->mode_info.rfbdev);
353 	rdev->mode_info.rfbdev = NULL;
354 }
355 
356 void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state)
357 {
358 #ifdef DUMBBELL_WIP
359 	fb_set_suspend(rdev->mode_info.rfbdev->helper.fbdev, state);
360 #endif /* DUMBBELL_WIP */
361 }
362 
363 int radeon_fbdev_total_size(struct radeon_device *rdev)
364 {
365 	struct radeon_bo *robj;
366 	int size = 0;
367 
368 	robj = gem_to_radeon_bo(rdev->mode_info.rfbdev->rfb.obj);
369 	size += radeon_bo_size(robj);
370 	return size;
371 }
372 
373 bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj)
374 {
375 	if (robj == gem_to_radeon_bo(rdev->mode_info.rfbdev->rfb.obj))
376 		return true;
377 	return false;
378 }
379