1 /* 2 * Copyright © 2007 David Airlie 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 * 23 * Authors: 24 * David Airlie 25 * 26 * $FreeBSD: head/sys/dev/drm2/radeon/radeon_fb.c 254885 2013-08-25 19:37:15Z dumbbell $ 27 */ 28 29 #include <drm/drmP.h> 30 #include <drm/drm_crtc.h> 31 #include <drm/drm_crtc_helper.h> 32 #include <uapi_drm/radeon_drm.h> 33 #include "radeon.h" 34 35 #include <drm/drm_fb_helper.h> 36 37 /* object hierarchy - 38 this contains a helper + a radeon fb 39 the helper contains a pointer to radeon framebuffer baseclass. 40 */ 41 struct radeon_fbdev { 42 struct drm_fb_helper helper; 43 struct radeon_framebuffer rfb; 44 struct list_head fbdev_list; 45 struct radeon_device *rdev; 46 }; 47 48 static struct fb_ops radeonfb_ops = { 49 #if 0 50 .owner = THIS_MODULE, 51 .fb_check_var = drm_fb_helper_check_var, 52 #endif 53 .fb_set_par = drm_fb_helper_set_par, 54 #if 0 55 .fb_fillrect = cfb_fillrect, 56 .fb_copyarea = cfb_copyarea, 57 .fb_imageblit = cfb_imageblit, 58 .fb_pan_display = drm_fb_helper_pan_display, 59 #endif 60 .fb_blank = drm_fb_helper_blank, 61 #if 0 62 .fb_setcmap = drm_fb_helper_setcmap, 63 #endif 64 .fb_debug_enter = drm_fb_helper_debug_enter, 65 #if 0 66 .fb_debug_leave = drm_fb_helper_debug_leave, 67 #endif 68 }; 69 70 71 int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled) 72 { 73 int aligned = width; 74 int align_large = (ASIC_IS_AVIVO(rdev)) || tiled; 75 int pitch_mask = 0; 76 77 switch (bpp / 8) { 78 case 1: 79 pitch_mask = align_large ? 255 : 127; 80 break; 81 case 2: 82 pitch_mask = align_large ? 127 : 31; 83 break; 84 case 3: 85 case 4: 86 pitch_mask = align_large ? 63 : 15; 87 break; 88 } 89 90 aligned += pitch_mask; 91 aligned &= ~pitch_mask; 92 return aligned; 93 } 94 95 static void radeonfb_destroy_pinned_object(struct drm_gem_object *gobj) 96 { 97 struct radeon_bo *rbo = gem_to_radeon_bo(gobj); 98 int ret; 99 100 ret = radeon_bo_reserve(rbo, false); 101 if (likely(ret == 0)) { 102 radeon_bo_kunmap(rbo); 103 radeon_bo_unpin(rbo); 104 radeon_bo_unreserve(rbo); 105 } 106 drm_gem_object_unreference_unlocked(gobj); 107 } 108 109 static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev, 110 struct drm_mode_fb_cmd2 *mode_cmd, 111 struct drm_gem_object **gobj_p) 112 { 113 struct radeon_device *rdev = rfbdev->rdev; 114 struct drm_gem_object *gobj = NULL; 115 struct radeon_bo *rbo = NULL; 116 bool fb_tiled = false; /* useful for testing */ 117 u32 tiling_flags = 0; 118 int ret; 119 int aligned_size, size; 120 int height = mode_cmd->height; 121 u32 bpp, depth; 122 123 drm_fb_get_bpp_depth(mode_cmd->pixel_format, &depth, &bpp); 124 125 /* need to align pitch with crtc limits */ 126 mode_cmd->pitches[0] = radeon_align_pitch(rdev, mode_cmd->width, bpp, 127 fb_tiled) * ((bpp + 1) / 8); 128 129 if (rdev->family >= CHIP_R600) 130 height = ALIGN(mode_cmd->height, 8); 131 size = mode_cmd->pitches[0] * height; 132 aligned_size = ALIGN(size, PAGE_SIZE); 133 ret = radeon_gem_object_create(rdev, aligned_size, 0, 134 RADEON_GEM_DOMAIN_VRAM, 135 0, true, &gobj); 136 if (ret) { 137 printk(KERN_ERR "failed to allocate framebuffer (%d)\n", 138 aligned_size); 139 return -ENOMEM; 140 } 141 rbo = gem_to_radeon_bo(gobj); 142 143 if (fb_tiled) 144 tiling_flags = RADEON_TILING_MACRO; 145 146 #ifdef __BIG_ENDIAN 147 switch (bpp) { 148 case 32: 149 tiling_flags |= RADEON_TILING_SWAP_32BIT; 150 break; 151 case 16: 152 tiling_flags |= RADEON_TILING_SWAP_16BIT; 153 default: 154 break; 155 } 156 #endif 157 158 if (tiling_flags) { 159 ret = radeon_bo_set_tiling_flags(rbo, 160 tiling_flags | RADEON_TILING_SURFACE, 161 mode_cmd->pitches[0]); 162 if (ret) 163 dev_err(rdev->dev, "FB failed to set tiling flags\n"); 164 } 165 166 167 ret = radeon_bo_reserve(rbo, false); 168 if (unlikely(ret != 0)) 169 goto out_unref; 170 /* Only 27 bit offset for legacy CRTC */ 171 ret = radeon_bo_pin_restricted(rbo, RADEON_GEM_DOMAIN_VRAM, 172 ASIC_IS_AVIVO(rdev) ? 0 : 1 << 27, 173 NULL); 174 if (ret) { 175 radeon_bo_unreserve(rbo); 176 goto out_unref; 177 } 178 if (fb_tiled) 179 radeon_bo_check_tiling(rbo, 0, 0); 180 ret = radeon_bo_kmap(rbo, NULL); 181 radeon_bo_unreserve(rbo); 182 if (ret) { 183 goto out_unref; 184 } 185 186 *gobj_p = gobj; 187 return 0; 188 out_unref: 189 radeonfb_destroy_pinned_object(gobj); 190 *gobj_p = NULL; 191 return ret; 192 } 193 194 static int radeonfb_create(struct drm_fb_helper *helper, 195 struct drm_fb_helper_surface_size *sizes) 196 { 197 struct radeon_fbdev *rfbdev = 198 container_of(helper, struct radeon_fbdev, helper); 199 struct radeon_device *rdev = rfbdev->rdev; 200 struct fb_info *info; 201 struct drm_framebuffer *fb = NULL; 202 struct drm_mode_fb_cmd2 mode_cmd; 203 struct drm_gem_object *gobj = NULL; 204 struct radeon_bo *rbo = NULL; 205 #ifdef DUMBBELL_WIP 206 device_t device = rdev->dev; 207 #endif /* DUMBBELL_WIP */ 208 device_t vga_dev = device_get_parent(rdev->dev->bsddev); 209 int ret; 210 unsigned long tmp; 211 212 mode_cmd.width = sizes->surface_width; 213 mode_cmd.height = sizes->surface_height; 214 215 /* avivo can't scanout real 24bpp */ 216 if ((sizes->surface_bpp == 24) && ASIC_IS_AVIVO(rdev)) 217 sizes->surface_bpp = 32; 218 219 mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp, 220 sizes->surface_depth); 221 222 ret = radeonfb_create_pinned_object(rfbdev, &mode_cmd, &gobj); 223 if (ret) { 224 DRM_ERROR("failed to create fbcon object %d\n", ret); 225 return ret; 226 } 227 228 rbo = gem_to_radeon_bo(gobj); 229 230 info = drm_fb_helper_alloc_fbi(helper); 231 if (IS_ERR(info)) { 232 ret = PTR_ERR(info); 233 goto out_unref; 234 } 235 236 info->par = rfbdev; 237 238 ret = radeon_framebuffer_init(rdev->ddev, &rfbdev->rfb, &mode_cmd, gobj); 239 if (ret) { 240 DRM_ERROR("failed to initialize framebuffer %d\n", ret); 241 goto out_destroy_fbi; 242 } 243 244 fb = &rfbdev->rfb.base; 245 246 /* setup helper */ 247 rfbdev->helper.fb = fb; 248 249 memset(rbo->kptr, 0, radeon_bo_size(rbo)); 250 tmp = radeon_bo_gpu_offset(rbo) - rdev->mc.vram_start; 251 info->vaddr = (vm_offset_t)rbo->kptr; 252 info->paddr = rdev->mc.aper_base + tmp; 253 info->width = sizes->surface_width; 254 info->height = sizes->surface_height; 255 info->stride = fb->pitches[0]; 256 info->depth = sizes->surface_bpp; 257 info->is_vga_boot_display = vga_pci_is_boot_display(vga_dev); 258 #ifdef __DragonFly__ 259 info->fbops = radeonfb_ops; 260 #else 261 info->fbops = &radeonfb_ops; 262 #endif 263 264 DRM_INFO("fb mappable at 0x%jX\n", info->paddr); 265 DRM_INFO("vram apper at 0x%lX\n", (unsigned long)rdev->mc.aper_base); 266 DRM_INFO("size %lu\n", (unsigned long)radeon_bo_size(rbo)); 267 DRM_INFO("fb depth is %d\n", fb->depth); 268 DRM_INFO(" pitch is %d\n", fb->pitches[0]); 269 return 0; 270 271 out_destroy_fbi: 272 drm_fb_helper_release_fbi(helper); 273 out_unref: 274 if (rbo) { 275 276 } 277 if (fb && ret) { 278 drm_gem_object_unreference(gobj); 279 drm_framebuffer_unregister_private(fb); 280 drm_framebuffer_cleanup(fb); 281 kfree(fb); /* XXX malloc'd in radeon_user_framebuffer_create? */ 282 } 283 return ret; 284 } 285 286 void radeon_fb_output_poll_changed(struct radeon_device *rdev) 287 { 288 drm_fb_helper_hotplug_event(&rdev->mode_info.rfbdev->helper); 289 } 290 291 static int radeon_fbdev_destroy(struct drm_device *dev, struct radeon_fbdev *rfbdev) 292 { 293 struct radeon_framebuffer *rfb = &rfbdev->rfb; 294 295 drm_fb_helper_unregister_fbi(&rfbdev->helper); 296 drm_fb_helper_release_fbi(&rfbdev->helper); 297 298 if (rfb->obj) { 299 radeonfb_destroy_pinned_object(rfb->obj); 300 rfb->obj = NULL; 301 } 302 drm_fb_helper_fini(&rfbdev->helper); 303 drm_framebuffer_unregister_private(&rfb->base); 304 drm_framebuffer_cleanup(&rfb->base); 305 306 return 0; 307 } 308 309 static const struct drm_fb_helper_funcs radeon_fb_helper_funcs = { 310 .gamma_set = radeon_crtc_fb_gamma_set, 311 .gamma_get = radeon_crtc_fb_gamma_get, 312 .fb_probe = radeonfb_create, 313 }; 314 315 int radeon_fbdev_init(struct radeon_device *rdev) 316 { 317 struct radeon_fbdev *rfbdev; 318 int bpp_sel = 32; 319 int ret; 320 321 /* select 8 bpp console on RN50 or 16MB cards */ 322 if (ASIC_IS_RN50(rdev) || rdev->mc.real_vram_size <= (32*1024*1024)) 323 bpp_sel = 8; 324 325 rfbdev = kzalloc(sizeof(struct radeon_fbdev), GFP_KERNEL); 326 if (!rfbdev) 327 return -ENOMEM; 328 329 rfbdev->rdev = rdev; 330 rdev->mode_info.rfbdev = rfbdev; 331 332 drm_fb_helper_prepare(rdev->ddev, &rfbdev->helper, 333 &radeon_fb_helper_funcs); 334 335 ret = drm_fb_helper_init(rdev->ddev, &rfbdev->helper, 336 rdev->num_crtc, 337 RADEONFB_CONN_LIMIT); 338 if (ret) { 339 kfree(rfbdev); 340 return ret; 341 } 342 343 drm_fb_helper_single_add_all_connectors(&rfbdev->helper); 344 345 /* disable all the possible outputs/crtcs before entering KMS mode */ 346 drm_helper_disable_unused_functions(rdev->ddev); 347 348 drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel); 349 return 0; 350 } 351 352 void radeon_fbdev_fini(struct radeon_device *rdev) 353 { 354 if (!rdev->mode_info.rfbdev) 355 return; 356 357 radeon_fbdev_destroy(rdev->ddev, rdev->mode_info.rfbdev); 358 kfree(rdev->mode_info.rfbdev); 359 rdev->mode_info.rfbdev = NULL; 360 } 361 362 void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state) 363 { 364 #ifdef DUMBBELL_WIP 365 fb_set_suspend(rdev->mode_info.rfbdev->helper.fbdev, state); 366 #endif /* DUMBBELL_WIP */ 367 } 368 369 bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj) 370 { 371 if (robj == gem_to_radeon_bo(rdev->mode_info.rfbdev->rfb.obj)) 372 return true; 373 return false; 374 } 375 376 void radeon_fbdev_restore_mode(struct radeon_device *rdev) 377 { 378 struct radeon_fbdev *rfbdev = rdev->mode_info.rfbdev; 379 struct drm_fb_helper *fb_helper; 380 int ret; 381 382 if (!rfbdev) 383 return; 384 385 fb_helper = &rfbdev->helper; 386 387 ret = drm_fb_helper_restore_fbdev_mode_unlocked(fb_helper); 388 if (ret) 389 DRM_DEBUG("failed to restore crtc mode\n"); 390 } 391